BUK9Y09-40B

BUK9Y09-40B N-channel TrenchMOS logic level FET Rev. 04 — 7 April 2010 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low on-state resistance Q101 compliant Suitable for logic level gate drive sources Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications 12 V loads Automotive systems General purpose power switching Motors, lamps and solenoids 1.4 Quick reference data Table 1. Symbol VDS ID Ptot Quick reference data Parameter drain-source voltage drain current total power dissipation drain-source on-state resistance Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tmb = 25 °C; see Figure 1; see Figure 4 Tmb = 25 °C; see Figure 2 Min Typ Max Unit 40 75 V A 105. W 3 9 mΩ Static characteristics RDSon VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 11; see Figure 12 VGS = 10 V; ID = 25 A; Tj = 25 °C 6.9 - 5.8 8 mΩ NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET Quick reference data …continued Parameter Conditions Min Typ Max Unit 146 mJ Table 1. Symbol EDS(AL)S Avalanche ruggedness non-repetitive ID = 75 A; Vsup ≤ 40 V; drain-source RGS = 50 Ω; VGS = 5 V; avalanche energy Tj(init) = 25 °C; unclamped gate-drain charge VGS = 5 V; ID = 25 A; VDS = 32 V; see Figure 13 Dynamic characteristics QGD 11 nC 2. Pinning information Table 2. Pin 1 2 3 4 mb Pinning information Symbol Description S S S G D source source source gate mounting base; connected to drain mbb076 Simplified outline mb Graphic symbol D G S 1234 SOT669 (LFPAK) 3. Ordering information Table 3. Ordering information Package Name BUK9Y09-40B LFPAK Description Version plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669 Type number BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 2 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 4. Limiting values Table 4. Symbol VDS VDGR VGS ID Limiting values Parameter drain-source voltage drain-gate voltage gate-source voltage drain current Tmb = 25 °C; VGS = 5 V; see Figure 1; see Figure 4 Tmb = 100 °C; VGS = 5 V; see Figure 1 IDM Ptot Tstg Tj IS ISM EDS(AL)S peak drain current total power dissipation storage temperature junction temperature source current peak source current non-repetitive drain-source avalanche energy repetitive drain-source avalanche energy Tmb = 25 °C tp ≤ 10 µs; pulsed; Tmb = 25 °C ID = 75 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped see Figure 3 [1][2][3] [4] In accordance with the Absolute Maximum Rating System (IEC 60134). Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ Min -15 -55 -55 Typ Max 40 40 15 75 53 300 105.3 175 175 75 300 146 Unit V V V A A A W °C °C A A mJ Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 4 Tmb = 25 °C; see Figure 2 Source-drain diode Avalanche ruggedness EDS(AL)R - - - J [1] [2] [3] [4] Maximum value not quoted. Repetitive rating defined in avalanche rating figure. Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Repetitive avalanche rating limited by an average junction temperature of 170 °C. Refer to application note AN10273 for further information. BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 3 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 100 ID (A) 80 003aac506 120 Pder (%) 80 003aab844 60 40 40 20 0 0 50 100 150 200 Tmb (°C) 0 0 50 100 150 Tmb (°C) 200 Fig 1. Continuous drain current as a function of mounting base temperature 102 IAL (A) Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aac485 (1) 10 (2) 1 (3) 10-1 10-3 10-2 10-1 1 tAL (ms) 10 Fig 3. Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 4 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 103 I D (A) Limit RDSon = V DS / ID 102 tp = 10 μs 100 μs 10 DC 10 ms 1 100 ms 1 ms 003aac606 10-1 10-1 1 10 102 VDS (V) 103 Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 5. Thermal characteristics Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to mounting base Conditions see Figure 5 Min Typ Max 1.42 Unit K/W 10 Zth (j-mb) (K/W) 1 0.2 0.1 10-1 0.05 0.02 10-2 single shot tp T P 003aac479 δ = 0.5 δ= tp T t 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration. BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 5 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 6. Characteristics Table 6. Symbol V(BR)DSS VGS(th) VGSth Characteristics Parameter drain-source breakdown voltage gate-source threshold voltage gate-source threshold voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = -55 °C ID = 0.25 mA; VGS = 0 V; Tj = 25 °C ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 9; see Figure 10 ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 9; see Figure 10 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 9; see Figure 10 IDSS IGSS RDSon drain leakage current gate leakage current drain-source on-state resistance VDS = 40 V; VGS = 0 V; Tj = 25 °C VDS = 40 V; VGS = 0 V; Tj = 175 °C VDS = 0 V; VGS = 15 V; Tj = 25 °C VDS = 0 V; VGS = -15 V; Tj = 25 °C VGS = 5 V; ID = 25 A; Tj = 25 °C; see Figure 11; see Figure 12 VGS = 4.5 V; ID = 25 A; Tj = 25 °C VGS = 5 V; ID = 25 A; Tj = 175 °C; see Figure 12 VGS = 10 V; ID = 25 A; Tj = 25 °C Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss td(on) tr td(off) tf VSD trr Qr total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time source-drain voltage reverse recovery time recovered charge IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 15 IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 30 V VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG(ext) = 10 Ω VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 14 ID = 25 A; VDS = 32 V; VGS = 5 V; see Figure 13 30 6.5 11 2150 378 194 29 92 97 83 0.85 40 66 2866 454 266 1.2 nC nC nC pF pF pF ns ns ns ns V ns nC Min 36 40 1.25 0.5 Typ 1.65 0.02 2 2 6.9 5.8 Max 2.15 2.45 1 500 100 100 9 10 19 8 Unit V V V V V µA µA nA nA mΩ mΩ mΩ mΩ Static characteristics Source-drain diode BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 6 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 200 ID (A) 10 150 5 003aac863 80 gfs (S) 70 003aac866 4.5 4 60 100 3.5 50 3 50 2.5 VGS (V) = 2 0 0 2 4 6 8 VDS (V) 10 40 30 0 20 40 60 ID (A) 80 Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values. 003aac865 Fig 7. Forward transconductance as a function of drain current; typical values. 2.5 003aad557 25 RDSon (mΩ) 20 2.5 3 3.5 4 VGS(th) (V) 2 max typ 4.5 15 5 10 VGS (V) = 10 5 1.5 min 1 0.5 0 0 50 100 150 ID (A) 200 0 -60 0 60 120 Tj (°C) 180 Fig 8. Drain-source on-state resistance as a function of drain current; typical values. Fig 9. Gate-source threshold voltage as a function of junction temperature BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 7 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 10-1 ID (A) 10 -2 003aad565 12 RDSon (mΩ) 10 003aac864 min 10-3 typ max 8 10 -4 10-5 6 10-6 0 1 2 VGS (V) 3 4 0 4 8 12 VGS (V) 16 Fig 10. Sub-threshold drain current as a function of gate-source voltage 2.4 a 03nb25 Fig 11. Drain-source on-state resistance as a function of gate-source voltage; typical values. 5 VGS (V) 4 VDS = 14V 003aac869 1.6 3 VDS = 32V 2 0.8 1 0 −60 0 0 60 120 Tj (°C) 180 0 10 20 QG (nC) 30 Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature Fig 13. Gate-source voltage as a function of turn-on gate charge; typical values. BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 8 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 104 C (pF) 003aac867 100 IS (A) 80 003aac870 Ciss 60 10 3 Coss 40 Tj = 175 °C Crss 102 10-1 1 10 2 VDS (V) 10 20 Tj = 25 °C 0 0 0.3 0.6 0.9 V (V) 1.2 SD Fig 14. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. Fig 15. Reverse diode current as a function of reverse diode voltage; typical values. 60 ID (A) 003aac868 40 20 Tj = 175 °C Tj = 25 °C 0 0 1 2 3 VGS (V) 4 Fig 16. Transfer characteristics: drain current as a function of gate-source voltage; typical values. BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 9 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 7. Package outline Plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669 E b2 L1 A c2 A2 C E1 b3 mounting base D1 H D b4 L2 1 e 2 3 b 1/2 4 wM A c X e A A1 C (A 3) θ detail X L yC 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 θ 8° 0° 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 0.25 0.30 4.10 4.20 0.19 0.24 3.80 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 04-10-13 06-03-16 Fig 17. Package outline SOT669 (LFPAK) BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 10 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 8. Revision history Table 7. Revision history Release date 20100407 Data sheet status Product data sheet Objective data sheet Change notice Supersedes BUK9Y09-40B_3 BUK9Y09-40B_2 Document ID BUK9Y09-40B_4 Modifications: BUK9Y09-40B_3 • Status changed from objective to product. 20100215 BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 11 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 12 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET Adelante, Bitport, Bitsound, CoolFlux, CoReUse, DESFire, EZ-HV, FabKey, GreenChip, HiPerSmart, HITAG, I²C-bus logo, ICODE, I-CODE, ITEC, Labelution, MIFARE, MIFARE Plus, MIFARE Ultralight, MoReUse, QLPAK, Silicon Tuner, SiliconMAX, SmartXA, STARplug, TOPFET, TrenchMOS, TriMedia and UCODE — are trademarks of NXP B.V. HD Radio and HD Radio logo — are trademarks of iBiquity Digital Corporation. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com BUK9Y09-40B All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 04 — 7 April 2010 13 of 14 NXP Semiconductors BUK9Y09-40B N-channel TrenchMOS logic level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 7 April 2010 Document identifier: BUK9Y09-40B