BUK9Y30-75B

BUK9Y30-75B N-channel TrenchMOS logic level FET Rev. 04 — 10 April 2008 Product data sheet 1. Product profile 1.1 General description Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features and benefits Low conduction losses due to low on-state resistance Suitable for logic level gate drive sources Q101 compliant Suitable for thermally demanding environments due to 175 °C rating 1.3 Applications 12 V, 24 V and 42 V loads General purpose power switching Automotive systems Motors, lamps and solenoids 1.4 Quick reference data Table 1. Symbol VDS ID Ptot EDS(AL)S Quick reference Parameter drain-source voltage drain current total power dissipation non-repetitive drain-source avalanche energy gate-drain charge Conditions Tj ≥ 25 °C; Tj ≤ 175 °C VGS = 5 V; Tmb = 25 °C; see Figure 1 and 4 Tmb = 25 °C; see Figure 2 ID = 34 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped VGS = 5 V; ID = 25 A; VDS = 60 V; Tj = 25 °C; see Figure 14 VGS = 5 V; ID = 15 A; Tj = 25 °C; see Figure 12 and 13 Min Typ Max 75 34 85 78 Unit V A W mJ Avalanche ruggedness Dynamic characteristics QGD 9 nC Static characteristics RDSon drain-source on-state resistance 25 30 mΩ NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 2. Pinning information Table 2. Pin 1 2 3 4 mb Pinning Symbol S S S G D Description source source source gate mounting base; connected to drain mbb076 Simplified outline mb Graphic symbol D G S 1234 SOT669 (LFPAK) 3. Ordering information Table 3. Ordering information Package Name BUK9Y30-75B LFPAK Description plastic single-ended surface-mounted package (LFPAK); 4 leads Version SOT669 Type number 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID IDM Ptot Tstg Tj IS ISM drain-source voltage drain-gate voltage gate-source voltage drain current peak drain current total power dissipation storage temperature junction temperature source current peak source current Tmb = 25 °C tp ≤ 10 μs; pulsed; Tmb = 25 °C ID = 34 A; Vsup ≤ 75 V; RGS = 50 Ω; VGS = 5 V; Tj(init) = 25 °C; unclamped see Figure 3 [1][2] [3] Conditions Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ; Tmb ≥ 25 °C; Tmb ≤ 175 °C Tmb = 25 °C; VGS = 5 V; see Figure 1 and 4 Tmb = 100 °C; VGS = 5 V; see Figure 1 Tmb = 25 °C; tp ≤ 10 μs; pulsed; see Figure 4 Tmb = 25 °C; see Figure 2 Min -15 -55 -55 - Max 75 75 15 34 24 137 85 175 175 34 137 78 Unit V V V A A A W °C °C A A mJ Source-drain diode Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy EDS(AL)R repetitive drain-source avalanche energy [1] [2] [3] - - J Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. Repetitive avalanche rating limited by average junction temperature of 170 °C. Refer to application note AN10273 for further information. © NXP B.V. 2008. All rights reserved. BUK9Y30-75B_4 Product data sheet Rev. 04 — 10 April 2008 2 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 40 ID (A) 30 03no16 120 Pder (%) 80 03na19 20 40 10 0 0 50 100 150 Tmb (°C) 200 0 0 50 100 150 Tmb (°C) 200 VGS 5V P der = P tot P tot (25°C ) × 100 % Fig 1. Normalized continuous drain current as a function of mounting base temperature 102 IAV (A) 10 Fig 2. Normalized total power dissipation as a function of mounting base temperature 03np81 (1) (2) 1 (3) 10-1 10-3 10-2 10-1 1 t (ms) 10 AV (1) Single pulse; T j = 25 °C . (2) Single pulse; T j = 150 °C . (3) Repetitive. Fig 3. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 3 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 103 ID (A) 102 03no14 Limit RDSon = VDS / ID tp = 10 μs 100 μs 10 1 1 ms 10 ms 100 ms DC 10-1 1 10 VDS (V) 102 Tmb = 25 °C ; IDM is single pulse Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Symbol Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to mounting base Conditions see Figure 5 Min Typ Max 1.8 Unit K/W 10 Zth (j-mb) (K/W) 03nm01 1 δ = 0.5 0.2 0.1 10-1 0.05 0.02 tp t T P δ= tp T 10-2 10-6 single shot 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 4 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 6. Characteristics Table 6. Symbol V(BR)DSS Characteristics Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V; Tj = 25 °C ID = 0.25 mA; VGS = 0 V; Tj = -55 °C VGS(th) gate-source threshold ID = 1 mA; VDS = VGS; voltage Tj = 175 °C; see Figure 11 ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 11 ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 11 IDSS drain leakage current VDS = 75 V; VGS = 0 V; Tj = 175 °C VDS = 75 V; VGS = 0 V; Tj = 25 °C IGSS gate leakage current VDS = 0 V; VGS = +15 V; Tj = 25 °C VDS = 0 V; VGS = -15 V; Tj = 25 °C RDSon drain-source on-state resistance VGS = 4.5 V; ID = 15 A; Tj = 25 °C VGS = 5 V; ID = 15 A; Tj = 175 °C; see Figure 12 and 13 VGS = 5 V; ID = 25 A; Tj = 25 °C VGS = 5 V; ID = 15 A; Tj = 25 °C; see Figure 12 and 13 VGS = 10 V; ID = 15 A; Tj = 25 °C Source-drain diode VSD trr Qr source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 16 0.85 101 115 1.2 V ns nC Min 75 70 0.5 1.1 Typ 1.5 0.02 2 2 27 25 23 Max 2 2.3 500 1 100 100 34 72 32 30 28 Unit V V V V V μA μA nA nA mΩ mΩ mΩ mΩ mΩ Static characteristics reverse recovery time IS = 20 A; dIS/dt = -100 A/μs; VGS = -10 V; VDS = 30 V; recovered charge Tj = 25 °C total gate charge gate-source charge gate-drain charge input capacitance output capacitance reverse transfer capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 15 ID = 25 A; VDS = 60 V; VGS = 5 V; Tj = 25 °C; see Figure 14 Dynamic characteristics QG(tot) QGS QGD Ciss Coss Crss 19 5 9 1550 150 60 2070 179 80 nC nC nC pF pF pF BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 5 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET Table 6. Symbol td(on) tr td(off) tf Characteristics …continued Parameter turn-on delay time rise time turn-off delay time fall time Conditions VDS = 30 V; RL = 1.2 Ω; VGS = 5 V; RG(ext) = 10 Ω; Tj = 25 °C Min Typ 16 106 51 83 Max Unit ns ns ns ns 30 RDSon (mΩ) 28 03no10 10−1 ID (A) 10−2 min typ max 03ng53 26 10−3 24 10−4 22 10−5 20 3 6 9 12 VGS (V) 15 10−6 0 1 2 VGS (V) 3 T j = 25 °C ; ID = 15 A T j = 25 °C ; VDS = VGS Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values Fig 7. Sub-threshold drain current as a function of gate-source voltage BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 6 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 60 ID (A) 40 03no09 100 ID (A) 75 03no11 VGS (V) = 10 7.0 5.0 4.2 4.0 50 3.8 3.6 20 Tj = 175 °C Tj = 25 °C 25 3.4 3.2 3.0 0 0 1 2 3 4 VGS (V) 5 0 0 2 4 6 8 2.8 2.6 10 VDS (V) VDS = 25 V T j = 25 °C ; t p = 300 s Fig 8. Transfer characteristics: drain current as a function of gate-source voltage; typical values 50 gfs (S) 40 03no08 Fig 9. Output characteristics: drain current as a function of drain-source voltage; typical values 2.5 VGS(th) (V) 2.0 max 03ng52 1.5 typ 1.0 30 0.5 min 20 0 10 20 30 ID (A) 40 0 −60 0 60 120 Tj (°C) 180 T j = 25 °C ; VDS = 25 V ID = 1 m A; VDS = VGS Fig 10. Forward transconductance as a function of drain current; typical values Fig 11. Gate-source threshold voltage as a function of junction temperature BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 7 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 60 RDSon (mΩ) 50 VGS (V) = 3.4 3.6 3.8 4.0 5.0 10 03no12 3 a 03nq03 2 40 30 1 20 10 0 20 40 60 ID (A) 80 0 -60 -20 20 60 100 140 180 Tj (°C) T j = 25 °C a= R DSon R DSon (25°C ) Fig 12. Drain-source on-state resistance as a function of drain current; typical values 5 VGS (V) 4 VDS = 14 V VDS = 60 V 03no07 Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature 2500 C (pF) 2000 Ciss 03no13 3 1500 2 1000 Coss 1 500 Crss 0 0 5 10 15 QG (nC) 20 0 10−1 1 10 VDS (V) 102 T j = 25 °C ; ID = 25 A VGS = 0 V ; f = 1 M H z Fig 14. Gate-source voltage as a function of gate charge; typical values Fig 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 8 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 100 IS (A) 80 03no06 60 40 Tj = 175 °C 20 Tj = 25 °C 0 0 0.3 0.6 0.9 VSD (V) 1.2 VGS = 0 V Fig 16. Source current as a function of source-drain voltage; typical values BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 9 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 7. Package outline Plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669 E b2 L1 A c2 A2 C E1 b3 mounting base D1 H D b4 L2 1 e 2 3 b 1/2 4 wM A c X e A A1 C (A 3) θ detail X L yC 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A A1 A2 A3 b b2 b3 2.2 2.0 b4 0.9 0.7 c c2 D (1) D1(1) E(1) E1(1) max 5.0 4.8 3.3 3.1 e 1.27 H 6.2 5.8 L 0.85 0.40 L1 1.3 0.8 L2 1.3 0.8 w 0.25 y 0.1 θ 8° 0° 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 0.25 0.30 4.10 4.20 0.19 0.24 3.80 Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC MO-235 JEITA EUROPEAN PROJECTION ISSUE DATE 04-10-13 06-03-16 Fig 17. Package outline SOT669 (LFPAK) BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 10 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 8. Revision history Table 7. Revision history Release date 20080410 Data sheet status Product data sheet Product data sheet Product data sheet Product data sheet Change notice Supersedes BUK9Y30-75B_3 BUK9Y30-75B_2 BUK9Y30_75B-01 Document ID BUK9Y30-75B_4 Modifications: BUK9Y30-75B_3 BUK9Y30-75B_2 BUK9Y30_75B-01 (9397 750 13729) • Figure 13: updated 20080222 20060411 20040714 BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 11 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 9. Legal information 9.1 Data sheet status Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com BUK9Y30-75B_4 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 04 — 10 April 2008 12 of 13 NXP Semiconductors BUK9Y30-75B N-channel TrenchMOS logic level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 10 April 2008 Document identifier: BUK9Y30-75B_4