Freescale Semiconductor, Inc.Order this document by MC33143/D
The MC33143 is a dual high–side switch designed for solenoid control in
harsh automotive applications, but is well suited for other environments. The
device can also be used to control small motors and relays as well as
solenoids. The MC33143 incorporates SMARTMOS technology, with
CMOS logic, bipolar/MOS analog circuitry, and DMOS power outputs. An
internal charge pump is incorporated for efficient gate enhancement of the
internal high–side power output devices. The outputs are designed to
provide current to low impedance solenoids. The MC33143 provides
individual output fault status reporting along with internal Overcurrent and
Over Temperature protection. The device also has Overvoltage protection,
with automatic recovery, which “globally” disables both outputs for the
duration of an Overvoltage condition. Each output has individual Overcurrent
and Over Temperature shutdown with automatic retry recovery. Outputs are
enabled with a CMOS logic high signal applied to an input to providing true
logic control. The outputs, when turned on, provide full supply (battery)
voltage across the solenoid coil.
The MC33143 is packaged in an economical 24 pin surface mount power
package and specified over an operating voltage of 5.5 V ≤ VPwr < 26 V for
–40°C ≤ TA ≤ 125°C.
• Designed to Operate Over Wide Supply Voltages of 5.5 V to 26 V
•
•
•
•
•
•
•
•
•
•
•
•
•
DUAL HIGH–SIDE
SWITCH
SEMICONDUCTOR
TECHNICAL DATA
24
1
Dual High–Side Outputs Clamped to –10 V for Driving Inductive Loads
DW SUFFIX
PLASTIC PACKAGE
CASE 751E
(SOP (16+4+4)L)
Internal Charge Pump for Enhanced Gate Drive
Interfaces Directly to a Microcontroller with Parallel Input Control
Outputs Current Limited to 3.0 A to 6.0 A for Driving Incandescent Loads
Chip Enable “Sleep Mode” for Power Conservation
Individual Output Status Reporting
PIN CONNECTIONS
Fault Interrupt Output for System Interrupt Use
Output ON or OFF Open Load Detection
IN1
1
24 OUT1
CEN
2
23 INT
STAT1
3
22 N/C
VPwr
4
21 VPwr
Gnd
5
20 Gnd
Gnd
6
19 Gnd
Gnd
7
18 Gnd
Gnd
8
17 Gnd
VPwr
9
16 VPwr
STAT2 10
15 GTST
VDD 11
14 SFPD
IN2 12
13 OUT2
Overvoltage Detection and Shutdown
Output Over Temperature Detection and Shutdown with Automatic Retry
Sustained Current Limit or Immediate Overcurrent Shutdown Output Modes
Output Short to Ground Detection and Shutdown with Automatic Retry
Output Short to VPwr Detection
SMARTMOS is a trademark of Motorola, Inc.
Simplified Application
+VPwr
VDD P0
P1
P2
MCU
P3
P4
IRQ
NOTE:
CEN (2)
IN1 (1)
IN2 (12)
STAT1 (13)
STAT2 (10)
INT (23)
GTST (15)
VDD
SFPD (14)
VDD (11)
V Pwr (16)
Freescale Semiconductor, Inc...
Battery
OUT1 (24)
(Top View)
OUT2 (13)
MC33143
Gnd (Note)
Pins 5, 6, 7, 8, 17, 18, 19 and 20 provide electrical ground and heatsinking.
This device contains 889 active transistors.
This document contains information on a new product. Specifications and information herein
are
subject to change
without notice.
MOTOROLA
ANALOG
IC DEVICE DATA
ORDERING INFORMATION
Operating
Temperature Range
Package
MC33143DW TA = – 40° to +125°C
SOP–24L
Device
Motorola, Inc. 1996
For More Information On This Product,
Go to: www.freescale.com
Rev 0
1
MC33143
Freescale Semiconductor,
Inc.
Figure 1. Simplified Internal Block Diagram
VPwr (9, 16)
Overvoltage
Shutdown
Voltage
Regulator
SFPD (14)
OFF/ON
Open Load
Detect
Bias
Charge
Pump
OFF/ON
Open Load
Detect
GTST (15)
Freescale Semiconductor, Inc...
CEN (2)
Fault Detection
D ON/OFF Open Load
D ON/OFF VPwr Short
D On Ground Short
D Over Temperature
D VPwr Overvoltage
–10 V
OUT1 (24)
STAT1 (3)
Over
Temperature
Shutdown
Current
Limit
15 V
55 V
Gate
Control
IN2 (12)
INT (23)
Fault Detection
D ON/OFF Open Load
D ON/OFF VPwr Short
D On Ground Short
D Over Temperature
D VPwr Overvoltage
4.0 ms
Retry Timer
Gnd (5) (See Note)
NOTE:
55 V
Gate
Control
IN1 (1)
VDD (11)
Over
Temperature
Shutdown
Current
Limit
–10 V
15 V
OUT2 (13)
STAT2 (10)
Pins 5, 6, 7, 8, 17, 18, 19 and 20 should all be grounded so as to provide electrical as well as thermal heatsinking of the device.
MAXIMUM RATINGS (All voltages are with respect to ground, unless otherwise noted.)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
Rating
Symbol
Value
Unit
Power Supply Voltage
Steady State Continuous Operation
Negative Transient (Note 1)
Positive Load Dump Transient (Note 2)
VPwr
V
Logic Supply Voltage Range
VDD
–0.3 to 7.0
V
Logic Supply Current
IDD
5.0
mA
Input Voltage (Note 3)
Vin
–0.3 to 7.0
V
Output Clamp Voltage
IO = –20 mA
IO = –200 mA
VClamp
Output Current Limit (Note 4)
IO(Lim)
Output Clamp Energy (IO = –1.0 A)
TJ = 25°C
TJ = 125°C
EClamp
26
–1.5
60
V
–3.0 to –20
–5.5 to –20
–3.0 to –6.0
A
NOTES: 1. Negative transient survival capability
for 100 ms time duration.
mJ
300
100
ESD (Minimum)
Human Body Model (Note 5)
Machine Model (Note 6)
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁ
HBM
MM
2000
200
2. Positive transient survival capability
with typical automotive load dump
condition; 400 ms time constant
decay.
3. All input pins (IN1–2, CEN and
SFPD).
4. Each output has independent
current limiting.
Power Dissipation (TA = 25°C) (Note 7)
PD
4.2
W
Operating Temperature (Note 8)
TA
–40 to +125
°C
5. Performed in accordance to HBM;
CZap = 100 pF, RZap = 1500 Ω.
Operating Junction Temperature
TJ
–40 to +150
°C
6. Performed in accordance to MM;
CZap = 100 pF, RZap = 0 Ω.
Tstg
–55 to +150
°C
7. Derate Power Dissipation 33 mW/°C
for temperatures above 25°C.
Tsolder
270
°C
RθJL
RθJA
15
30
Storage Temperature
Soldering Temperature (for 10 Seconds)
Thermal Resistance
Junction–to–Lead
Junction–to–Ambient
2
°C/W
8. Ambient temperature is given as a
practical reference; Maximum
junction temperature is the limiting
factor.
9. ESD data available upon request.
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
MC33143
Freescale Semiconductor,
Inc.
DC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 9.0 V ≤ VPwr ≤ 17 V, 4.5 V ≤ VDD 5.5 V,
–40°C ≤ TL ≤ 125°C, unless otherwise noted, typical values represent approximate mean at TL = 25°C.)
Characteristic
Symbol
Min
Typ
Max
Unit
VPwr
9.0
–
17
V
IPwr
IPwr(sby)
IPwr(sleep)
0.1
–
–
4.2
3.9
0.2
7.0
7.0
300
mA
mA
µA
Logic Supply Voltage Range
VDD
4.5
–
5.5
V
Logic Supply Current
Both Outputs ON (IN1 = IN2 = 0.7 x VDD, IO1 = IO2 = –1.0 A)
IDD
–
0.43
5.0
Overvoltage Shutdown (Note 2)
VPwr(ovsd)
30
33.2
38
V
Overvoltage Shutdown Hysteresis
VPwr(hys)
0.3
0.5
1.5
V
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
POWER INPUT
Supply Voltage Range (Operational)
Freescale Semiconductor, Inc...
Supply Current (Note 1)
Both Outputs ON
(CEN = IN1 = IN2 = 0.7 x VDD, IO1 = IO2 = –1.0 A)
Standby (CEN = 0.7 x VDD, IN1 = IN2 = 0.3 x VDD, RL = 12 Ω)
“Sleep State” (CEN = IN1 = IN2 = 0.3 x VDD, RL = 12 Ω)
mA
NOTES: 1. Supply current when both outputs are ON and during standby are measured in the Ground pin while during “sleep state” is measured in the VPwr pin.
2. Overvoltage Shutdown causes enabled outputs to be forced OFF; Overvoltage fault is immediately reported.
DC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 9.0 V ≤ VPwr ≤ 17 V, 4.5 V ≤ VDD 5.5 V,
–40°C ≤ TL ≤ 125°C, unless otherwise noted, typical values represent approximate mean at TL = 25°C.)
Characteristic
Symbol
Drain–to–Source ON Resistance (Note 1)
(TJ = 25°C, CEN = IN1 = IN2 = 0.7 x VDD)
IO = –0.5 A. VPwr = 5.5 V
IO = –1.0 A. VPwr = 14 V
IO = –2.0 A. VPwr = 24 V
RDS(on)
Drain–to–Source ON Resistance (Note 1)
(TJ = 125°C, CEN = IN1 = IN2 = 0.7 x VDD)
IO = –0.5 A. VPwr = 5.5 V
IO = –1.0 A. VPwr = 14 V
IO = –2.0 A. VPwr = 24 V
RDS(on)
Output Self–Limiting Current (Note 2)
(CEN = IN1 = IN2 = SFPD = 0.7 x VDD, RL = 0 Ω)
Min
Typ
Max
Unit
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
POWER OUTPUT
Ω
–
–
–
0.2
0.14
0.14
0.5
0.2
0.2
Ω
–
–
–
–
–
–
1.0
0.38
0.38
IO(Lim)
–3.0
–4.1
–6.0
A
Output OFF Leakage Current
(CEN = 0.7 x VDD, IN1 = IN2 = 0.3 x VDD)
IO(Lkg)
–5.0
–45
–150
µA
Output OFF Open Load Sense Current
(CEN = 0.7 x VDD, IN1 = IN2 = 0.3 x VDD)
IO(Sense)
–5.0
–45
–150
µA
Output ON Open Load Detection Current (Note 3)
(CEN = IN1 = IN2 = 0.7 x VDD)
TL = –40°C
TL = 125°C
IO(On)
Output Clamp Voltage (Note 4)
(CEN = 0.7 x VDD, IN1 = IN2 = 0.3 x VDD)
IO = –20 mA
IO = –200 mA
VClamp
Over Temperature Shutdown Range (Note 5)
(CEN = IN1 = IN2 = SFPD = 0.7 x VDD)
mA
–2.0
–2.0
Over Temperature Shutdown Hysteresis (Note 6)
–145
–181
–200
–200
V
–9.0
–9.0
–13.2
–13.5
–20
–20
TLim
155
–
185
°C
TLim(hys)
–
–
15
°C
NOTES: 1. RDS(on) applies to OUT1, OUT2 and is independent of output current.
2. Applies to each output; each output has independent self–limiting source current feature; Over Current and Short–to–Ground defined as condition
when output source current exceeds IO(Lim); Device ignores Over Current and Short–to–Ground faults from 0 to tss.
3. Applies to each output; tested for by ramping IO from 0 until STAT ≤ 0.7 x VDD; defined as the condition when IO is outside of IO(on) current window.
4. Applies to each output; each output has independent dynamic output voltage clamping feature.
5. Applies to each output; each output has independent thermal shutdown; parameter is measured by ramping temperature until enabled output is
disabled; parameter is established by design but is not production tested; thermal fault is immediately reported.
6. Parameter is established by design but is not production tested.
MOTOROLA ANALOG IC DEVICEFor
DATA
More Information On This Product,
Go to: www.freescale.com
3
MC33143
Freescale Semiconductor,
Inc.
DC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 9.0 V ≤ VPwr ≤ 17 V, 4.5 V ≤ VDD 5.5 V,
–40°C ≤ TL ≤ 125°C, unless otherwise noted, typical values represent approximate mean at TL = 25°C.)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
Á
ÁÁÁ
Á
ÁÁÁ
Á
ÁÁÁ
Á
ÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
Characteristic
Symbol
Min
Typ
Max
Unit
Input Control
Logic High (IO = –0.1 A) (Note 1)
Logic Low (IO = 0) (Note 2)
VIH
VIL
0.7
–
0.56
0.52
–
0.3
Input Logic Voltage Hysteresis (VIH – VIL)
Vhys
50
250
500
mV
Input Pull–Down Current (0.3 x VDD ≤ Vin < 0.7 x VDD) (Note 3)
Iin(pd)
20
44
100
µA
Chip–Enable Threshold
Logic Low (Note 4)
Logic High (Note 5)
VCEN(IL)
VCEN(IH)
–
0.7
0.5
0.5
0.3
–
Chip–Enable Hysteresis (VCEN(IH) – VCEN(IL))
VCEN(hys)
50
150
500
mV
Chip–Enable Pull–Up Current (CEN = 0.7 x VDD)
ICEN(pu)
–2.0
–16.8
–40
µA
VSTAT(low)
–
0.07
0.2
VDD
ISTAT(pu)
–20
–44
–100
µA
INTh
INTl
0.7
–
–
–
–
0.3
Freescale Semiconductor, Inc...
CONTROL INTERFACE
VDD
VDD
Status Low Voltage (Iin = 600 µA) (Note 6)
Status Pull–Up Current (Note 7)
Interrupt (Note 8)
Logic High
Logic Low
VDD
NOTES: 1. Upper logic threshold voltage applies to IN1, IN2, and SFPD and expressed in VDD units
2. Lower logic threshold voltage applies to IN1, IN2, and SFPD and expressed in VDD units.
3. Applies to IN1, IN2, and SFPD.
4. Initially have CEN = 0.7 x VDD, Ramp CEN down from VDD until IO = 0 and note disabling point.
5. Initially have Vin = 0.7 x VDD, Ramp CEN up from ground until IO = 0.1 A and note enabling point.
6. Applies equally to STAT1–2 and INT outputs; Measured threshold voltage by applying an “open” fault to OUT1 or OUT2 while forcing 600 µA of
current into STAT1–2 or INT.
7. Measured with no faults on OUT1–2, VSTAT = VINT = 0.8 x VDD.
8. The Interrupt output has an internal active current pull–up.
DC ELECTRICAL CHARACTERISTICS (Characteristics noted under conditions 9.0 V ≤ VPwr ≤ 17 V, 4.5 V ≤ VDD 5.5 V,
–40°C ≤ TL ≤ 125°C, unless otherwise noted, typical values represent approximate mean at TL = 25°C.)
Characteristic
Symbol
Min
Typ
Max
Unit
Output Short Sense Time (Note 1)
tss
30
54
100
µs
Output Short Refresh Time (Note 2)
tref
3.0
4.1
6.0
ms
tos(on)
3.0
6.4
12
ms
Output Propagation Delay
Turn–On (Output Low to High) (Note 4)
Turn–Off (Output High to Low) (Note 5)
tdlh
tdhl
–
–
7.2
40
50
75
Output Slew Rate
Output Rising (Note 6)
Output Falling (Note 7)
SRr
SRf
0.2
0.2
11
2.6
10
10
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁ
ÁÁÁ
OUTPUT DYNAMICS
Output Open Sense ON Time (Note 3)
µs
V/µs
NOTES: 1. CEN = 0.7 x VDD, SFPD = 0.3 x VDD, RL = 0, Step Vin from 0.3 x VDD to 0.7 x VDD; Sense time measured from step until STAT = 0.2 x VDD.
2. CEN = IN1 = IN2 = 0.7 x VDD, RL = 0; Refresh time measured from output disable until output is re–enabled.
3. RL = “open”, Step Vin from ground to 0.7 x VDD, Open sense time measured from step until VSTAT ≤ 0.2 x VDD.
4. RL = 12 Ω, CL = 0.01 µF, step Vin from VIL to VIH; Turn–On propagation measured from Vin = 0.5 x VDD until Vout = 2.0 V (see Figure 2).
5. RL = 12 Ω, CL = 0.01 µF, step Vin from VIH to VIL; Turn–Off propagation measured from Vout = VPwr –3.0 V until Vout = 2.0 V (see Figure 2).
6. RL = 12 Ω, CL = 0.01 µF, step Vin from VIL to VIH; Output Slew Rate measured from 2.0 V to VPwr – 3.0 V (see Figure 2).
7. RL = 12 Ω, CL = 0.01 µF, step Vin from VIH to VIL; Output Slew Rate measured from VPwr – 3.0 V to 2.0 V (see Figure 2).
4
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
MC33143
Freescale Semiconductor,
Inc.
Figure 2. Output Response Waveform
5.0 V
IN1–2
50%
0V
tdlh
VPwr
tdhl
VPwr – 3.0 V
OUT1–2
0V
2.0 V
Freescale Semiconductor, Inc...
tSRr
tSRf
PIN FUNCTION DESCRIPTION
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Pin
1, 12
2
3, 10
4, 9, 16,
21
Symbol
Description
IN1, IN2
INput 1 and INput 2 (IN1 and IN2) respectively determine the state of the corresponding output drivers
(OUT1 and OUT2) under normal operating conditions. When an input is high, it’s corresponding output
is active ON, and when low is disabled OFF. IN1 and IN2 have internal active pull–downs which allow a
floating input pin to be conservatively interpreted as a logic low, turning Off the output. An unused input
should be connected to ground.
CEN
Chip Enable (CEN) input pin, when low, disables both outputs (OUT1 and OUT2) and places the device
in a “sleep mode” reducing the bias current required from VDD and VPwr. A falling edge of CEN causes
OUT1 and OUT2 to rapidly turn OFF. A falling edge of CEN should precede any VDD shutdown to allow
time OUT1 and OUT2 to be disabled. When CEN is low, INTerrupt (INT) and STATus 1 and 2 (STAT1–2)
will be tri–stated (high impedance). The CEN pin can also be used for power–on reset and under
voltage lockout to disable the outputs for power supply voltages less than 4.5 V. CEN is a dependent
input from the system microcontroller unit (MCU) or some other integrated circuit. It has an internal
pull–up resistor to VDD affording a floating pin to be interpreted as a logic high. Rpull–up is greater than
50 kΩ. If used externally, this pin should be connected to VDD.
STAT1. STAT2
The STATus pins (STAT1–2) respectively indicate the presence of faults on OUT1–2. STAT1–2 will be
logic high during normal operation. A logic low will occur whenever an Open Load, Short–to–Ground,
Short–to–Supply (Battery), Thermal Limit, or Overvoltage Shutdown fault condition is experienced on a
corresponding output. STAT1–2 are both active low digital drivers. A 10 kΩ resistor between STAT1–2
and the system CPU may improve a Failure Mode Evaluation Analysis (FMEA) score if STAT1–2 are
externally shorted to VPwr. If unused, this pin should be left connected.
VPwr
These pins are connected to the supply and provide load current to the DMOS outputs, are used
pumping the DMOS gates, and for Overvoltage shutdown detection of the DMOS. The DMOS outputs
will turn ON with 5.5 to 24 V applied to VPwr. VPwr is limited to –1.5 V for a maximum duration of
250 ms. A 10 nF de–coupling cap is recommended to be used from VPwr to Ground.
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
5, 6, 7, 8,
17, 18,
19, 20
Gnd
These eight pins constitute the circuits ground (Gnd) and also provide heatsinking for the DMOS output
transistors. Ground continuity is required for the outputs2 to turn ON.
11
VDD
This pin is to be connected to the 5.0 V logic supply of the system. A 10 nF de–coupling capacitor is
recommended from VDD to Gnd.
OUT1, OUT2
These pins are connected internally to the DMOS output transistors which source current into the
corresponding load. Each output incorporates dynamic clamping to accommodate inductive loads. In
addition, each output has independent short to ground detection and protection, current limit detection
and protection, thermal limit detection and protection, ON open load and or short to supply (battery)
detection. Neither output will turn ON if CEN is logic low. An unused output should be connected to a
10 kΩ load to prevent false fault reporting. A 1.0 nF filter capacitor may be used from OUT to Gnd to
provide dV/dt noise filtering.
13, 24
MOTOROLA ANALOG IC DEVICEFor
DATA
More Information On This Product,
Go to: www.freescale.com
5
MC33143
Freescale Semiconductor,
Inc.
PIN FUNCTION DESCRIPTION (continued)
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ
Freescale Semiconductor, Inc...
Pin
Symbol
Description
14
SFPD
This is a Short Fault Protect Disable (SFPD) input; which when logic high disables the internal current
limit timer preventing OUT1–2 from latching OFF when confronted with an overcurrent condition. The
condition of SFPD does not affect fault reporting. Current and thermal limit remain active when the
SFPD pin is logic high. Having the SFPD pin logic high facilitates the device to drive incandescent lamp
loads with peak in–rush currents in excess of three amperes. When SFPD is logic low, an overcurrent
demand will latch OFF only the output affected. The device will then automatically begin active
re–enabling of the corresponding output affected for the duration of the overcurrent condition. SFPD has
an internal active pull–down which affords a floating input pin condition to be conservatively interpreted
as a logic low. A 10 kΩ resistor between SFPD and the system CPU may improve the FMEA score if
SFPD is externally shorted to OUT2. SFPD should be connected to Gnd or VDD for the desired
operating mode and not be left “floating”.
15
GTST
The Gate TeST (GTST) pin is used to stress the devices DMOS gates during testing operations. This pin
should normally be connected to ground in the application.
23
INT
The INTerrupt pin INT is active logic low and indicates the presence of a fault on either the output. INT
can be paralleled with additional fault pins and used as a system CPU interrupt to indicate the presence
of a fault. The system CPU can then read STAT1–2 to determine the specific type of fault occurring. INT
will be logic high during normal operation. A logic low will result if a fault occurs on either OUT1 or
OUT2. INT has an internal active pull–up and requires no external pull–up resistor to be used. The INT
output has sufficient current drive capability to afford paralleling of up to five INT pins. A 10 kΩ resistor
between INT and the system CPU may improve the FMEA score if INT is externally shorted to OUT1.
This pin should be left unconnected if the feature is not used.
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
ÁÁÁÁÁÁÁ
ÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁ
ÁÁÁÁÁÁÁÁÁ
Figure 3. Function Table
In
Out
STAT
Normal
Device Condition
Low
High
Low
High
High
High
Normal OFF
Normal ON
Normal
Normal
Output to Gnd Short
Low
Low
High
Normal OFF
Normal
High
High/Low
Low
Output in active retry mode.
Normal ON when short is
removed.
Short fault reported. Fault
clears when short is removed.
Low
High
Low
Normal OFF
“OFF” open fault reported. Fault
clears when load is connected.
High
High
Low
Normal ON
“ON” open fault reported. Fault
clears when load is connected.
Low
High
Low
Normal OFF
“OFF” open fault reported. Fault
clears when short is removed.
HIgh
High
Low
Normal ON
“ON” open fault reported. Fault
clears when short is removed.
Low
Low
Low
Normal OFF
Thermal fault reported. Fault
clears with no thermal limit.
High
Low
Low
Output disabled. Output Retries
with no thermal limit.
Thermal fault reported. IN low
and no thermal limit required to
clear the fault.
Low
Low
Low
Normal OFF
Overvoltage fault reported.
Fault clears with no
overvoltage.
High
Low
Low
Output disabled. Will reset with
no overvoltage.
Overvoltage fault reported.
Fault clears with no
overvoltage.
Low
Low
High–Z
Output disabled.
STAT tri–stated, no faults
reported.
High
Low
High–Z
Output disabled.
STAT tri–stated, no faults
reported.
Open Load
Output to VPwr
Short
Over Temperature
VPwr Overvoltage
“Sleep”/Under
Voltage Mode,
CEN Low
6
Output Condition
STAT Condition
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
MC33143
Freescale Semiconductor,
Inc.
FUNCTIONAL DESCRIPTION
Freescale Semiconductor, Inc...
General
The MC33143 is designed as an interface device;
between system’s electronic control unit and the actuators. It
is designed to withstand several abnormal operating
conditions, with the capability of reporting it’s operating status
back to the control unit. The MC33143 will resume normal
operation after having experienced 60 V transients on the
VPwr line, output shorts to VPwr, open loads, output shorts to
ground, over current, over temperature, or overvoltage
conditions. Status information is available when ever a load
experiences any of the faults. In addition, the MC33143
device incorporates internal output transient clamps allowing
it to control inductive loads and survive negative voltage
spikes without the need of external components.
Power Supply Voltage Requirements
The MC33143 is designed to operate with 5.5 V to 26 V
applied to the power supply pin (VPwr) and 4.5 V to 5.5 V
applied to the logic supply pin (VDD). If VPwr is above the
specified Overvoltage Shutdown voltage limit (VPwr(ovsd))
the outputs will be disabled and the status line voltage will
transition to a low logic state indicating a fault.
When the CEN voltage is at a low logic state, OUT1 and
OUT2 will turn OFF. This provides an under voltage
shutdown for VPwr in the 0 to 4.5 V range. The active low
under voltage must be externally provided to the CEN pin.
The MC33143 is designed to survive the loss of VPwr.
Normal Operations
The MC33143 is considered to be operating normal when
the following conditions are met:
1) 5.5 V ≤ VPwr ≤ 26 V.
2) –40°C ≤ TJ ≤ 150°C.
3) When load currents (IO) exceed the Output Open “ON”
detection current (IO(on)) and occur within the Open
Sense “ON” time (tos(on)) window.
4) When load currents (IO) are less than the Output Limit
Current (IO(Lim)) for durations in excess of the Short
Sense time (tss).
5) So long as the output of the device is able to clamp
negative voltages produced when switching inductive
loads to the specified clamp voltage (VClamp).
Fault Conditions
Anytime the MC33143 is not operating normal it is said to
be operating in a “faulted condition”. Fault conditions will
result in level changes of the status outputs (STAT1–2) and
disable the affected faulted output.
Output Over Current/Short to Ground Faults
For an enabled input, the status line voltage will transition
to a low logic level if the output current equals or exceeds the
Output Limit current (IO(Lim)) for a period of time in excess of
the Short Sense time (tss). Only the affected output will turn
off; independent of the corresponding input’s condition. The
device incorporates an internal short duration Refresh timer
(tref) to mask edge transients due to switching noise. The
output will remain off for the short tref duration and then
attempt to re–energize the shorted load. The internal
protection circuitry continues to be active during this
process. If the short is not removed; the circuitry will
sequence and the output will remain off for a another tref
time. This process will continue so long as the output
remains shorted and the input remains in a logic high state. If
the short is removed from the output, while the input is ON,
the MC33143 will return to normal operation and the status
line will go to a logic high state after the tref time–out. The
status line will also go to a logic high state on the falling edge
of the corresponding input.
Open Load/Short to VPwr Fault
This condition is commonly referred to as an “ON” open
fault. For this fault to be present, the output current of the
driver must be at or near zero. Since the MC33143 is a
“high–side switch”; It is for this reason a Short to VPwr fault
resembles an Open Load fault, in so far as the MC33143 is
concerned. When this fault is present the status line voltage
will transition to a low logic level so long as the output current
does not exceed the specified Open ON detection current
(IO(on)) for a duration in excess of the specified Open Sense
ON time (tos(on)). If the open load or output short to VPwr
condition is removed, and the corresponding input is at a
logic high state, the status line voltage will go to a logic high
state after the drain current has exceeded IO(on). The ON
open fault detection circuit incorporates a voltage comparator
which monitors the voltage difference from VPwr to OUT.
When ever the VPwr to OUT voltage difference falls below
10 mV an ON Open fault is reported. A Short to VPwr external
to any module the MC33143 is in will not be detected as an
ON Open fault if the voltage difference from VPwr to OUT is
greater than 10 mV. VPwr line voltage drops directly impact
this detection ability.
Overvoltage Fault
When this fault is present the status line voltage will
transition to a logic low state when VPwr exceeds the specified
Overvoltage Shutdown threshold VPwr(ovsd). This fault
produces a “global” response on the part of the MC33143 by
turning OFF both outputs independent of input conditions.
The outputs will resume normal operation when VPwr drops
the specified Overvoltage Hysteresis VPwr(hys) value.
Over Temperature Fault
When this fault is present the status line voltage transitions
to a low logic level when the junction temperature of either
output exceeds the specified Thermal Limit threshold (TLim).
Only the specific faulted output will shutdown independent of
the input condition. The other output will continue to operate
in a normal fashion unless it also becomes faulted. The
thermally faulted output will resume normal operation when
the junction temperature drops the specified Over
Temperature Shutdown Hysteresis (TLim(hys)) amount.
MOTOROLA ANALOG IC DEVICEFor
DATA
More Information On This Product,
Go to: www.freescale.com
7
MC33143
Freescale Semiconductor,
Inc.
OUTLINE DIMENSIONS
DW SUFFIX
PLASTIC PACKAGE
CASE 751E–04
(SOP (16+4+4)L)
ISSUE E
–A–
24
–B–
12X
P
0.010 (0.25)
1
Freescale Semiconductor, Inc...
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
13
M
B
M
12
24X
D
J
0.010 (0.25)
M
T A
S
B
S
F
R
X 45 _
C
–T–
SEATING
PLANE
M
22X
G
K
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
15.25
15.54
7.40
7.60
2.35
2.65
0.35
0.49
0.41
0.90
1.27 BSC
0.23
0.32
0.13
0.29
0_
8_
10.05
10.55
0.25
0.75
INCHES
MIN
MAX
0.601
0.612
0.292
0.299
0.093
0.104
0.014
0.019
0.016
0.035
0.050 BSC
0.009
0.013
0.005
0.011
0_
8_
0.395
0.415
0.010
0.029
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
How to reach us:
USA / EUROPE / Locations Not Listed: Motorola Literature Distribution;
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
1 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
8
◊
MOTOROLA ANALOG IC DEVICE DATA
For More Information On This Product,
Go to: www.freescale.com
*MC33143/D*
MC33143/D
工商网监
湘ICP备2023018690号
