Document Number: MD7IC21100N
Rev. 2, 2/2012
Freescale Semiconductor
Technical Data
RF LDMOS Wideband Integrated
Power Amplifiers
The MD7IC21100N wideband integrated circuit is designed with on--chip
matching that makes it usable from 2110 to 2170 MHz. This multi--stage
structure is rated for 24 to 32 Volt operation and covers all typical cellular base
station modulation formats including TD--SCDMA.
• Typical Single--Carrier W--CDMA Performance: VDD = 28 Volts, IDQ1A +
IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA, Pout = 32 Watts Avg.,
f = 2167.5 MHz, IQ Magnitude Clipping, Channel Bandwidth = 3.84 MHz,
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF.
Power Gain — 28.5 dB
Power Added Efficiency — 30%
Device Output Signal PAR — 6.1 dB @ 0.01% Probability on CCDF
ACPR @ 5 MHz Offset — --38 dBc in 3.84 MHz Channel Bandwidth
• Capable of Handling 5:1 VSWR, @ 32 Vdc, 2140 MHz, Pout = 110 Watts CW
(3 dB Input Overdrive from Rated Pout)
• Stable into a 5:1 VSWR. All Spurs Below --60 dBc @ 1 mW to 100 Watts CW
Pout.
• Typical Pout @ 1 dB Compression Point ≃ 110 Watts CW
Features
• 100% PAR Tested for Guaranteed Output Power Capability
• Characterized with Series Equivalent Large--Signal Impedance Parameters
and Common Source S-Parameters
• On--Chip Matching (50 Ohm Input, on a per side basis, DC Blocked)
• Internally Matched for Ease of Use
• Integrated Quiescent Current Temperature Compensation with
Enable/Disable Function (1)
• Integrated ESD Protection
• 225°C Capable Plastic Package
• In Tape and Reel. R1 Suffix = 500 Units, 44 mm Tape Width, 13 inch Reel.
VDS1A
RFinA
VGS1A
VGS2A
VGS1B
VGS2B
RFout1/VDS2A
Quiescent Current
Temperature Compensation (1)
Quiescent Current
Temperature Compensation (1)
RFinB
RFout2/VDS2B
VDS1B
Figure 1. Functional Block Diagram
MD7IC21100NR1
MD7IC21100GNR1
MD7IC21100NBR1
2110--2170 MHz, 32 W AVG., 28 V
SINGLE W--CDMA
RF LDMOS WIDEBAND
INTEGRATED POWER AMPLIFIERS
CASE 1618--02
TO--270 WB--14
PLASTIC
MD7IC21100NR1
CASE 1621--02
TO--270 WB--14 GULL
PLASTIC
MD7IC21100GNR1
CASE 1617--02
TO--272 WB--14
PLASTIC
MD7IC21100NBR1
VDS1A
VGS2A
VGS1A
NC
RFinA
NC
NC
RFinB
NC
VGS1B
VGS2B
VDS1B
1
2
3
4
5
6
7
8
9
10
11
12
14
13
RFout1/VDS2A
RFout2/VDS2B
(Top View)
Note: Exposed backside of the package is
the source terminal for the transistors.
Figure 2. Pin Connections
1. Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or AN1987.
© Freescale Semiconductor, Inc., 2008, 2011--2012. All rights reserved.
RF Device Data
Freescale Semiconductor, Inc.
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
1
Table 1. Maximum Ratings
Symbol
Value
Unit
Drain--Source Voltage
Rating
VDSS
--0.5, +65
Vdc
Gate--Source Voltage
VGS
--0.5, +6.0
Vdc
Operating Voltage
VDD
32, +0
Vdc
Storage Temperature Range
Tstg
--65 to +150
°C
Case Operating Temperature
TC
150
°C
Operating Junction Temperature (1,2)
TJ
225
°C
Input Power
Pin
29
dBm
Symbol
Value (2,3)
Unit
Table 2. Thermal Characteristics
Characteristic
Thermal Resistance, Junction to Case
(Case Temperature 76°C, 32 W CW)
(Case Temperature 76°C, 32 W CW)
RθJC
°C/W
Stage 1, 28 Vdc, IDQ1A + IDQ1B = 190 mA
Stage 2, 28 Vdc, IDQ2A + IDQ2B = 925 mA
2.7
0.7
Table 3. ESD Protection Characteristics
Test Methodology
Class
Human Body Model (per JESD22--A114)
0
Machine Model (per EIA/JESD22--A115)
A
Charge Device Model (per JESD22--C101)
III
Table 4. Moisture Sensitivity Level
Test Methodology
Per JESD22--A113, IPC/JEDEC J--STD--020
Rating
Package Peak Temperature
Unit
3
260
°C
Table 5. Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
μAdc
Gate--Source Leakage Current
(VGS = 1.5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
μAdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 50 μAdc)
VGS(th)
1
2
3
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, IDQ1A + IDQ1B = 190 mAdc)
VGS(Q)
—
2.9
—
Vdc
Fixture Gate Quiescent Voltage
(VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mAdc, Measured in Functional Test)
VGG(Q)
5.5
6.3
7
Vdc
Characteristic
Stage 1 — Off Characteristics
(4)
Stage 1 — On Characteristics (4)
1. Continuous use at maximum temperature will affect MTTF.
2. MTTF calculator available at http://www.freescale.com/rf. Select Software & Tools/Development Tools/Calculators to access MTTF
calculators by product.
3. Refer to AN1955, Thermal Measurement Methodology of RF Power Amplifiers. Go to http://www.freescale.com/rf.
Select Documentation/Application Notes -- AN1955.
4. Each side of device measured separately.
(continued)
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
2
RF Device Data
Freescale Semiconductor, Inc.
Table 5. Electrical Characteristics (TA = 25°C unless otherwise noted) (continued)
Symbol
Min
Typ
Max
Unit
Zero Gate Voltage Drain Leakage Current
(VDS = 65 Vdc, VGS = 0 Vdc)
IDSS
—
—
10
μAdc
Zero Gate Voltage Drain Leakage Current
(VDS = 28 Vdc, VGS = 0 Vdc)
IDSS
—
—
1
μAdc
Gate--Source Leakage Current
(VGS = 1.5 Vdc, VDS = 0 Vdc)
IGSS
—
—
1
μAdc
Gate Threshold Voltage
(VDS = 10 Vdc, ID = 270 μAdc)
VGS(th)
1
2
3
Vdc
Gate Quiescent Voltage
(VDS = 28 Vdc, IDQ2A + IDQ2B = 925 mAdc)
VGS(Q)
—
2.8
—
Vdc
Fixture Gate Quiescent Voltage
(VDD = 28 Vdc, IDQ2A + IDQ2B = 925 mAdc, Measured in Functional Test)
VGG(Q)
5.3
5.9
6.8
Vdc
Drain--Source On--Voltage
(VGS = 10 Vdc, ID = 1 Adc)
VDS(on)
0.1
0.3
0.8
Vdc
Coss
—
380
—
pF
Characteristic
Stage 2 — Off Characteristics (1)
Stage 2 — On Characteristics (1)
Stage 2 — Dynamic Characteristics (1,2)
Output Capacitance
(VDS = 28 Vdc ± 30 mV(rms)ac @ 1 MHz, VGS = 0 Vdc)
Functional Tests (3) (In Freescale Wideband 2110--2170 MHz Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A +
IDQ2B = 925 mA, Pout = 32 W Avg., f = 2167.5 MHz, Single--Carrier W--CDMA, IQ Magnitude Clipping, Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF. ACPR measured in 3.84 MHz Channel Bandwidth @ ±5 MHz Offset.
Power Gain
Gps
27
28.5
32
dB
Power Added Efficiency
PAE
27
30
—
%
Output Peak--to--Average Ratio @ 0.01% Probability on CCDF
PAR
5.6
6.1
—
dB
ACPR
—
--38
--36
dBc
IRL
—
--15
--9
dB
Adjacent Channel Power Ratio
Input Return Loss
Typical Performances (3) (In Freescale Test Fixture, 50 ohm system) VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA,
2110--2170 MHz Bandwidth
Pout @ 1 dB Compression Point, CW
P1dB
—
110
—
—
50
—
W
IMD Symmetry @ 112 W PEP, Pout where IMD Third Order
Intermodulation 30 dBc (Delta IMD Third Order Intermodulation
between Upper and Lower Sidebands > 2 dB)
IMDsym
VBW Resonance Point
(IMD Third Order Intermodulation Inflection Point)
VBWres
—
50
—
MHz
GF
—
0.3
—
dB
∆IQT
—
±3
—
%
Φ
—
0.6
—
°
Delay
—
2.6
—
ns
Part--to--Part Insertion Phase Variation @ Pout = 110 W CW,
f = 2140 MHz, Six Sigma Window
∆Φ
—
35
—
°
Gain Variation over Temperature (--30°C to +85°C)
∆G
—
0.042
—
dB/°C
∆P1dB
—
0.003
—
dB/°C
Gain Flatness in 60 MHz Bandwidth @ Pout = 32 W Avg.
Quiescent Current Accuracy over Temperature
with 4.7 kΩ Gate Feed Resistors (--30 to 85°C) (4)
Average Deviation from Linear Phase in 60 MHz Bandwidth
@ Pout = 110 W CW
Average Group Delay @ Pout = 110 W CW, f = 2140 MHz
Output Power Variation over Temperature (--30°C to +85°C)
1.
2.
3.
4.
MHz
Each side of device measured separately.
Part internally matched both on input and output.
Measurement made with device in a single--ended configuration.
Refer to AN1977, Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family and to AN1987, Quiescent Current Control
for the RF Integrated Circuit Device Family. Go to http://www.freescale.com/rf. Select Documentation/Application Notes -- AN1977 or AN1987.
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
Freescale Semiconductor, Inc.
3
C1
R6
2
R2
VGG1
DUT
1
R1
VGG2
RF
INPUT
VDD2
C7
VDD1
3
4 NC
Z2
Z3
6 NC
7 NC
VGG2
R3
9 NC
10
R4
11
C3
C18
C4
Z4
Z5
Z6
Z7
RF
OUTPUT
C11
8
VGG1
C16
Z8
14
5
Z1
C9
Quiescent Current
Temperature Compensation
C14
13
Quiescent Current
Temperature Compensation
Z9
C12
C13
C15
12
VDD1
R5
C10
C8
C17
C19
C5
C6
C2
Z1
Z2
Z3
Z4
Z5
0.066″ x 2.193″ Microstrip
0.141″ x 0.126″ Microstrip
0.628″ x 0.045″ Microstrip
0.628″ x 0.340″ Microstrip
0.066″ x 0.581″ Microstrip
Z6
Z7
Z8, Z9
PCB
0.066″ x 0.821″ Microstrip
0.066″ x 0.533″ Microstrip
0.080″ x 0.902″ Microstrip
Rogers RO4350B, 0.030″, εr = 3.5
Figure 3. MD7IC21100NR1(GNR1)(NBR1) Test Circuit Schematic
Table 6. MW7IC2220NR1(GNR1)(NBR1) Test Circuit Component Designations and Values
Part
Description
Part Number
Manufacturer
C1, C2, C3, C4, C5, C6
10 μF, 50 V Chip Capacitors
GRM55DR61H106KA88B
Murata
C7, C8, C9, C10
5.1 pF Chip Capacitors
ATC100B5R1CT500XT
ATC
C11
10 pF Chip Capacitor
ATC100B100JT500XT
ATC
C12, C13, C14
1.2 pF Chip Capacitors
ATC100B1R2CT500XT
ATC
C15
0.5 pF Chip Capacitor
ATC100B0R5CT500XT
ATC
C16, C17
0.1 μF, 100 V Chip Capacitors
GRM32NR72A104KA01B
Murata
C18, C19
1 μF, 100 V Chip Capacitors
GRM32EER72A105KA01L
Murata
R1, R2, R3, R4
4.7 kΩ, 1/4 W Chip Resistors
CRCW12064701FKEA
Vishay
R5, R6
2 Ω,1/2 W Chip Resistors
CRCW12102R00FKEA
Vishay
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
4
RF Device Data
Freescale Semiconductor, Inc.
R6
C3
C18
VGG2
VGG1
C1
VDD1
R1
C7
C9
R2
C16
C4
C11
CUT OUT AREA
C12
C15
MD7IC21100N
Rev. 2
VGG1
C13
C5
R3
C17
C8
VGG2
R4
C14
C2
R5
C10
C19
C6
Figure 4. MD7IC21100NR1(GNR1)(NBR1) Test Circuit Component Layout
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
Freescale Semiconductor, Inc.
5
28.8
28.4
30
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF
28
Gps
29
27
28
--37
--10
27.6
--38
--13
ACPR
27.2
--39
26.8
--40
PARC
26.4
--41
IRL
26
2060
2080
2100
2120
2140
2160
2180
ACPR (dBc)
Gps, POWER GAIN (dB)
29.2
ηD
--42
2220
2200
--16
--19
--22
--25
--1
--1.2
--1.4
--1.6
PARC (dB)
29.6
31
VDD = 28 Vdc, Pout = 32 W (Avg.), IDQ1A + IDQ1B = 190 mA
IDQ2A + IDQ2B = 925 mA, Single--Carrier W--CDMA
3.84 MHz Channel Bandwidth
IRL, INPUT RETURN LOSS (dB)
30
ηD, DRAIN
EFFICIENCY (%)
TYPICAL CHARACTERISTICS
--1.8
--2
f, FREQUENCY (MHz)
Figure 5. Output Peak--to--Average Ratio Compression (PARC)
versus Broadband Performance @ Pout = 32 Watts Avg.
30
32
IDQ2A + IDQ2B = 1388 mA
IDQ1A + IDQ1B = 285 mA
30
925 mA
Gps, POWER GAIN (dB)
Gps, POWER GAIN (dB)
29 1156 mA
28
694 mA
27
463 mA
26
25
1
VDD = 28 Vdc
IDQ1A + IDQ1B = 190 mA
f = 2140 MHz
10
28
26
24
190 mA
143 mA
95 mA
VDD = 28 Vdc
IDQ2A + IDQ2B = 925 mA
f = 2140 MHz
22
1
300
100
238 mA
10
100
Pout, OUTPUT POWER (WATTS) CW
Pout, OUTPUT POWER (WATTS) CW
Figure 6. Power Gain versus Output Power
@ IDQ1A + IDQ1B = 190 mA
Figure 7. Power Gain versus Output Power
@ IDQ2A + IDQ2B = 925 mA
300
IMD, INTERMODULATION DISTORTION (dBc)
--10
VDD = 28 Vdc, Pout = 112 W (PEP), IDQ1A + IDQ1B = 190 mA
IDQ2A + IDQ2B = 925 mA, Two--Tone Measurements
--20 (f1+f2)/2 = Center Frequency of 2140 MHz
IM3--U
--30
IM3--L
IM5--L
IM5--U
--40
IM7--U
--50
IM7--L
--60
1
10
100
TWO--TONE SPACING (MHz)
Figure 8. Intermodulation Distortion Products
versus Tone Spacing
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
6
RF Device Data
Freescale Semiconductor, Inc.
TYPICAL CHARACTERISTICS
Gps, POWER GAIN (dB)
28.5
28
27.5
27
26.5
OUTPUT COMPRESSION AT 0.01%
PROBABILITY ON CCDF (dB)
--1 dB = 28.79 W
26
ηD
0
45
--20
40
--25
ACPR
--1
--2
35
--2 dB = 38.93 W
--3 dB = 52.51 W
--3
VDD = 28 Vdc
IDQ1A + IDQ1B = 190 mA
IDQ2A + IDQ2B = 925 mA, f = 2140 MHz
--4
Single--Carrier W--CDMA, 3.84 MHz Channel Bandwidth
Input Signal PAR = 7.5 dB @ 0.01% Probability on CCDF
--5
15
30
75
45
60
30
Gps
25
PARC
--30
--35
ACPR (dBc)
1
ηD, DRAIN EFFICIENCY (%)
29
--40
20
--45
15
--50
90
Pout, OUTPUT POWER (WATTS)
Figure 9. Output Peak--to--Average Ratio
Compression (PARC) versus Output Power
85°C
25
20
ACPR
10
20
ηD
15
1
10
100
0
--10
0
200
--20
--30
--40
ACPR (dBc)
60
VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA
f = 2140 MHz, Single--Carrier W--CDMA
25°C 50
40
3.84 MHz Channel Bandwidth, Input Signal
--30°C
85°C
PAR = 7.5 dB @ 0.01% Probability on CCDF
35
40
Gps
TC = --30°C
25°C
30
25°C
--30°C 30
ηD, DRAIN EFFICIENCY (%)
Gps, POWER GAIN (dB)
45
--50
--60
Pout, OUTPUT POWER (WATTS) AVG.
Figure 10. Single--Carrier W--CDMA Power Gain, Drain
Efficiency and ACPR versus Output Power
0
30
Gain
--5
20
--10
15
--15
10
5
IRL
IRL (dB)
GAIN (dB)
25
--20
VDD = 28 Vdc
Pout = 19 dBm
IDQ1A + IDQ1B = 190 mA
IDQ2A + IDQ2B = 925 mA
--25
0
--30
1650 1750 1850 1950 2050 2150 2250 2350 2450 2550 2650
f, FREQUENCY (MHz)
Figure 11. Broadband Frequency Response
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
Freescale Semiconductor, Inc.
7
W--CDMA TEST SIGNAL
100
10
0
--10
Input Signal
--30
0.1
0.01
W--CDMA. ACPR Measured in 3.84 MHz
Channel Bandwidth @ ±5 MHz Offset.
Input Signal PAR = 7.5 dB @ 0.01%
Probability on CCDF
0.001
0.0001
3.84 MHz
Channel BW
--20
1
(dB)
PROBABILITY (%)
10
0
1
2
3
4
5
6
--40
--50
--60
+ACPR in 3.84 MHz
Integrated BW
--ACPR in 3.84 MHz
Integrated BW
--70
--80
7
8
9
PEAK--TO--AVERAGE (dB)
Figure 12. CCDF W--CDMA IQ Magnitude
Clipping, Single--Carrier Test Signal
10
--90
--100
--9
--7.2 --5.4
--3.6 --1.8
0
1.8
3.6
5.4
7.2
9
f, FREQUENCY (MHz)
Figure 13. Single--Carrier W--CDMA Spectrum
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
8
RF Device Data
Freescale Semiconductor, Inc.
f = 2220 MHz
Zload
f = 2060 MHz
f = 2060 MHz
Zsource
f = 2220 MHz
Zo = 50 Ω
VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA, Pout = 32 W Avg.
f
MHz
Zsource (1)
Ω
Zload
Ω
2060
40.60 -- j16.80
1.99 -- j2.90
2080
40.51 -- j16.95
1.90 -- j2.74
2100
40.42 -- j17.10
1.82 -- j2.58
2120
40.32 -- j17.26
1.75 -- j2.41
2140
40.21 -- j17.42
1.68 -- j2.24
2160
40.10 -- j17.58
1.62 -- j2.08
2180
39.97 -- j17.75
1.55 -- j1.92
2200
39.84 -- j17.91
1.48 -- j1.77
2220
39.70 -- j18.08
1.41 -- j1.60
(1) Both 50 Ω inputs in parallel as per the product test fixture.
Zsource = Test circuit impedance as measured from
gate to ground.
Zload
= Test circuit impedance as measured
from drain to ground.
Output
Matching
Network
Device
Under
Test
Input
Matching
Network
Z
source
Z
load
Figure 14. Series Equivalent Source and Load Impedance
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
Freescale Semiconductor, Inc.
9
ALTERNATIVE PEAK TUNE LOAD PULL CHARACTERISTICS
56
Pout, OUTPUT POWER (dBm)
55
Pout, OUTPUT POWER (dBm)
P3dB = 52.51 dBm (178 W)
55
56
Ideal
54
53
P1dB = 51.87 dBm (154 W)
52
Actual
51
50
VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA
IDQ2A + IDQ2B = 925 mA, Pulsed CW, 10 μsec(on)
10% Duty Cycle, f = 2110 MHz
49
48
19
20
21
22
23
24
25
26
27
54
53
P1dB = 51.94 dBm (156 W)
52
Actual
51
50
49
VDD = 28 Vdc, IDQ1A + IDQ1B = 190 mA
IDQ2A + IDQ2B = 925 mA, Pulsed CW, 10 μsec(on)
10% Duty Cycle, f = 2170 MHz
48
28
47
18
19
20
21
22
23
24
25
26
27
28
Pin, INPUT POWER (dBm)
Pin, INPUT POWER (dBm)
NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V
NOTE: Load Pull Test Fixture Tuned for Peak P1dB Output Power @ 28 V
Test Impedances per Compression Level
Test Impedances per Compression Level
P1dB
Ideal
P3dB = 52.59 dBm (182 W)
Zsource
Ω
Zload
Ω
48.64 -- j0.94
1.02 -- j3.36
Figure 15. Pulsed CW Output Power
versus Input Power @ 28 V @ 2110 MHz
P1dB
Zsource
Ω
Zload
Ω
51.04 + j0.32
0.92 -- j3.48
Figure 16. Pulsed CW Output Power
versus Input Power @ 28 V @ 2170 MHz
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
10
RF Device Data
Freescale Semiconductor, Inc.
Table 7. Common Source S--Parameters (VDD = 28 V, IDQ1A + IDQ1B = 190 mA, IDQ2A + IDQ2B = 925 mA, TA = 25°C, 50 Ohm System)
S11
S21
S12
S22
f
MHz
|S11|
∠φ
|S21|
∠φ
|S12|
∠φ
|S22|
∠φ
1700
0.652
137.6
2.264
127.9
0.000338
110.1
0.986
170.7
1750
0.584
141.8
6.373
105.7
0.00176
--161.5
0.962
166.0
1800
0.967
149.5
22.975
30.1
0.00809
148.5
0.633
163.7
1850
0.830
109.6
14.760
--54.3
0.00544
88.8
0.872
--179.3
1900
0.609
93.0
12.528
--81.7
0.00445
92.7
0.891
175.2
1950
0.376
73.2
12.727
--115.4
0.00571
97.8
0.848
172.6
2000
0.159
50.5
11.639
--142.6
0.00781
75.0
0.785
177.3
2050
0.093
--129.9
11.706
--174.5
0.00711
50.8
0.863
--178.8
2100
0.200
--148.4
10.735
159.4
0.00593
37.7
0.921
179.9
2150
0.304
--156.5
9.872
135.1
0.00461
28.3
0.950
177.7
2200
0.386
--169.3
8.929
113.7
0.00366
28.3
0.958
176.2
2250
0.432
178.3
8.421
94.5
0.00304
33.7
0.960
175.5
2300
0.459
163.6
8.238
75.8
0.00281
41.0
0.962
175.2
2350
0.406
145.8
9.041
52.8
0.00253
46.3
0.963
175.5
2400
0.334
134.7
8.312
21.8
0.00255
54.7
0.971
175.7
2450
0.238
120.3
7.167
--5.1
0.00262
60.5
0.977
175.8
2500
0.133
110.4
5.879
--28.8
0.00270
65.2
0.981
175.8
2550
0.020
149.0
4.788
--50.7
0.00304
66.7
0.982
175.8
2600
0.102
--116.2
3.837
--70.6
0.00319
68.5
0.982
175.7
2650
0.204
--121.9
3.053
--89.3
0.00356
67.3
0.982
175.5
2700
0.280
--129.7
2.415
--105.9
0.00369
66.9
0.981
175.2
2750
0.342
--135.1
1.931
--121.3
0.00397
66.4
0.981
174.7
2800
0.392
--138.0
1.551
--135.6
0.00446
67.5
0.979
174.0
2850
0.455
--140.7
1.231
--148.0
0.00466
57.7
0.980
173.3
2900
0.503
--145.9
1.016
--160.1
0.00445
52.3
0.980
172.6
2950
0.531
--147.9
0.831
--172.2
0.00434
53.4
0.980
171.8
3000
0.566
--148.9
0.677
176.6
0.00437
54.8
0.981
171.1
3050
0.601
--149.7
0.550
166.3
0.00453
56.6
0.982
170.4
3100
0.634
--150.5
0.449
156.9
0.00486
57.6
0.982
170.0
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
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PACKAGE DIMENSIONS
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PRODUCT DOCUMENTATION AND SOFTWARE
Refer to the following documents and software to aid your design process.
Application Notes
• AN1907: Solder Reflow Attach Method for High Power RF Devices in Over--Molded Plastic Packages
• AN1955: Thermal Measurement Methodology of RF Power Amplifiers
• AN1977: Quiescent Current Thermal Tracking Circuit in the RF Integrated Circuit Family
• AN1987: Quiescent Current Control for the RF Integrated Circuit Device Family
• AN3263: Bolt Down Mounting Method for High Power RF Transistors and RFICs in Over--Molded Plastic Packages
• AN3789: Clamping of High Power RF Transistors and RFICs in Over--Molded Plastic Packages
Engineering Bulletins
• EB212: Using Data Sheet Impedances for RF LDMOS Devices
Software
• Electromigration MTTF Calculator
• RF High Power Model
For Software, do a Part Number search at http://www.freescale.com, and select the “Part Number” link. Go to the Software &
Tools tab on the part’s Product Summary page to download the respective tool.
REVISION HISTORY
The following table summarizes revisions to this document.
Revision
Date
Description
0
Oct. 2008
• Initial Release of Data Sheet
1
June 2011
• Changed ESD Human Body Model rating from Class 1C to Class 0 to reflect recent ESD test results of the
device, p. 2
• Fig. 13, MTTF versus Junction Temperature removed, p. 8. Refer to the device’s MTTF Calculator
available at freescale.com/RFpower. Go to Design Resources > Software and Tools.
• Fig. 14, CCDF W--CDMA IQ Magnitude Clipping, Single--Carrier Test Signal and Fig. 15, Single--Carrier
W--CDMA Spectrum updated to show the undistorted input test signal, p. 8 (renumbered as Fig. 13 and
Fig. 14 after Fig. 13 removed)
• Added AN3789, Clamping of High Power RF Transistors and RFICs in Over--Molded Plastic Packages to
Product Documentation, Application Notes, p. 21
• Added Electromigration MTTF Calculator and RF High Power Model availability to Product Software,
p. 21
2
Feb. 2012
• Table 3, ESD Protection Characteristics, removed the word “Minimum” after the ESD class rating. ESD
ratings are characterized during new product development but are not 100% tested during production. ESD
ratings provided in the data sheet are intended to be used as a guideline when handling ESD sensitive
devices, p. 2
• Corrected bias conditions throughout the data sheet to reflect the true testing methodology.
Changed IDQ1A = IDQ1B = 190 mA to IDQ1A + IDQ1B = 190 mA and changed IDQ2A = IDQ2B = 925 mA to
IDQ2A + IDQ2B = 925 mA.
• Removed Fig. 5, Possible Circuit Topologies, and renumbered all subsequent figures, p. 5--10
MD7IC21100NR1 MD7IC21100GNR1 MD7IC21100NBR1
RF Device Data
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