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PBRN113ZT

PBRN113ZT

  • 厂商:

    NXP(恩智浦)

  • 封装:

  • 描述:

    PBRN113ZT - NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ - NXP Semiconductors

  • 数据手册
  • 价格&库存
PBRN113ZT 数据手册
PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ Rev. 01 — 26 February 2007 Product data sheet 1. Product profile 1.1 General description 800 mA NPN low VCEsat Breakthrough In Small Signal (BISS) Resistor-Equipped Transistors (RET) family in small plastic packages. Table 1. Product overview Package NXP PBRN113ZK PBRN113ZS[1] PBRN113ZT [1] Type number JEITA SC-59A SC-43A - JEDEC TO-236 TO-92 TO-236AB SOT346 SOT54 SOT23 Also available in SOT54A and SOT54 variant packages (see Section 2). 1.2 Features I 800 mA output current capability I High current gain hFE I Built-in bias resistors I Simplifies circuit design I Low collector-emitter saturation voltage VCEsat I Reduces component count I Reduces pick and place costs I ±10 % resistor ratio tolerance 1.3 Applications I Digital application in automotive and industrial segments I Medium current peripheral driver I Switching loads 1.4 Quick reference data Table 2. Symbol VCEO IO Quick reference data Parameter collector-emitter voltage output current PBRN113ZK, PBRN113ZT PBRN113ZS Conditions open base [1] Min - Typ - Max 40 600 800 Unit V mA mA NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ Quick reference data …continued Parameter repetitive peak output current PBRN113ZK, PBRN113ZT tp ≤ 1 ms; δ ≤ 0.33 0.7 9 1 10 800 1.3 11 mA kΩ bias resistor 1 (input) bias resistor ratio Conditions Min Typ Max Unit Table 2. Symbol IORM R1 R2/R1 [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 2. Pinning information Table 3. Pin SOT54 1 2 3 input (base) output (collector) GND (emitter) R1 Pinning Description Simplified outline Symbol 2 1 2 3 001aab347 006aaa145 1 R2 3 SOT54A 1 2 3 input (base) output (collector) GND (emitter) R1 2 1 2 3 001aab348 006aaa145 1 R2 3 SOT54 variant 1 2 3 input (base) output (collector) GND (emitter) R1 2 1 2 3 001aab447 006aaa145 1 R2 3 SOT23; SOT346 1 2 3 input (base) GND (emitter) output (collector) 1 2 006aaa144 sym007 3 R1 3 1 R2 2 PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 2 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 3. Ordering information Table 4. Ordering information Package Name PBRN113ZK PBRN113ZS[1] PBRN113ZT [1] Type number Description plastic surface-mounted package; 3 leads Version SOT346 SC-59A SC-43A - plastic single-ended leaded (through hole) package; SOT54 3 leads plastic surface-mounted package; 3 leads SOT23 Also available in SOT54A and SOT54 variant packages (see Section 2 and Section 9). 4. Marking Table 5. Marking codes Marking code[1] G5 N113ZS *7L Type number PBRN113ZK PBRN113ZS PBRN113ZT [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO VI Parameter collector-base voltage collector-emitter voltage emitter-base voltage input voltage positive negative IO output current PBRN113ZK, PBRN113ZT PBRN113ZS IORM repetitive peak output current PBRN113ZK, PBRN113ZT tp ≤ 1 ms; δ ≤ 0.33 800 mA [1] [2][3] [1] Conditions open emitter open base open collector Min - Max 40 40 5 +10 −5 600 700 800 Unit V V V V V mA mA mA PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 3 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ Table 6. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Ptot Parameter total power dissipation PBRN113ZK, PBRN113ZT Conditions Tamb ≤ 25 °C [1] [2] [3] Min −65 −65 Max 250 370 570 700 150 +150 +150 Unit mW mW mW mW °C °C °C PBRN113ZS Tj Tamb Tstg [1] [2] [3] [1] junction temperature ambient temperature storage temperature Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. 600 (1) 006aaa998 Ptot (mW) 400 (2) (3) 200 0 −75 −25 25 75 125 175 Tamb (°C) (1) Ceramic PCB, Al2O3, standard footprint (2) FR4 PCB, mounting pad for collector 1 cm2 (3) FR4 PCB, standard footprint Fig 1. Power derating curves for SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236) PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 4 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 800 Ptot (mW) 600 006aaa999 400 200 0 −75 −25 25 75 125 175 Tamb (°C) FR4 PCB, standard footprint Fig 2. Power derating curve for SOT54 (SC-43A/TO-92) 6. Thermal characteristics Table 7. Symbol Rth(j-a) Thermal characteristics Parameter Conditions Min Typ Max Unit thermal resistance from junction in free air to ambient PBRN113ZK, PBRN113ZT [1] [2] [3] - - 500 338 219 179 K/W K/W K/W K/W PBRN113ZS Rth(j-sp) thermal resistance from junction to solder point PBRN113ZK, PBRN113ZT [1] [2] [3] [1] - - 105 K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. Device mounted on an FR4 PCB, single-sided copper, tin-plated, mounting pad for collector 1 cm2. Device mounted on a ceramic PCB, Al2O3, standard footprint. PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 5 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 103 Zth(j-a) (K/W) 102 δ=1 0.50 0.33 0.20 0.10 0.05 10 0.02 0.01 0.75 006aab000 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, standard footprint Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236); typical values 103 Zth(j-a) (K/W) 102 δ=1 0.50 0.33 0.20 0.10 0.05 10 0.02 0.01 0 006aab001 0.75 1 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 FR4 PCB, mounting pad for collector 1 cm2 Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236); typical values PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 6 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 103 Zth(j-a) (K/W) 102 006aab002 δ=1 0.50 0.75 0.33 0.20 0.10 10 0.05 0.02 0.01 1 0 10−1 10−5 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 Ceramic PCB, Al2O3, standard footprint Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT23 (TO-236AB) and SOT346 (SC-59A/TO-236); typical values 103 Zth(j-a) (K/W) δ=1 102 0.50 0.33 0.20 0.10 10 0.05 0.02 0.01 1 10−5 0 10−4 10−3 10−2 10−1 1 10 102 tp (s) 103 0.75 006aab003 FR4 PCB, standard footprint Fig 6. Transient thermal impedance from junction to ambient as a function of pulse duration for SOT54 (SC-43A/TO-92); typical values PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 7 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 7. Characteristics Table 8. Characteristics Tamb = 25 °C unless otherwise specified. Symbol ICBO ICEO IEBO hFE Parameter collector-base cut-off current collector-emitter cut-off current emitter-base cut-off current DC current gain Conditions VCB = 30 V; IE = 0 A VCE = 30 V; IB = 0 A VEB = 5 V; IC = 0 A VCE = 5 V; IC = 50 mA VCE = 5 V; IC = 300 mA VCE = 5 V; IC = 600 mA VCE = 5 V; IC = 800 mA VCEsat collector-emitter saturation voltage IC = 50 mA; IB = 2.5 mA IC = 200 mA; IB = 10 mA IC = 500 mA; IB = 10 mA IC = 600 mA; IB = 6 mA IC = 800 mA; IB = 8 mA VI(off) VI(on) R1 R2/R1 Cc off-state input voltage on-state input voltage bias resistor 1 (input) bias resistor ratio collector capacitance VCB = 10 V; IE = ie = 0 A; f = 1 MHz VCE = 5 V; IC = 100 µA VCE = 0.3 V; IC = 20 mA [1] [1] Min 300 500 500 450 0.3 0.4 0.7 9 - Typ 450 750 720 650 25 60 160 270 0.56 0.5 0.7 1 10 7 Max 100 0.5 0.8 35 85 220 550 1.15 1 1.4 1.3 11 - Unit nA µA mA [1] [1] mV mV mV mV V V V kΩ pF [1] [1] [1] Pulse test: tp ≤ 300 µs; δ ≤ 0.02. PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 8 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 104 hFE 103 (1) (2) (3) 006aab010 10−1 006aab011 VCEsat (V) (1) 102 10−2 (2) (3) 10 1 10−1 1 10 102 IC (mA) 103 10−3 1 10 102 IC (mA) 103 VCE = 5 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C Fig 7. DC current gain as a function of collector current; typical values 1 006aab012 Fig 8. Collector-emitter saturation voltage as a function of collector current; typical values 1 006aab013 VCEsat (V) VCEsat (V) 10−1 10−1 (1) (2) (1) (2) (3) (3) 10−2 1 10 102 IC (mA) 103 10−2 1 10 102 IC (mA) 103 IC/IB = 50 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C IC/IB = 100 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C Fig 9. Collector-emitter saturation voltage as a function of collector current; typical values Fig 10. Collector-emitter saturation voltage as a function of collector current; typical values PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 9 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 10 006aab014 10 006aab015 Vl(on) (V) Vl(off) (V) 1 (1) (2) (3) 1 (1) (2) (3) 10−1 10−1 1 10 102 IC (mA) 103 10−1 10−1 1 10 IC (mA) 102 VCE = 0.3 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C VCE = 5 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 11. On-state input voltage as a function of collector current; typical values Fig 12. Off-state input voltage as a function of collector current; typical values PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 10 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 8. Package outline 3.1 2.7 3 0.6 0.2 1.3 1.0 4.2 3.6 0.45 0.38 3.0 1.7 2.5 1.3 4.8 4.4 1 2 0.50 0.35 0.26 0.10 04-11-11 5.2 5.0 Dimensions in mm 14.5 12.7 0.48 0.40 1 2 2.54 3 1.27 1.9 Dimensions in mm 04-11-16 Fig 13. Package outline SOT346 (SC-59A/TO-236) Fig 14. Package outline SOT54 (SC-43A/TO-92) 0.45 0.38 4.2 3.6 1.27 4.2 3.6 0.45 0.38 0.48 0.40 1 3 max 2.5 max 1 0.48 0.40 2 2.54 3 1.27 4.8 4.4 2 5.08 2.54 3 5.2 5.0 14.5 12.7 04-06-28 5.2 5.0 Dimensions in mm 14.5 12.7 4.8 4.4 Dimensions in mm 05-01-10 Fig 15. Package outline SOT54A Fig 16. Package outline SOT54 variant 3.0 2.8 3 1.1 0.9 0.45 0.15 2.5 1.4 2.1 1.2 1 2 1.9 Dimensions in mm 0.48 0.38 0.15 0.09 04-11-04 Fig 17. Package outline SOT23 (TO-236AB) PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 11 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 9. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PBRN113ZK PBRN113ZS Package SOT346 SOT54 SOT54A Description 4 mm pitch, 8 mm tape and reel bulk, straight leads tape and reel, wide pitch tape ammopack, wide pitch SOT54 variant bulk, delta pinning PBRN113ZT [1] Packing quantity 3000 -115 -215 5000 -412 -112 10000 -135 -116 -126 -235 SOT23 4 mm pitch, 8 mm tape and reel For further information and the availability of packing methods, see Section 13. 10. Soldering 3.30 1.00 0.70 (3x) 0.60 (3x) 0.70 (3x) 3 3.15 1.55 0.95 1 2 0.95 3.40 1.20 2.60 2.90 solder lands solder paste solder resist occupied area sot346 Dimensions in mm Fig 18. Reflow soldering footprint SOT346 (SC-59A/TO-236) PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 12 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 4.70 2.80 solder lands solder resist occupied area Dimensions in mm 3 5.20 4.60 1.20 1 2 sot346 1.20 (2x) 3.40 preferred transport direction during soldering Fig 19. Wave soldering footprint SOT346 (SC-59A/TO-236) 2.90 2.50 0.85 3.00 0.85 1.30 2 1 solder lands 2.70 3 solder resist solder paste occupied area 0.60 (3x) Dimensions in mm 0.50 (3x) 0.60 (3x) 1.00 3.30 sot023 Fig 20. Reflow soldering footprint SOT23 (TO-236AB) PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 13 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 3.40 1.20 (2x) solder lands solder resist occupied area 2 1 3 4.60 4.00 1.20 Dimensions in mm 2.80 4.50 preferred transport direction during soldering sot023 Fig 21. Wave soldering footprint SOT23 (TO-236AB) PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 14 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 11. Revision history Table 10. Revision history Release date 20070226 Data sheet status Product data sheet Change notice Supersedes Document ID PBRN113Z_SER_1 PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 15 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 12. Legal information 12.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 12.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: salesaddresses@nxp.com PBRN113Z_SER_1 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 01 — 26 February 2007 16 of 17 NXP Semiconductors PBRN113Z series NPN 800 mA, 40 V BISS RETs; R1 = 1 kΩ, R2 = 10 kΩ 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics. . . . . . . . . . . . . . . . . . . 5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Packing information. . . . . . . . . . . . . . . . . . . . . 12 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 15 Legal information. . . . . . . . . . . . . . . . . . . . . . . 16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 16 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 26 February 2007 Document identifier: PBRN113Z_SER_1
PBRN113ZT 价格&库存

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