PCA9509P
2
Low power level translating I C-bus/SMBus repeater
Rev. 5.0 — 18 July 2022
1
Product data sheet
General description
2
The PCA9509P is a level translating I C-bus/SMBus repeater with two voltage supplies
2
that enables processor low voltage 2-wire serial bus to interface with standard I C-bus or
2
SMBus I/O. While retaining all the operating modes and features of the I C-bus system
2
during the level shifts, it also permits extension of the I C-bus by providing bidirectional
2
buffering for both the data (SDA) and the clock (SCL) lines, thus enabling the I C-bus
or SMBus maximum capacitance of 400 pF on the higher voltage side. Port A allows a
voltage range from 0.8 V to 2.0 V and is overvoltage tolerant. Port B allows a voltage
range from 2.3 V to 5.5 V and is overvoltage tolerant. Both port A and port B SDA and
SCL pins are high-impedance when the PCA9509P is unpowered.
The bus port B drivers are compliant with SMBus I/O levels, while port A uses an offset
LOW which prevents bus lock-up and allows the bidirectional nature of the device. The
output pull-down on the port A internal buffer LOW is set for approximately 0.2VCC(A),
while the input threshold of the internal buffer is set about 0.1VCC(A) lower than that of
the output voltage LOW. When the port A I/O is driven LOW internally, the LOW is not
recognized as a LOW by the input. This prevents a lock-up condition from occurring.
The output pull-down on the port B drives a hard LOW and the input level is set at 0.3
2
2
of SMBus or I C-bus voltage level which enables port B to connect to any other I C-bus
devices or buffer.
The PCA9509P drivers are not enabled unless VCC(A) is above 0.7 V and VCC(B) is above
1.7 V. The enable (EN) pin can also be used to turn on and turn off the drivers under
system control. Caution should be observed to change only the state of the EN pin when
the bus is idle.
NXP Semiconductors
2
PCA9509P
Low power level translating I C-bus/SMBus repeater
1.1 Selection recommendations
The PCA9509P should be used if an external A-port pull-up resistor is required to adjust
current for noise margin considerations or to reduce operating current consumption. See
Table 1 for comparison.
Table 1. Device selection recommendation
Concern
Recommended device
PCA9509
PCA9509P
1.0 V
0.85 V
yes — 1 mA
no — external pull-up
operating current
< 6.1 mA
< 0.95 mA
standby current EN = LOW
< 2 mA
< 22 μA max.
A-port — lowest voltage
[1]
A-port — current source
[2]
[1]
[2]
2
The PCA9509 current mirrors do not shut down when the device is disabled allowing instant turn-on, but at the cost
of the higher standby current. The PCA9509P current mirrors are turned off when disabled for lowest standby power
consumption, but sufficient delay (10 μs) after enable is needed before resuming operation.
Operating currents do not include the current consumed by the external pull-ups on B-port or the external pull-ups on the
A-port of the PCA9509P.
Features and benefits
• Bidirectional buffer isolates capacitance and allows 400 pF on port B of the device
• Voltage level translation from port A (0.8 V to 2.0 V) to port B (2.3 V to 5.5 V)
• No internal current source on A port to reduce current consumption for portable
applications
• Active HIGH enable input disables current mirrors to reduce standby power
• Open-drain inputs/outputs
• Lock-up free operation
• Supports arbitration and clock stretching across the repeater
2
• Accommodates Standard-mode and Fast-mode I C-bus devices and multiple
controllers
2
• Powered-off high-impedance I C-bus pins
• Operating supply voltage range of 0.8 V to 2.0 V on port A, 2.3 V to 5.5 V on port B
• All pins are 5 V tolerant with respect to ground pin
• 0 Hz to 400 kHz clock frequency
Remark: The maximum system operating frequency may be less than 400 kHz
because of the delays added by the repeater.
• ESD protection exceeds 2000 V HBM per JESD22-A114 and 1000 V CDM per
JESD22-C101
• Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
• Packages offered: TSSOP8, XQFN8
PCA9509P
Product data sheet
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2
PCA9509P
Low power level translating I C-bus/SMBus repeater
3
Ordering information
Table 2. Ordering information
Type number
Topside
mark
Package
Name
Description
Version
PCA9509PDP
9509P
TSSOP8
plastic thin shrink small outline package; 8 leads; body width 3 mm
SOT505-1
PCA950PGM
9PX
XQFN8
plastic, extremely thin quad flat package; no leads; 8 terminals; body SOT902-2
1.6 × 1.6 × 0.5 mm
[1]
[1]
‘X’ changes based on date code.
3.1 Ordering options
Table 3. Ordering options
Type number
Orderable part
number
Package
Packing method
PCA9509PDP
PCA9509PDP,118
TSSOP8
Reel 13" Q1/T1 *standard 2500
mark SMD
Tamb = -40 °C to +85 °C
PCA950PGM
PCA9509PGM,125
XQFN8
Reel 7" Q3/T4 *standard
mark
Tamb = -40 °C to +85 °C
4
Minimum
order quantity
4000
Temperature
Functional diagram
VCC(A)
VCC(B)
PCA9509P
A1
B1
A2
B2
EN
002aag171
GND
Figure 1. Functional diagram of PCA9509P
PCA9509P
Product data sheet
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2
PCA9509P
Low power level translating I C-bus/SMBus repeater
5
Pinning information
5.1 Pinning
PCA9509PGM
8
VCC(B)
2
7
B1
A2
3
6
B2
GND
4
5
EN
PCA9509PDP
A1
A2
8
1
7
B1
2
6
B2
3
5
EN
4
1
A1
VCC(A)
GND
VCC(A)
VCC(B)
terminal 1
index area
002aag174
Transparent top view
002aag172
Figure 2. Pin configuration for TSSOP8
Figure 3. Pin configuration for XQFN8
5.2 Pin description
Table 4. Pin description
Symbol
Pin
Description
VCC(A)
1
port A power supply
A1
[1]
2
port A (lower voltage side)
A2
[1]
3
port A (lower voltage side)
GND
4
ground (0 V)
EN
5
enable input (active HIGH)
B2
[1]
6
port B (SMBus/I C-bus side)
B1
[1]
7
port B (SMBus/I C-bus side)
8
port B power supply
VCC(B)
[1]
PCA9509P
Product data sheet
2
2
Port A and port B can be used for either SCL or SDA.
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2
PCA9509P
Low power level translating I C-bus/SMBus repeater
6
Functional description
Refer to Figure 1.
2
The PCA9509P enables I C-bus or SMBus translation down to VCC(A) as low as 0.8 V
without degradation of system performance. The PCA9509P contains 2 bidirectional
open-drain buffers specifically designed to support up-translation/down-translation
2
between the low voltage and 3.3 V SMBus or 5 V I C-bus. The port A and port B I/Os are
over-voltage tolerant to 5.5 V even when the device is unpowered.
The PCA9509P includes a power-up circuit that keeps the output drivers turned off until
VCC(B) is above 1.7 V and the VCC(A) is above 0.7 V. VCC(B) and VCC(A) can be applied
in any sequence at power-up. After power-up and with the EN pin HIGH, a LOW level
on port A (below approximately 0.15VCC(A)) turns on the corresponding port B driver
(either SDA or SCL) and drives port B down to about 0 V. When port A rises above
approximately 0.15VCC(A), the port B pull-down driver is turned off and the external pullup resistor pulls the pin HIGH. When port B falls first and goes below 0.3VCC(B), the port
A driver is turned on and port A pulls down to 0.2VCC(A) (typical). The port B pull-down
is not enabled unless the port A voltage goes below VIL. If the port A low voltage goes
below VIL, the port B pull-down driver is enabled until port A rises above approximately
0.15VCC(A) (VIL), then port B, if not externally driven LOW, rises, being pulled up by
the external pull-up resistor. When port B voltage rises above 50 % of VCC(B), port A
continues to rise being pulled up by external pull-up resistor.
Remark: Ground offset between the PCA9509P ground and the ground of devices on
port A of the PCA9509P must be avoided.
The reason for this cautionary remark is that a CMOS/NMOS open-drain capable of
sinking 3 mA of current at 0.4 V has an output resistance of 133 Ω or less (R = E / I).
Such a driver shares enough current with the port A output pull-down of the PCA9509P
to be seen as a LOW as long as the ground offset is zero. If the ground offset is greater
than 0 V, then the driver resistance must be less. Since VIL can be as low as 80 mV at
cold temperatures and the low end of the current distribution, the maximum ground offset
should not exceed 40 mV.
Bus repeaters that use an output offset are not interoperable with the port A of the
PCA9509P as their output LOW levels are not recognized by the PCA9509P as a LOW. If
the PCA9509P is placed in an application where the VIL of port A of the PCA9509P does
not go below its VIL, the port B does not go LOW.
2
2
Port B provides normal I C-bus voltage levels and is interoperable with all I C-bus
targets, controllers and repeaters.
6.1 Enable
The EN pin is active HIGH and allows the user to select when the repeater is active. This
can be used to isolate a badly behaved target on power-up until after the system power2
up reset. It should never change state during an I C-bus operation because disabling
during a bus operation hangs the bus and enabling part way through a bus cycle could
2
confuse the I C-bus parts being enabled. The EN also puts the PCA9509P in a standby
condition to reduce power consumption.
The enable pin should only change state when the bus and the repeater port are in an
idle state to prevent system failures.
Because the enable pin (EN) can put the PCA9509P in Standby mode, and when
in standby the current mirrors are turned OFF to save power, the recovery from the
PCA9509P
Product data sheet
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PCA9509P
Low power level translating I C-bus/SMBus repeater
disabled/standby state is slow so that the current mirrors can return to full current before
the channels are enabled.
Remark: The system design should allow sufficient time after STOP before disabling the
PCA9509P so that both sides of the SDA and SCL channels are HIGH. It should also
allow sufficient time before the START such that the channel is disabled before the SDA
goes LOW. The PCA9509P should only be enabled during a bus idle state and there also
must be sufficient time allowed before the START such that the PCA9509P is fully active
before the falling edge of the SDA that defines a START.
2
6.2 I C-bus systems
2
As with the standard I C-bus system, pull-up resistors are required to provide the logic
HIGH levels. The size of these pull-up resistors depends on the system. Port A is
designed to work with pull-up resistor’s size as required to meet rise time requirements
but minimize current consumption. Port B is designed to work with Standard-mode
2
2
and Fast-mode I C-bus devices in addition to SMBus devices. Standard-mode I C-bus
devices only specify 3 mA output drive; this limits the termination current to 3 mA in
2
a generic I C-bus system where Standard-mode devices and multiple controllers are
possible. Under certain conditions higher termination currents can be used (when all
currents are > 3 mA).
6.3 Edge rate control
The PCA9509P includes circuitry that slows down the falling edge of both the A side
and B side open-drain output pull-downs. This slowdown reduces system noise and
undershoot when the signal reflects off of the end of the bus. The slew rate control
circuit limits the maximum slew rate, and is relatively insensitive to the load capacitance,
the bus high voltage and to the pull-up value. The rising edge slew rate on the A side
and B side is controlled by RC time constant of the bus pull-up resistor and the bus
capacitance, which are system level considerations and not under the control of the
PCA9509P. The pull-up resistors should be chosen based on the total bus capacitance to
result in a reasonable rising edge transition time that is less than the maximum allowed
rise time, and slow enough not to make system level noise problems, and to make the A
side low voltage less than VIL.
6.4 Bus pull-up resistor selection
The AC test load for the PCA9509P is 1.35 kΩ and 50 pF total capacitance. This results
in a rise time of approximately 60 ns. The 1.35 kΩ resistor is chosen to provide a little
2
less than 3 mA in a 3.3 V application so it is compatible with Standard-mode I C-bus
devices as well as Fast-mode devices. The B side output pull-down is a strong driver and
is capable of sinking Fast-mode Plus (Fm+) currents, however the pull-up must be sized
2
for the weakest part in the system, so if Standard-mode I C-bus parts are present on the
B side, the pull-up must be limited to less than 3 mA. If only Fm+ parts are used on the
B side, the maximum pull-up current may be up to 30 mA. The pull-up resistor should
always be sized to provide less than the rated pull-up current for the weakest part on the
bus under the maximum bus voltage expected in the system. When the bus capacitance
is high, the current should be set near the maximum current drive for the weakest part.
However, if the bus capacitance is low a lower current/higher resistor value should be
used to keep the rise time from getting so fast that it causes problems. The A side pullup resistor must be selected to keep the LOW-level voltage at the A side input below
0.1VCC(A).
PCA9509P
Product data sheet
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2
PCA9509P
Low power level translating I C-bus/SMBus repeater
6.4.1 Port A pull-up resistor sizing
When selecting the pull-up resistor for the A side of the PCA9509P there are several
considerations and limitations from both the PCA9509P and the other parts on the A-side
bus that must be taken into account.
6.4.1.1 Minimum resistor size
The first limitation is that in order for the PCA9509P to recognize a LOW on the A side,
the voltage level must be below 0.1VCC(A) including ground offset. This and the drive
strength of the parts driving the less than 0.1VCC(A) level define the minimum resistor
value that can be used based on the other parts on the A-side bus. There is also a limit
of 4 mA maximum current that can be applied to the PCA9509P A side when it is LOW.
For example, if the part driving the PCA9509P A side is rated at 3 mA at 0.4 V (and it
is a MOS part) and assuming that VCC(A) = 0.8 V, then the part has an effective output
resistance of 0.4 V / 3 mA = 133 Ω, so the maximum current is 0.08 V / 133 Ω = ~600 μA,
so the maximum pull-up current would be 600 μA. And for VCC(A) = 0.8 V the minimum
resistance would be 0.72 V / 600 μA = 1.2 kΩ. If the part providing the 0.1VCC(A) has a
very low output resistance, then the current is limited to 4 mA by the PCA9509P, and for
VCC(A) = 0.8 V the minimum pull-up resistance would be 0.64 V / 4 mA = 160 Ω. Since
the ground offset will never be zero, the minimum resistor value needs to be increased
accordingly.
6.4.1.2 Maximum resistance sizing
The pull-up resistor on the A side of the PCA9509P should be chosen to provide at least
100 μA of pull-up current. So for VCC(A) = 0.8 V the maximum resistor value looks like
0.64 V / 100 μA = 6.4 kΩ.
6.4.1.3 Rise time constraints
In addition to the current minimum and maximum considerations, the RC time constant
of the A-side bus must be considered. It is recommended that the RC time constant
be chosen so that it is greater than 60 ns in order to control the size of the bounce that
results when a driver on the A side turns off that was driving a 2000
< 1.6
260
260
260
1.6 to 2.5
260
250
245
> 2.5
250
245
245
Moisture sensitivity precautions, as indicated on the packing, must be respected at all
times.
Studies have shown that small packages reach higher temperatures during reflow
soldering, see Figure 23.
PCA9509P
Product data sheet
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PCA9509P
Low power level translating I C-bus/SMBus repeater
maximum peak temperature
= MSL limit, damage level
temperature
minimum peak temperature
= minimum soldering temperature
peak
temperature
time
001aac844
MSL: Moisture Sensitivity Level
Figure 23. Temperature profiles for large and small components
For further information on temperature profiles, refer to Application Note AN10365
“Surface mount reflow soldering description”.
14 Soldering: PCB footprints
3.600
2.950
0.725
0.125
0.125
5.750
3.600
3.200
5.500
1.150
0.600
0.450
0.650
solder lands
occupied area
Dimensions in mm
sot505-1_fr
Figure 24. PCB footprint for SOT505-1 (TSSOP8); reflow soldering
PCA9509P
Product data sheet
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PCA9509P
Low power level translating I C-bus/SMBus repeater
Footprint information for reflow soldering of XQFN8 package
SOT902-2
1.9
0. 27 (8x)
0.45 (8x)
0.24
0. 22 (7x)
0.4 (8x)
0.29
1.9 1.75 1.37 0.65
1
1.2
0.11
0.32
0.37
0.65
1.2
1.75
occupied area
solder resist
solder land
solder paste deposit
solder land plus solder
Dimensions in mm
Issue date
15-06-19
15-06-23
sot902-2_fr
Figure 25. PCB footprint for SOT902-2 (XQFN8); reflow soldering
PCA9509P
Product data sheet
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PCA9509P
Low power level translating I C-bus/SMBus repeater
15 Abbreviations
Table 10. Abbreviations
Acronym
Description
CDM
Charged-Device Model
CMOS
Complementary Metal-Oxide Semiconductor
CPU
Central Processing Unit
ESD
ElectroStatic Discharge
HBM
Human Body Model
I/O
Input/Output
2
I C-bus
Inter-Integrated Circuit bus
NMOS
Negative-channel Metal-Oxide Semiconductor
RC
Resistor-Capacitor network
SMBus
System Management Bus
16 Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
PCA9509P v.5.0
20220718
Product data sheet
202206023I
PCA9509P v.4
Modifications:
• Table 6: Changed PCA9509P max VIH specification to clearly indicate port A, port B and Enable
pins are overvoltage tolerant to 5.5 V. There is no change to device or test coverage, only to data
sheet values.
• Removed all references, including associated text, to PCA9509A
• The terms "master" and "slave" are deprecated and have been replaced with "controller" and
"target" respectively in accordance with NXP's inclusive language project
PCA9509P v.4
20180518
Product data sheet
201805026I
PCA9509P v.3
PCA9509P v.3
20130719
Product data sheet
-
PCA9509P v.2
PCA9509P v.2
20130515
Product data sheet
-
PCA9509P v.1
PCA9509P v.1
20120814
Product data sheet
-
-
PCA9509P
Product data sheet
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PCA9509P
Low power level translating I C-bus/SMBus repeater
17 Legal information
17.1 Data sheet status
Document status
[1][2]
Product status
[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product
development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple
devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
17.2 Definitions
Draft — A draft status on a document indicates that the content is still
under internal review and subject to formal approval, which may result
in modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included in a draft version of a document and shall have no
liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the
relevant full data sheet, which is available on request via the local NXP
Semiconductors sales office. In case of any inconsistency or conflict with the
short data sheet, the full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
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customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product
is deemed to offer functions and qualities beyond those described in the
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notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
PCA9509P
Product data sheet
Suitability for use — NXP Semiconductors products are not designed,
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Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
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PCA9509P
Low power level translating I C-bus/SMBus repeater
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Suitability for use in non-automotive qualified products — Unless
this data sheet expressly states that this specific NXP Semiconductors
product is automotive qualified, the product is not suitable for automotive
use. It is neither qualified nor tested in accordance with automotive testing
or application requirements. NXP Semiconductors accepts no liability for
inclusion and/or use of non-automotive qualified products in automotive
equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without NXP Semiconductors’ warranty
of the product for such automotive applications, use and specifications, and
(b) whenever customer uses the product for automotive applications beyond
NXP Semiconductors’ specifications such use shall be solely at customer’s
own risk, and (c) customer fully indemnifies NXP Semiconductors for any
liability, damages or failed product claims resulting from customer design and
use of the product for automotive applications beyond NXP Semiconductors’
standard warranty and NXP Semiconductors’ product specifications.
Translations — A non-English (translated) version of a document, including
the legal information in that document, is for reference only. The English
version shall prevail in case of any discrepancy between the translated and
English versions.
PCA9509P
Product data sheet
Security — Customer understands that all NXP products may be subject to
unidentified vulnerabilities or may support established security standards or
specifications with known limitations. Customer is responsible for the design
and operation of its applications and products throughout their lifecycles
to reduce the effect of these vulnerabilities on customer’s applications
and products. Customer’s responsibility also extends to other open and/or
proprietary technologies supported by NXP products for use in customer’s
applications. NXP accepts no liability for any vulnerability. Customer should
regularly check security updates from NXP and follow up appropriately.
Customer shall select products with security features that best meet rules,
regulations, and standards of the intended application and make the
ultimate design decisions regarding its products and is solely responsible
for compliance with all legal, regulatory, and security related requirements
concerning its products, regardless of any information or support that may be
provided by NXP.
NXP has a Product Security Incident Response Team (PSIRT) (reachable
at PSIRT@nxp.com) that manages the investigation, reporting, and solution
release to security vulnerabilities of NXP products.
17.4 Trademarks
Notice: All referenced brands, product names, service names, and
trademarks are the property of their respective owners.
NXP — wordmark and logo are trademarks of NXP B.V.
All information provided in this document is subject to legal disclaimers.
Rev. 5.0 — 18 July 2022
© 2022 NXP B.V. All rights reserved.
24 / 26
NXP Semiconductors
2
PCA9509P
Low power level translating I C-bus/SMBus repeater
Tables
Tab. 1.
Tab. 2.
Tab. 3.
Tab. 4.
Tab. 5.
Tab. 6.
Device selection recommendation .................... 2
Ordering information ..........................................3
Ordering options ................................................3
Pin description ...................................................4
Limiting values .................................................. 9
Static characteristics ....................................... 10
Tab. 7.
Tab. 8.
Tab. 9.
Tab. 10.
Tab. 11.
Dynamic characteristics .................................. 11
SnPb eutectic process (from J-STD-020D) ..... 19
Lead-free process (from J-STD-020D) ............ 19
Abbreviations ...................................................22
Revision history ...............................................22
Fig. 14.
Typical port B LOW to HIGH propagation
delay versus port A supply voltage ................. 13
Typical slew rate versus port A supply
voltage ............................................................. 13
Typical propagation delay versus port B
supply voltage ................................................. 14
Typical port B LOW to HIGH propagation
delay versus port B supply voltage ................. 14
Typical slew rate versus port B supply
voltage ............................................................. 14
Test circuit for open-drain outputs A to B .........15
Test circuit for open-drain outputs B to A .........15
Package outline SOT505-1 (TSSOP8) ............16
Package outline SOT902-2 (XQFN8) .............. 17
Temperature profiles for large and small
components ..................................................... 20
PCB footprint for SOT505-1 (TSSOP8);
reflow soldering ............................................... 20
PCB footprint for SOT902-2 (XQFN8);
reflow soldering ............................................... 21
Figures
Fig. 1.
Fig. 2.
Fig. 3.
Fig. 4.
Fig. 5.
Fig. 6.
Fig. 7.
Fig. 8.
Fig. 9.
Fig. 10.
Fig. 11.
Fig. 12.
Fig. 13.
Functional diagram of PCA9509P ..................... 3
Pin configuration for TSSOP8 ........................... 4
Pin configuration for XQFN8 ............................. 4
Typical application ............................................. 8
Bus B SMBus/I2C-bus waveform ...................... 8
Bus A lower voltage waveform ..........................9
Propagation delay times and slew rate; port
B to port A ...................................................... 11
Propagation delay times and slew rate; port
A to port B ...................................................... 11
Propagation delay from the port A’s
external driver switching off to port B LOWto-HIGH transition; port A to port B ................. 12
Typical propagation delay versus ambient
temperature ..................................................... 12
Typical port B LOW to HIGH propagation
delay versus ambient temperature .................. 12
Typical slew rate versus ambient
temperature ..................................................... 13
Typical propagation delay versus port A
supply voltage ................................................. 13
PCA9509P
Product data sheet
Fig. 15.
Fig. 16.
Fig. 17.
Fig. 18.
Fig. 19.
Fig. 20.
Fig. 21.
Fig. 22.
Fig. 23.
Fig. 24.
Fig. 25.
All information provided in this document is subject to legal disclaimers.
Rev. 5.0 — 18 July 2022
© 2022 NXP B.V. All rights reserved.
25 / 26
NXP Semiconductors
2
PCA9509P
Low power level translating I C-bus/SMBus repeater
Contents
1
1.1
2
3
3.1
4
5
5.1
5.2
6
6.1
6.2
6.3
6.4
6.4.1
6.4.1.1
6.4.1.2
6.4.1.3
7
8
9
10
10.1
10.2
11
12
13
13.1
13.2
13.3
13.4
14
15
16
17
General description ............................................ 1
Selection recommendations .............................. 2
Features and benefits .........................................2
Ordering information .......................................... 3
Ordering options ................................................ 3
Functional diagram ............................................. 3
Pinning information ............................................ 4
Pinning ............................................................... 4
Pin description ................................................... 4
Functional description ........................................5
Enable ................................................................5
I2C-bus systems ................................................ 6
Edge rate control ............................................... 6
Bus pull-up resistor selection .............................6
Port A pull-up resistor sizing ..............................7
Minimum resistor size ........................................7
Maximum resistance sizing ............................... 7
Rise time constraints ......................................... 7
Application design-in information ..................... 8
Limiting values .................................................... 9
Static characteristics ........................................ 10
Dynamic characteristics ...................................11
AC waveforms ................................................. 11
Performance curves .........................................12
Test information ................................................ 15
Package outline .................................................16
Soldering of SMD packages .............................18
Introduction to soldering .................................. 18
Wave and reflow soldering .............................. 18
Wave soldering ................................................ 18
Reflow soldering .............................................. 18
Soldering: PCB footprints ................................ 20
Abbreviations .................................................... 22
Revision history ................................................ 22
Legal information .............................................. 23
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© 2022 NXP B.V.
All rights reserved.
For more information, please visit: http://www.nxp.com
Date of release: 18 July 2022
Document identifier: PCA9509P
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