PDTA114YE,115

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia PDTA114Y series PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k Rev. 5 — 18 November 2011 Product data sheet 1. Product profile 1.1 General description PNP Resistor-Equipped Transistor (RET) family in Surface-Mounted Device (SMD) plastic packages. Table 1. Product overview Type number Package JEDEC NPN complement Package configuration NXP JEITA PDTA114YE SOT416 SC-75 - PDTC114YE ultra small PDTA114YM SOT883 SC-101 - PDTC114YM leadless ultra small PDTA114YT SOT23 - TO-236AB PDTC114YT small PDTA114YU SOT323 SC-70 - very small PDTC114YU 1.2 Features and benefits  100 mA output current capability  Built-in bias resistors  Simplifies circuit design  Reduces component count  Reduces pick and place costs  AEC-Q101 qualified 1.3 Applications  Digital applications in automotive and industrial segments  Control of IC inputs  Cost-saving alternative for BC847/857 series in digital applications  Switching loads 1.4 Quick reference data Table 2. Quick reference data Symbol Parameter Conditions Min Typ Max Unit VCEO collector-emitter voltage open base - - 50 V IO output current - - 100 mA R1 bias resistor 1 (input) 7 10 13 k R2/R1 bias resistor ratio 3.7 4.7 5.7 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 2. Pinning information Table 3. Pinning Pin Description Simplified outline Graphic symbol SOT23; SOT323; SOT416 1 input (base) 2 GND (emitter) 3 3 3 R1 output (collector) 1 R2 1 2 2 006aaa144 sym003 SOT883 1 input (base) 2 GND (emitter) 3 1 3 3 2 output (collector) R1 1 Transparent top view R2 2 sym003 3. Ordering information Table 4. Ordering information Type number Package Name Description Version PDTA114YE SC-75 plastic surface-mounted package; 3 leads SOT416 PDTA114YM SC-101 leadless ultra small plastic package; 3 solder lands; SOT883 body 1.0  0.6  0.5 mm PDTA114YT - plastic surface-mounted package; 3 leads SOT23 PDTA114YU SC-70 plastic surface-mounted package; 3 leads SOT323 4. Marking Table 5. Type number Marking code[1] PDTA114YE 36 PDTA114YM DF PDTA114YT *29 PDTA114YU *55 [1] PDTA114Y_SER Product data sheet Marking codes * = placeholder for manufacturing site code All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 2 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 5. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 6 V VI input voltage - +6 V positive PDTA114Y_SER Product data sheet negative - 40 V IO output current - 100 mA ICM peak collector current single pulse; tp  1 ms - 100 mA Ptot total power dissipation Tamb  25 C PDTA114YE (SOT416) [1][2] - 150 mW PDTA114YM (SOT883) [2][3] - 250 mW PDTA114YT (SOT23) [1] - 250 mW PDTA114YU (SOT323) [1] - 200 mW Tj junction temperature - 150 C Tamb ambient temperature 65 +150 C Tstg storage temperature 65 +150 C [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. [3] Device mounted on an FR4 PCB with 70 m copper strip line, standard footprint. All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 3 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac778 300 Ptot (mW) (1) (2) 200 (3) 100 0 -75 -25 25 75 125 175 Tamb (°C) (1) SOT23; FR4 PCB, standard footprint SOT883; FR4 PCB with 70 m copper strip line, standard footprint (2) SOT323; FR4 PCB, standard footprint (3) SOT416; FR4 PCB, standard footprint Fig 1. Power derating curves 6. Thermal characteristics Table 7. PDTA114Y_SER Product data sheet Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Min Typ Max Unit PDTA114YE (SOT416) [1][2] - - 830 K/W PDTA114YM (SOT883) [2][3] - - 500 K/W PDTA114YT (SOT23) [1] - - 500 K/W PDTA114YU (SOT323) [1] - - 625 K/W [1] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. [2] Reflow soldering is the only recommended soldering method. [3] Device mounted on an FR4 PCB with 70 m copper strip line, standard footprint. All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 4 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac781 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 0.2 102 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTA114YE (SOT416); typical values 006aac782 103 Zth(j-a) (K/W) duty cycle = 1 0.75 0.5 102 0.33 0.2 0.1 0.05 10 0.02 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, 70 m copper strip line Fig 3. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTA114YM (SOT883); typical values PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 5 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac779 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 4. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTA114YT (SOT23); typical values 006aac780 103 duty cycle = 1 Zth(j-a) (K/W) 0.75 0.5 0.33 102 0.2 0.1 0.05 0.02 10 0.01 0 1 10-5 10-4 10-3 10-2 10-1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 5. Transient thermal impedance from junction to ambient as a function of pulse duration for PDTA114YU (SOT323); typical values PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 6 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 7. Characteristics Table 8. Characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ICBO collector-base cut-off current VCB = 50 V; IE = 0 A - - 100 nA ICEO collector-emitter cut-off current VCE = 30 V; IB = 0 A - - 1 A VCE = 30 V; IB = 0 A; Tj = 150 C - - 5 A IEBO emitter-base cut-off current VEB = 5 V; IC = 0 A - - 150 A hFE DC current gain VCE = 5 V; IC = 5 mA 100 - - VCEsat collector-emitter saturation voltage IC = 5 mA; IB = 0.25 mA - - 100 mV VI(off) off-state input voltage VCE = 5 V; IC = 100 A - 0.7 0.5 V VI(on) on-state input voltage VCE = 0.3 V; IC = 1 mA 1.4 0.8 - V R1 bias resistor 1 (input) 7 10 13 k R2/R1 bias resistor ratio Cc collector capacitance VCB = 10 V; IE = ie = 0 A; f = 1 MHz fT transition frequency VCE = 5 V; IC = 10 mA; f = 100 MHz [1] Characteristics of built-in transistor 006aac789 103 hFE [1] 3.7 4.7 5.7 - - 3 pF - 180 - MHz 006aac790 -1 (1) (2) VCEsat (V) (3) 102 -10-1 (1) (2) 10 (3) 1 -10-1 -1 -102 -10 -10-2 -10-1 IC (mA) VCE = 5 V IC/IB = 20 (1) Tamb = 100 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 40 C (3) Tamb = 40 C DC current gain as a function of collector current; typical values PDTA114Y_SER Product data sheet -102 -10 IC (mA) (1) Tamb = 100 C Fig 6. -1 Fig 7. Collector-emitter saturation voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 7 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 006aac791 -10 006aac792 -10 VI(off) (V) VI(on) (V) (1) (2) -1 (1) -1 (2) (3) (3) -10-1 -10-1 -1 -102 -10 -10-1 -10-1 -1 IC (mA) VCE = 0.3 V VCE = 5 V (1) Tamb = 40 C (1) Tamb = 40 C (2) Tamb = 25 C (2) Tamb = 25 C (3) Tamb = 100 C (3) Tamb = 100 C Fig 8. -10 IC (mA) On-state input voltage as a function of collector current; typical values 006aac793 7 Fig 9. Off-state input voltage as a function of collector current; typical values 006aac763 103 Cc (pF) 6 fT (MHz) 5 4 102 3 2 1 0 0 -10 -20 -30 -40 -50 VCB (V) f = 1 MHz; Tamb = 25 C Product data sheet -1 -102 -10 IC (mA) VCE = 5 V; Tamb = 25 C Fig 10. Collector capacitance as a function of collector-base voltage; typical values PDTA114Y_SER 10 -10-1 Fig 11. Transition frequency as a function of collector current; typical values of built-in transistor All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 8 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 9. Package outline 0.62 0.55 0.55 0.47 0.95 0.60 1.8 1.4 3 0.45 0.15 0.50 0.46 3 0.30 0.22 1.75 0.9 1.45 0.7 1.02 0.95 0.65 1 0.30 0.22 2 0.30 0.15 0.25 0.10 1 2 1 0.20 0.12 0.35 Dimensions in mm 04-11-04 Fig 12. Package outline PDTA114YE (SOT416/SC-75) 3.0 2.8 Dimensions in mm 03-04-03 Fig 13. Package outline PDTA114YM (SOT883/SC-101) 1.1 0.9 2.2 1.8 1.1 0.8 0.45 0.15 3 3 0.45 0.15 2.5 1.4 2.1 1.2 2.2 1.35 2.0 1.15 1 1 2 1.9 0.48 0.38 04-11-04 Fig 14. Package outline PDTA114YT (SOT23) PDTA114Y_SER Product data sheet 0.4 0.3 0.15 0.09 Dimensions in mm 2 0.25 0.10 1.3 Dimensions in mm 04-11-04 Fig 15. Package outline PDTA114YU (SOT323/SC-70) All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 9 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 10. Packing information Table 9. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number Package Description Packing quantity 3000 5000 10000 PDTA114YE SOT416 4 mm pitch, 8 mm tape and reel -115 - -135 PDTA114YM SOT883 2 mm pitch, 8 mm tape and reel - - -315 PDTA114YT SOT23 4 mm pitch, 8 mm tape and reel -215 - -235 PDTA114YU SOT323 4 mm pitch, 8 mm tape and reel -115 - -135 [1] For further information and the availability of packing methods, see Section 14. PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 10 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 11. Soldering 2.2 1.7 solder lands solder resist 1 0.85 2 solder paste 0.5 (3×) occupied area Dimensions in mm 0.6 (3×) 1.3 sot416_fr Reflow soldering is the only recommended soldering method. Fig 16. Reflow soldering footprint PDTA114YE (SOT416/SC-75) 1.3 0.7 R0.05 (12×) solder lands solder resist 0.9 0.6 0.7 solder paste 0.25 (2×) occupied area 0.3 (2×) 0.3 0.4 (2×) 0.4 Dimensions in mm sot883_fr Reflow soldering is the only recommended soldering method. Fig 17. Reflow soldering footprint PDTA114YM (SOT883/SC-101) PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 11 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 3.3 2.9 1.9 solder lands solder resist 3 2 1.7 solder paste occupied area 0.6 (3×) 0.7 (3×) Dimensions in mm 0.5 (3×) 0.6 (3×) 1 sot023_fr Fig 18. Reflow soldering footprint PDTA114YT (SOT23) 2.2 1.2 (2×) 1.4 (2×) solder lands 4.6 solder resist 2.6 occupied area Dimensions in mm 1.4 preferred transport direction during soldering 2.8 4.5 sot023_fw Fig 19. Wave soldering footprint PDTA114YT (SOT23) PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 12 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 2.65 1.85 1.325 solder lands solder resist 2 2.35 0.6 (3×) 3 solder paste 1.3 1 occupied area 0.5 (3×) Dimensions in mm 0.55 (3×) sot323_fr Fig 20. Reflow soldering footprint PDTA114YU (SOT323/SC-70) 4.6 2.575 1.425 (3×) solder lands solder resist occupied area 1.8 3.65 2.1 09 (2×) Dimensions in mm preferred transport direction during soldering sot323_fw Fig 21. Wave soldering footprint PDTA114YU (SOT323/SC-70) PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 13 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 12. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes PDTA114Y_SER v.5 20111118 Product data sheet - PDTA114Y_SERIES v.4 Modifications: • The format of this document has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • • • • • • • • Legal texts have been adapted to the new company name where appropriate. • • • • • Section 8 “Test information”: added Type numbers PDTA114YEF, PDTA114YK and PDTA114YS removed. Section 1 “Product profile”: updated Section 3 “Ordering information”: added Section 4 “Marking”: updated Figure 1 to 11: added Section 5 “Limiting values”: updated Section 6 “Thermal characteristics”: updated Table 8 “Characteristics”: Vi(on) redefined to VI(on) on-state input voltage, Vi(off) redefined to VI(off) off-state input voltage, ICEO updated, fT added Section 9 “Package outline”: superseded by minimized package outline drawings Section 10 “Packing information”: added Section 11 “Soldering”: added Section 13 “Legal information”: updated PDTA114Y_SERIES v.4 20040802 Product data sheet - PDTA114Y_SERIES v.3 PDTA114Y_SERIES v.3 20030909 Product specification - PDTA114Y_SERIES v.2 PDTA114Y_SERIES v.2 20030411 Product specification - PDTA114YEF v.1 PDTA114YEF v.1 20020515 Product specification - - PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 14 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 15 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PDTA114Y_SER Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 5 — 18 November 2011 © NXP B.V. 2011. All rights reserved. 16 of 17 PDTA114Y series NXP Semiconductors PNP resistor-equipped transistors; R1 = 10 k, R2 = 47 k 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 9 Quality information . . . . . . . . . . . . . . . . . . . . . . 9 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Packing information . . . . . . . . . . . . . . . . . . . . 10 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 18 November 2011 Document identifier: PDTA114Y_SER