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PDTD113ZT

PDTD113ZT

  • 厂商:

    NXP(恩智浦)

  • 封装:

  • 描述:

    PDTD113ZT - NPN 500 mA, 50 V resistor-equipped transistor; R1 = 1 kW, R2 = 10 kW - NXP Semiconductor...

  • 数据手册
  • 价格&库存
PDTD113ZT 数据手册
PDTD113ZT NPN 500 mA, 50 V resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ Rev. 02 — 23 March 2009 Product data sheet 1. Product profile 1.1 General description NPN 500 mA Resistor-Equipped Transistor (RET) in a small Surface-Mounted Device (SMD) plastic package. PNP complement: PDTB113ZT. 1.2 Features I Built-in bias resistors I Simplifies circuit design I 500 mA output current capability I Reduces component count I Reduces pick and place costs I ±10 % resistor ratio tolerance 1.3 Applications I Digital application in automotive and industrial segments I Controlling IC inputs I Cost-saving alternative for BC817 series in digital applications I Switching loads 1.4 Quick reference data Table 1. Symbol VCEO IO R1 R2/R1 Quick reference data Parameter collector-emitter voltage output current bias resistor 1 (input) bias resistor ratio Conditions open base Min 0.7 9 Typ 1 10 Max 50 500 1.3 11 Unit V mA kΩ NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 2. Pinning information Table 2. Pin 1 2 3 Pinning Description input (base) GND (emitter) output (collector) 1 2 3 R1 Simplified outline Graphic symbol 3 1 R2 2 sym007 3. Ordering information Table 3. Ordering information Package Name PDTD113ZT Description plastic surface-mounted package; 3 leads Version SOT23 Type number 4. Marking Table 4. Marking codes Marking code[1] *7V Type number PDTD113ZT [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VCBO VCEO VEBO VI Parameter collector-base voltage collector-emitter voltage emitter-base voltage input voltage positive negative IO output current +10 −5 500 V V mA Conditions open emitter open base open collector Min Max 50 50 5 Unit V V V PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 2 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Ptot Tj Tamb Tstg [1] Parameter total power dissipation junction temperature ambient temperature storage temperature Conditions Tamb ≤ 25 °C [1] Min −65 −65 Max 250 150 +150 +150 Unit mW °C °C °C Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 6. Thermal characteristics Table 6. Symbol Rth(j-a) [1] Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air [1] Min - Typ - Max 500 Unit K/W Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 7. Characteristics Table 7. Characteristics Tamb = 25 °C unless otherwise specified. Symbol ICBO ICEO IEBO hFE VCEsat VI(off) VI(on) R1 R2/R1 Cc Parameter collector-base cut-off current Conditions VCB = 40 V; IE = 0 A VCB = 50 V; IE = 0 A Min 70 0.3 0.4 0.7 9 VCB = 10 V; IE = ie = 0 A; f = 100 MHz Typ 0.6 0.8 1 10 7 Max 100 100 0.5 0.8 0.3 1 1.4 1.3 11 pF V V V kΩ Unit nA nA µA mA collector-emitter cut-off VCE = 50 V; IB = 0 A current emitter-base cut-off current DC current gain collector-emitter saturation voltage off-state input voltage on-state input voltage bias resistor 1 (input) bias resistor ratio collector capacitance VEB = 5 V; IC = 0 A VCE = 5 V; IC = 50 mA IC = 50 mA; IB = 2.5 mA VCE = 5 V; IC = 100 µA VCE = 0.3 V; IC = 20 mA PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 3 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 103 006aaa314 10−1 006aaa315 (1) hFE (1) (2) (3) VCEsat (V) (2) (3) 102 10 1 10−1 1 10 102 IC (mA) 103 10−2 1 10 102 IC (mA) 103 VCE = 5 V (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C IC/IB = 20 (1) Tamb = 100 °C (2) Tamb = 25 °C (3) Tamb = −40 °C Fig 1. DC current gain as a function of collector current; typical values 10 006aaa316 Fig 2. Collector-emitter saturation voltage as a function of collector current; typical values 1 (1) (2) 006aaa317 VI(on) (V) VI(off) (V) (3) 1 (1) (2) (3) 10−1 10−1 1 10 102 IC (mA) 103 10−1 10−1 1 IC (mA) 10 VCE = 0.3 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C VCE = 5 V (1) Tamb = −40 °C (2) Tamb = 25 °C (3) Tamb = 100 °C Fig 3. On-state input voltage as a function of collector current; typical values Fig 4. Off-state input voltage as a function of collector current; typical values PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 4 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 8. Package outline 3.0 2.8 3 1.1 0.9 0.45 0.15 2.5 1.4 2.1 1.2 1 2 1.9 Dimensions in mm 0.48 0.38 0.15 0.09 04-11-04 Fig 5. Package outline SOT23 (TO-236AB) 9. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PDTD113ZT [1] Package SOT23 Description 4 mm pitch, 8 mm tape and reel Packing quantity 3000 -215 10000 -235 For further information and the availability of packing methods, see Section 13. PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 5 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 10. Soldering 3.3 2.9 1.9 solder lands solder resist 3 1.7 2 solder paste 0.6 (3×) occupied area Dimensions in mm 0.5 (3×) 0.6 (3×) 1 sot023_fr 0.7 (3×) Fig 6. Reflow soldering footprint SOT23 (TO-236AB) 2.2 1.2 (2×) 1.4 (2×) solder lands 4.6 2.6 solder resist occupied area Dimensions in mm 1.4 preferred transport direction during soldering 2.8 4.5 sot023_fw Fig 7. Wave soldering footprint SOT23 (TO-236AB) PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 6 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 11. Revision history Table 9. Revision history Release date 20090323 Data sheet status Product data sheet Change notice Supersedes PDTD113Z_SER_1 Document ID PDTD113ZT_2 Modifications: • • • • • • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Type numbers PDTD113ZK and PDTD113ZS removed Table 5 “Limiting values”: typo for maximum value of VI positive corrected Section 10 “Soldering”: added Section 12 “Legal information”: updated Product data sheet - PDTD113Z_SER_1 20050405 PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 7 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 12. Legal information 12.1 Data sheet status Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet [1] [2] [3] Product status[3] Development Qualification Production Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification. Please consult the most recently issued document before initiating or completing a design. The term ‘short data sheet’ is explained in section “Definitions”. The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 12.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 12.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental 12.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 13. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com PDTD113ZT_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 23 March 2009 8 of 9 NXP Semiconductors PDTD113ZT NPN 500 mA resistor-equipped transistor; R1 = 1 kΩ, R2 = 10 kΩ 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 10 11 12 12.1 12.2 12.3 12.4 13 14 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . General description. . . . . . . . . . . . . . . . . . . . . . Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . Quick reference data. . . . . . . . . . . . . . . . . . . . . Pinning information . . . . . . . . . . . . . . . . . . . . . . Ordering information . . . . . . . . . . . . . . . . . . . . . Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . Thermal characteristics. . . . . . . . . . . . . . . . . . . Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . Package outline . . . . . . . . . . . . . . . . . . . . . . . . . Packing information. . . . . . . . . . . . . . . . . . . . . . Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Revision history . . . . . . . . . . . . . . . . . . . . . . . . . Legal information. . . . . . . . . . . . . . . . . . . . . . . . Data sheet status . . . . . . . . . . . . . . . . . . . . . . . Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . . Contact information. . . . . . . . . . . . . . . . . . . . . . Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 1 1 1 2 2 2 2 3 3 5 5 6 7 8 8 8 8 8 8 9 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 23 March 2009 Document identifier: PDTD113ZT_2
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