TDF8546
I2C-bus controlled 4 45 W best efficiency amplifier
Rev. 8 — 27 September 2013
Product short data sheet
1. General description
The TDF8546 is one of a new generation of complementary quad Bridge-Tied Load (BTL)
audio power amplifiers intended for automotive applications. It has a best efficiency mode
with full I2C-bus controlled diagnostics, including start-up diagnostics. The TDF8546 can
operate at a battery voltage as low as 6 V making this amplifier suitable for stop/start-car
operation.
The new best efficiency principle uses a patented switch technique which reduces
switching distortion. To reduce power dissipation, the new best efficiency principle uses
the audio information on all four channels instead of only the front or rear signals.
Dissipation is more than 65 % less than standard BTL when used for front and rear
correlated audio signals. Dissipation is 35 % less than standard BTL when used for
uncorrelated (delayed) audio signals between front and rear. It is 17 % less for
uncorrelated audio signals when the front or rear information is used.
The amplifier uses a complementary DMOS output stage in a Silicon-On-Insulator (SOI)
based BCD process. The DMOS output stage ensures a high-power output signal with
perfect sound quality. The SOI-based BCD process ensures a robust amplifier, where
latch-up cannot occur, with good separation between the four independent channels, with
every component isolated and without substrate currents.
2. Features and benefits
Stop/start-car prepared: keeps operating without audible disturbance during engine
start at a battery voltage as low as 6 V
New best efficiency mode with patented low switching distortion
Extreme best efficiency mode (uses information from 4 channels) with 17 % less
dissipation for uncorrelated signals compared to 2-channel best efficiency mode.
Operates in either legacy (non-I2C-bus) or I2C-bus modes (3.3 V and 5 V compliant)
Four hardware-programmable I2C-bus addresses
Can drive 2 and 4 loads
Speaker fault detection
Start-up diagnostics with load detection: open, short, present; filtered for door-slam
and chatter relays
AC load (tweeter) detection with low and high current mode
Gain select after start-up without audible disturbance
Independent selectable soft mute of front and rear channels
Programmable gain (26 dB and 16 dB), independently programmable for the front and
rear channels
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
Line driver mode supports engine start at a battery voltage as low as 6 V (16 dB and
mid-tap voltage 0.25 VP)
Programmable clip detect: 2 %, 5 % or 10 %
Programmable thermal pre-warning
Pin STB can be programmed/multiplexed with second-clip detect
Clip information of each channel can be directed separately to pin DIAG or pin STB
Independent enabling of thermal-, clip- or load fault information (short across the load
or to VP or to ground) on pin DIAG
Loss-of-ground and open VP safe (minimum series resistance required)
All amplifier outputs short-circuit proof to ground, supply voltage and across the load
(channel independent)
All pins short-circuit proof to ground
Temperature controlled gain reduction to prevent audio holes at high junction
temperatures
Programmable low battery voltage detection to enable 7.5 V or 6 V minimum battery
voltage operation
Overvoltage protection (load-dump safe up to VP = 50 V) with overvoltage pre-warning
at 16 V
Offset detection
3. Quick reference data
Table 1.
Quick reference data
Conditions
Min
Typ
Max
Unit
VP(oper)
Symbol Parameter
operating supply
voltage
RL = 4
6
14.4
18
V
Iq
quiescent current
no load
-
260
350
mA
no load; VP = 7 V
-
190
-
mA
RL = 4 ; VP = 14.4 V; maximum power;
Vi = 2 V RMS square wave
37
40
-
W
RL = 4 ; VP = 15.2 V; maximum power;
Vi = 2 V RMS square wave
41
45
-
W
RL = 4 ; VP = 14.4 V; THD = 0.5 %
18
20
-
W
RL = 4 ; VP = 14.4 V; THD = 10 %
23
25
-
W
RL = 2 ; VP = 14.4 V; THD = 10 %
40
44
-
W
RL = 2 ; VP = 14.4 V; maximum power;
Vi = 2 V RMS square wave
58
64
-
W
Po = 1 W to 12 W; fi = 1 kHz; RL = 4 ; BTL mode
-
0.01
0.1
%
Po = 4 W; fi = 1 kHz; RL = 4 ; best efficiency mode
-
0.03
-
%
amplifier mode
-
43
65
V
line driver mode
-
25
33
V
Po
output power
THD
total harmonic
distortion
Vn(o)
output noise voltage
TDF8546_SDS
Product short data sheet
filter 20 Hz to 22 kHz; RS = 1 k
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
2 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
4. Ordering information
Table 2.
Ordering information
Type number
Package
Name
Description
Version
TDF8546J
DBS27P
plastic DIL-bent-SIL (special bent) power package;
27 leads (lead length 6.8 mm)
SOT827-1
TDF8546TH
HSOP36
plastic, heatsink small outline package; 36 leads; low stand-off height
SOT851-1
TDF8546JS
DBSMS27P
plastic dual bent surface mounted SIL power package; 27 leads
SOT1154-1
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
3 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
5. Pinning information
5.1 Pinning
ADSEL
1
STB
2
PGND2
3
OUT2-
4
DIAG
5
OUT2+
6
VP2
7
OUT1-
8
PGND1
9
OUT1+ 10
SVR 11
IN1 12
IN2 13
SGND 14
TDF8546J/JS
IN4 15
IN3 16
ACGND 17
OUT3+ 18
PGND3 19
OUT3- 20
VP1 21
OUT4+ 22
SCL 23
OUT4- 24
PGND4 25
SDA 26
TAB 27
aaa-005789
Fig 1.
TDF8546_SDS
Product short data sheet
Pin configuration of TDF8546J/JS (packages DBS27P and DBSMS27P)
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
4 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
TAB 36
1
OUT3-
n.c. 35
2
OUT3+
n.c. 34
3
VP1
n.c. 33
4
OUT4-
PGND3 32
5
PGND4
n.c. 31
6
OUT4+
ACGND 30
7
SCL
IN3 29
8
SDA
IN4 28
9
DIAG
SGND 27
TDF8546TH
10 ADSEL
IN2 26
11 STB
IN1 25
12 n.c.
SVR 24
13 OUT2+
PGND1 23
14 PGND2
n.c. 22
15 OUT2-
n.c. 21
16 VP2
n.c. 20
17 OUT1+
n.c. 19
18 OUT1001aam684
Fig 2.
TDF8546_SDS
Product short data sheet
Pin configuration TDF8546TH
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
5 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
5.2 Pin description
TDF8546_SDS
Product short data sheet
Table 3.
Pin description
Symbol
Pin
Description
TDF8546J/JS
TDF8546TH
ADSEL
1
10
I2C-bus address select
STB
2
11
Standby (I2C-bus mode) or mode pin (legacy mode)
programmable second clip indicator
PGND2
3
14
channel 2 power ground
OUT2
4
15
channel 2 negative output (right rear)
DIAG
5
9
diagnostic and clip detection output
OUT2+
6
13
channel 2 positive output (right rear)
VP2
7
16
power supply voltage 2
OUT1
8
18
channel 1 negative output (right front)
PGND1
9
23
channel 1 power ground
OUT1+
10
17
channel 1 positive output (right front)
SVR
11
24
half supply voltage filter capacitor
IN1
12
25
channel 1 input
IN2
13
26
channel 2 input
SGND
14
27
signal ground
IN4
15
28
channel 4 input
IN3
16
29
channel 3 input
ACGND
17
30
AC ground
OUT3+
18
2
channel 3 positive output (left front)
PGND3
19
32
channel 3 power ground
OUT3
20
1
channel 3 negative output (left front)
VP1
21
3
power supply voltage 1
OUT4+
22
6
channel 4 positive output (left rear)
SCL
23
7
I2C-bus clock input
OUT4
24
4
channel 4 negative output (left rear)
PGND4
25
5
channel 4 power ground
SDA
26
8
I2C-bus data input and output
TAB
27
36
heatsink connection; must be connected to ground
n.c.
-
12, 19, 20,
21, 22, 31,
33, 34, 35
not connected
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
6 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
6. Thermal characteristics
Table 4.
Symbol
Thermal characteristics
Parameter
Conditions
Typ
Unit
DBS27/DBSMS27P
Rth(j-c)
thermal resistance from junction to case
1
K/W
Rth(j-a)
thermal resistance from junction to ambient
40
K/W
Rth(j-c)
thermal resistance from junction to case
1
K/W
Rth(j-a)
thermal resistance from junction to ambient
35
K/W
HSOP36
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
7 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
7. Characteristics
Table 5.
Characteristics
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
RL = 4
6
14.4
18
V
RL = 2
6
14.4
16
V
-
260
350
mA
Supply voltage behavior
VP(oper)
operating supply voltage
Iq
quiescent current
no load
no load; VP = 7 V
-
190
-
mA
Ioff
off-state current
VSTB = 0.4 V
-
4
10
A
VO
output voltage
DC
amplifier on; high gain/low gain
mode
6.6
7.1
7.6
V
line driver mode; IB4[D2] = 0;
IB3[D5:D6] = 1
3.0
3.4
3.8
V
IB4[D0] = 1
7.0
7.7
8.1
V
IB4[D0] = 0
5.4
5.7
6.2
V
6.5
7.2
7.7
V
VP(low)(mute)
low supply voltage mute
rising supply voltage
falling supply voltage
IB4[D0] = 1
IB4[D0] = 0
VP(low)(mute)
VP(ovp)pwarn
5.2
5.5
5.9
V
low supply voltage mute
hysteresis
IB4[D0] = 1
0.1
0.5
0.8
V
IB4[D0] = 0
0.1
0.3
0.7
V
pre-warning overvoltage
protection supply voltage
rising supply voltage
15.2
16
16.9
V
falling supply voltage
14.4
15.2
16.2
V
hysteresis
-
0.8
-
V
Vth(ovp)
overvoltage protection
threshold voltage
rising supply voltage
18
20
22
V
VPOR
power-on reset voltage
falling supply voltage
-
3.1
4.5
V
VO(offset)
output offset voltage
amplifier on
75
0
+75
mV
amplifier mute
25
0
+25
mV
line driver mode
45
0
+45
mV
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
8 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
Table 5.
Characteristics …continued
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
-
-
0.8
V
-
-
0.8
V
2.5
-
4.5
V
Mode select and second clip detection: pin STB
VSTB
voltage on pin STB
off-by mode selected
I2C-bus mode
legacy mode
off)
(I2C-bus
mode
mute selected
legacy mode (I2C-bus mode
off)
operating mode selected
I2C-bus mode
2.5
-
VP
V
legacy mode (I2C-bus mode
off)
5.9
-
VP
V
5.6
5.9
6.5
V
6.1
-
7.4
V
-
5
30
A
-
300
500
s
-
-
5
A
I2C-bus mode;
with ILO = 5 A +15 ms;
no DC-load (IB1[D1] = 0);
-
430
650
ms
legacy mode;
with ILO = 5 A +20 ms;
VSTB = 7 V; RADSEL = 0 ;
-
430
650
ms
I2C-bus mode;
with ILO = 5 A +30 ms;
no DC-load (IB1[D1] = 0);
-
550
800
ms
legacy mode;
with ILO = 5 A +20 ms;
VSTB = 7 V; RADSEL = 0 ;
-
550
800
ms
low voltage on pin STB when
pulled LOW during clipping; clip
detection on STB active
[1]
ISTB = 150 A
ISTB = 500 A
ISTB
current on pin STB
0 V < VSTB < 8.5 V; clip detection
not active
[1]
Start-up/shut-down/mute timing
twake
wake-up time
ILO(SVR)
output leakage current on pin
SVR
td(mute_off)
mute off delay time
tamp_on
amplifier on time
TDF8546_SDS
Product short data sheet
time after wake-up via pin STB
before first I2C-bus transmission
is recognized;
time from amplifier start to 10 %
of output signal; ILO = 0 A
time from amplifier start to
amplifier on; 90 % of output
signal; ILO = 0 A
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Rev. 8 — 27 September 2013
[2]
[2]
© NXP B.V. 2013. All rights reserved.
9 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
Table 5.
Characteristics …continued
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol
toff
Parameter
Conditions
amplifier switch-off time
Min
Typ
Max
Unit
I2C-bus mode;
with ILO = 5 A +0 ms;
250
500
750
ms
via pin STB; (IB4[D6] = 0);
with ILO = 5 A +0 ms;
250
500
750
ms
time to DC output voltage < 0.1 V;
ILO = 0 A
[2]
td(mute-on)
delay time from mute to on
from 10 % to 90 % of output
signal; Vi = 50 mV; I2C-bus mode
(IB2[D1, D2] = 1 to 0) or IB2(D0 =
1 to 0) or legacy mode (VSTB =
3 V to 7 V);
5
15
40
ms
td(soft_mute)
soft mute delay time
from 90 % to 10 % of output
signal; Vi = 50 mV; I2C-bus mode
(IB2[D1, D2] = 0 to 1) or legacy
mode (VSTB = 7 V to 3 V);
5
15
40
ms
td(fast_mute)
fast mute delay time
from 90 % to 10 % of output
signal; Vi = 50 mV; I2C-bus mode
(IB2[D0] = 0 to 1, or VSTB from
> 5.9 V to < 0.8 V in 1 s;
-
0.4
1
ms
t(start-Vo(off))
engine start to output off time
VP from 14.4 V to 5 V in 1.5 ms;
Vo < 0.5 V;
-
0.1
1
ms
t(start-SVRoff)
engine start to SVR off time
VP from 14.4 V to 5 V in 1.5 ms;
VSVR < 0.7 V;
-
40
75
ms
pins SCL and SDA
-
-
1.5
V
I2C-bus interface[3]
VIL
LOW-level input voltage
VIH
HIGH-level input voltage
pins SCL and SDA
2.3
5.5
V
VOL
LOW-level output voltage
pin SDA; IL = 5 mA
-
-
0.4
V
fSCL
SCL clock frequency
-
400
-
kHz
RseriesADSEL = 0
4
5
11
V
RseriesADSEL = 100 k
-
-
VP
V
input current on pin ADSEL
VSTB = 5 V; VADSEL = 5 V
-
2
10
A
resistance on pin ADSEL
I2C-bus
address
A[6:0] = 1101 110
99
100
101
k
I2C-bus address
A[6:0] = 1101 111
29.7
30
30.3
k
I2C-bus address
A[6:0] = 1101 010
9.9
10
10.1
k
legacy mode
-
-
0.47
k
does not react to address
selection changes
-
-
6
V
VADSEL
II(ADSEL)
RADSEL
VP(latch)
I2C-bus
voltage on pin ADSEL
latch supply voltage
address
A[6:0] = 1101 101
Start-up diagnostics
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
10 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
Table 5.
Characteristics …continued
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tsudiag
start-up diagnostic time
from start-up diagnostic
command via I2C-bus until
completion of start-up diagnostic;
VO + < 0.1 V; VO < 0.1 V (no
load) IB1[D1] = 1;
50
130
250
ms
td(sudiag-on)
start-up diagnostic to on delay
time
at 90 % of output signal;
IB1[D0:D1] = 11;
-
680
-
ms
Voffset
offset voltage
start-up diagnostic offset voltage
under no load condition
1.3
2
2.5
V
RLdet(sudiag)
start-up diagnostic load
detection resistance
shorted load
high gain; IB3[D6:D5] = 00
-
-
0.5
low gain; IB3[D6:D5] = 11
-
-
1.5
normal load
high gain (IB3[D6:D5] = 00)
1.5
-
20
low gain (IB3[D6:D5] = 11)
3.2
-
20
line driver load
80
-
200
open load
400
-
-
Amplifier diagnostics
VOL(DIAG)
LOW-level output voltage on pin fault condition; IDIAG = 1 mA
DIAG
-
-
0.3
V
VO(offset_det)
output voltage at offset
detection
1.0
1.3
2.0
V
THDclip
total harmonic distortion clip
detection level
IB2[D7:D6] = 10
-
10
-
%
IB2[D7:D6] = 01
-
5
-
%
VP > 10 V
-
2
-
%
pre-warning average junction
temperature
IB3[D4] = 0 or legacy mode
IB2[D7:D6] = 00
150
160
170
C
IB3[D4] = 1
125
135
145
C
Tj(AV)(G(0.5dB))
average junction temperature
for 0.5 dB gain reduction
Vi = 0.05 V; best efficiency mode
turns off when activated
-
175
-
C
G(th_fold)
gain reduction of thermal
foldback
when all channels switch off
-
20
-
dB
Io
output current
I2C-bus mode; IB5[D7] = 0; AC
load bit set; peak current
IB4[D1] = 1
500
-
-
mA
IB4[D1] = 0
275
-
-
mA
IB4[D1] = 1
-
-
250
mA
IB4[D1] = 0
-
-
100
mA
Tj(AV)(pwarn)
I2C-bus
mode; IB5[D7] = 0; AC
load bit not set; peak current
TDF8546_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
11 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
Table 5.
Characteristics …continued
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
output power
RL = 4 ; VP = 14.4 V;
THD = 0.5 %
18
20
-
W
RL = 4 ; VP = 14.4 V;
THD = 10 %
23
25
-
W
RL = 2 ; VP = 14.4 V;
THD = 0.5 %
29
32
-
W
RL = 2 ; VP = 14.4 V;
THD = 10 %
40
44
-
W
RL = 4 ; VP = 14.4 V;
Vi = 2 V RMS square wave
37
40
-
W
RL = 4 ; VP = 15.2 V;
Vi = 2 V RMS square wave
41
45
-
W
RL = 2 ; VP = 14.4 V;
Vi = 2 V RMS square wave
58
64
-
W
Po = 1 W to 12 W; fi = 1 kHz;
RL = 4 ; BTL mode
-
0.01
0.1
%
Po = 1 W; fi = 1 kHz; RL = 4 ;
VP = 7 V; BTL and best efficiency
mode
-
0.01
0.1
%
Po = 4 W; fi = 1 kHz; RL = 4 ;
best efficiency mode
-
0.03
0.1
%
Po = 1 W to 12 W; fi = 20 kHz;
RL = 4 ; best efficiency mode
-
0.3
0.4
%
Vo = 1 V (RMS) and 4 V (RMS),
fi = 1 kHz; line driver mode
-
0.02
0.05
%
Po = 1 W to 12 W; fi = 1 kHz;
RL = 4 ; low gain mode
-
0.01
0.1
%
65
80
-
dB
55
65
-
dB
55
70
-
dB
common mode input to
differential output (VO(dif) /
VI(cm) + 26 dB)
55
65
-
dB
common mode input to
common mode output (VO(cm) /
VI(cm) + 26 dB)
50
58
-
dB
Amplifier
Po
Po(max)
THD
cs
maximum output power
total harmonic distortion
channel separation
best efficiency mode; RS = 1 k;
RACGND = 250
[4]
fi = 1 kHz
fi = 10 kHz
SVRR
supply voltage ripple rejection
fi = 1 kHz; RS = 1 k;
RACGND = 250 ; best efficiency
mode; tested at VP = 10.5 V
[4]
CMRR
common mode rejection ratio
amplifier mode; Vcm = 0.3 V (p-p);
fi = 1 kHz to 3 kHz, RS = 1 k;
RACGND = 250 ; best efficiency
mode
[4]
TDF8546_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
12 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
Table 5.
Characteristics …continued
Tamb = 25 C; VP = 14.4 V; unless otherwise specified. Tested at Tamb = 25 C; guaranteed for Tj = 40 C to +150 C;
functionality is guaranteed for VP < 10 V unless otherwise specified.
Symbol
Vo
Parameter
Conditions
output voltage variation
Vn(o)
Min
Typ
Max
Unit
from off to mute and mute to off
-
-
7.5
mV
from mute to on and on to mute
(soft mute)
-
-
7.5
mV
from off to on and on to off
(start-up diagnostic enabled)
-
-
7.5
mV
plop during switch-on and
switch-off; best efficiency mode
[5]
filter 20 Hz to 22 kHz (6th order);
RS = 1 k
output noise voltage
mute mode
-
15
23
V
line driver mode
-
25
33
V
amplifier mode; best efficiency
mode
-
43
65
V
amplifier mode; best efficiency
mode; RS = 50
-
40
60
V
Gv(amp)
voltage gain amplifier mode
single-ended in to differential out;
best efficiency mode
25.5
26
26.5
dB
Gv(ld)
voltage gain line driver mode
single-ended in to differential out;
best efficiency mode
15.5
16
16.5
dB
Zi
input impedance
Tamb = 40 C to +105 C
38
62
105
k
Tamb = 0 C to 105 C
55
62
105
k
mute
mute attenuation
Vo(on) / Vo(mute); Vi = 50 mV
80
92
-
dB
Vo(mute)(RMS)
RMS mute output voltage
Vi = 1 V RMS;
filter 20 Hz to 22 kHz
-
16
29
V
Bp
power bandwidth
1 dB
-
20 to
20000
-
Hz
CL(crit)
critical load capacitance
no oscillation; RL between 2
and open load; CL from all
outputs to GND
22
-
-
nF
best efficiency switch-off output best efficiency switch open
voltage
4 load selected; IB5[D4] = 1
-
0.9
-
V
2 load selected; IB5[D4] = 0
-
1.7
-
V
-
1.0
-
Best efficiency mode control
Vo(swoff)be
Rsw(be)
best efficiency switch resistance
[1]
VSTB depends on the current into pin STB: minimum = (1429 ISTB) + 5.4 V, maximum = (3143 ISTB) + 5.6 V.
[2]
The times are specified without leakage current. For a leakage current of 5 A on pin SVR, the delta time is specified. If the capacitor
value on pin SVR changes 30 %, the specified time also changes 30 %. The specified times include an ESR of 15 for the
capacitor on pin SVR.
[3]
Standard I2C-bus specification: maximum LOW-level = 0.3VDD, minimum HIGH-level = 0.7VDD. To comply with 5 V and 3.3 V logic,
VDD = 5 V defines the maximum LOW-level and VDD = 3.3 V defines the minimum HIGH-level.
[4]
For optimum channel separation (cs), supply voltage ripple rejection (SVRR) and common mode rejection ratio (CMRR), a resistor
RS
R ACGND = ------ must be in series with the ACGND capacitor.
4
[5]
The plop-noise during amplifier switch-on and switch-off is measured using an ITU-R 2 k filter; see Figure 4.
TDF8546_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
13 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
input
5th ORDER
20 kHz
BUTTERWORTH
LOW-PASS
FILTER
DIFFERENTIAL
TO
SINGLE −
ENDED
RECTIFIER
PEAK
DETECTOR
ITU-R 2K
FILTER
OUTPUT
BUFFER
+ 40 dB GAIN
output
001aam706
Fig 3.
Location of ITU-R 2K filter
001aam707
10
(4)
output
(dB)
−10
(1)
maximum
6 dB at 6 kHz
−30
0 dB at 2 kHz
(2)
−50
(3)
−70
10
102
103
104
105
f (Hz)
(1) 20 Hz.
(2) A-weighting.
(3) ITU-R average response meter.
(4) 20 kHz bandwidth limit.
Fig 4.
TDF8546_SDS
Product short data sheet
Plop noise test using ITU-R 2K filter
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
14 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
8. Package outline
DBS27P: plastic DIL-bent-SIL (special bent) power package; 27 leads (lead length 6.8 mm)
SOT827-1
non-concave
x
Dh
D
Eh
view B: mounting base side
A2
d
B
j
E
A
L4
L3
L
1
L2
27
e1
Z
w
bp
e
c
Q
v
e2
m
0
10
20 mm
x
Z(1)
scale
1.8
0.03
1.2
Dimensions (mm are the original dimensions)
Unit
max
nom
min
mm
A
A2
bp
c
4.6
0.60
0.5
D(1)
d
Dh
29.2 24.8
19
E(1)
0.45
0.3
e1
e2
Eh
j
L
2
1
4
8
3.55
3.40
3.25
6.8
15.9
12
4.4
e
28.8 24.4
15.5
L2
3.9
L3
L4
1.15 22.9
References
IEC
JEDEC
JEITA
3.1
0.85 22.1
v
w
0.6
0.25
2.1
1.8
sot827-1_po
European
projection
Issue date
13-02-13
13-05-30
SOT827-1
Fig 5.
Q
4
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
Outline
version
m
Package outline SOT827-1 (DBS27P)
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
15 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
HSOP36: plastic, heatsink small outline package; 36 leads; low stand-off height
SOT851-1
D
E
A
x
c
y
X
E2
v
HE
A
D1
D2
1
18
pin 1 index
Q
A
A2
E1
(A 3)
A4
θ
Lp
detail X
36
19
z
w
bp
e
0
5
10 mm
scale
DIMENSIONS (mm are the original dimensions)
A
UNIT max. A2
mm
3.5
A3
A4(1)
+0.08
3.4
0.35
−0.04
3.3
D1
D2
E (2)
E1
E2
e
HE
Lp
Q
0.38 0.32 16.0 13.0
0.25 0.23 15.8 12.6
1.1
0.9
11.1
10.9
6.2
5.8
2.9
2.5
0.65
14.5
13.9
1.1
0.8
1.7
1.5
bp
c
D (2)
v
w
x
y
0.25 0.12 0.03 0.07
Z
θ
2.55
2.20
8°
0°
Notes
1. Limits per individual lead.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
OUTLINE
VERSION
REFERENCES
IEC
JEDEC
JEITA
ISSUE DATE
04-03-09
04-05-25
SOT851-1
Fig 6.
EUROPEAN
PROJECTION
Package outline SOT851-1 (HSOP36)
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
16 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
DBSMS27P: plastic dual bent surface mounted SIL power package; 27 leads
SOT1154-1
L4
L3
θ2
gauge plane seating plane
A3 S
R
1
R
2
D
θ1
y
Lp2
Lp1
aaa S
c
detail X
non-concave
x
d
A2
Dh
Eh
E
j
27
L1
1
L2
A1
e1
e
Z
Q
R1
0
10
A
A1
max 4.65 0.10
nom 4.50 0.00
min 4.35 -0.08
mm
A2
4.6
4.5
4.4
D(1)
A3
bp
c
0.5
0.60
0.50
0.45
0.5
0.4
0.3
d
29.2 24.8
29.0 24.6
28.8 24.4
R2
0.85 0.35
0.60 0.25
0.35 0.15
20 mm
scale
Dimensions
Unit
c X
v
w
bp
Dh
E(1)
12
15.9
15.7
15.5
e
2
e1
1
aaa
v
0.1
0.6
j
Eh
8
L1
w
x
0.25 0.03
L2
3.55 3.03 5.03
3.40 2.83 4.83
3.25 2.63 4.63
References
IEC
JEDEC
JEITA
SOT1154-1
---
---
---
Fig 7.
Z(1)
θ1
θ2
1.8
1.5
1.2
9°
10°
0.1
3°
4°
Lp2
Q
L3
L4
Lp1
1.2
1.0
0.8
3.2
3.0
2.8
1.43 1.43 2.10
1.25 1.25 1.95
1.07 1.07 1.80
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
Outline
version
y
sot1154-1_po
European
projection
Issue date
12-12-19
13-02-13
Package outline SOT1154-1 (DBSMS27P)
TDF8546_SDS
Product short data sheet
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Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
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TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
9. Revision history
Table 6.
Revision history
Document ID
Release date
Data sheet status
Change notice
Supersedes
TDF8546 v.8
20130927
Product short data sheet
-
-
TDF8546_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
18 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
10. Legal information
10.1 Data sheet status
Document status[1][2]
Product status[3]
Definition
Objective [short] data sheet
Development
This document contains data from the objective specification for product development.
Preliminary [short] data sheet
Qualification
This document contains data from the preliminary specification.
Product [short] data sheet
Production
This document contains the product specification.
[1]
Please consult the most recently issued document before initiating or completing a design.
[2]
The term ‘short data sheet’ is explained in section “Definitions”.
[3]
The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status
information is available on the Internet at URL http://www.nxp.com.
10.2 Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. NXP Semiconductors does not give any
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of
use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is intended
for quick reference only and should not be relied upon to contain detailed and
full information. For detailed and full information see the relevant full data
sheet, which is available on request via the local NXP Semiconductors sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
NXP Semiconductors and its customer, unless NXP Semiconductors and
customer have explicitly agreed otherwise in writing. In no event however,
shall an agreement be valid in which the NXP Semiconductors product is
deemed to offer functions and qualities beyond those described in the
Product data sheet.
10.3 Disclaimers
Limited warranty and liability — Information in this document is believed to
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or
completeness of such information and shall have no liability for the
consequences of use of such information. NXP Semiconductors takes no
responsibility for the content in this document if provided by an information
source outside of NXP Semiconductors.
In no event shall NXP Semiconductors be liable for any indirect, incidental,
punitive, special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal or
replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards
customer for the products described herein shall be limited in accordance
with the Terms and conditions of commercial sale of NXP Semiconductors.
Right to make changes — NXP Semiconductors reserves the right to make
changes to information published in this document, including without
limitation specifications and product descriptions, at any time and without
notice. This document supersedes and replaces all information supplied prior
to the publication hereof.
TDF8546_SDS
Product short data sheet
Suitability for use in automotive applications — This NXP
Semiconductors product has been qualified for use in automotive
applications. Unless otherwise agreed in writing, the product is not designed,
authorized or warranted to be suitable for use in life support, life-critical or
safety-critical systems or equipment, nor in applications where failure or
malfunction of an NXP Semiconductors product can reasonably be expected
to result in personal injury, death or severe property or environmental
damage. NXP Semiconductors and its suppliers accept no liability for
inclusion and/or use of NXP Semiconductors products in such equipment or
applications and therefore such inclusion and/or use is at the customer's own
risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no
representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors
accepts no liability for any assistance with applications or customer product
design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
customer’s third party customer(s). Customers should provide appropriate
design and operating safeguards to minimize the risks associated with their
applications and products.
NXP Semiconductors does not accept any liability related to any default,
damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
customer(s). NXP does not accept any liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those given in
the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — NXP Semiconductors
products are sold subject to the general terms and conditions of commercial
sale, as published at http://www.nxp.com/profile/terms, unless otherwise
agreed in a valid written individual agreement. In case an individual
agreement is concluded only the terms and conditions of the respective
agreement shall apply. NXP Semiconductors hereby expressly objects to
applying the customer’s general terms and conditions with regard to the
purchase of NXP Semiconductors products by customer.
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
19 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
No offer to sell or license — Nothing in this document may be interpreted or
construed as an offer to sell products that is open for acceptance or the grant,
conveyance or implication of any license under any copyrights, patents or
other industrial or intellectual property rights.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
10.4 Trademarks
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
I2C-bus — logo is a trademark of NXP B.V.
11. Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
TDF8546_SDS
Product short data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 27 September 2013
© NXP B.V. 2013. All rights reserved.
20 of 21
TDF8546
NXP Semiconductors
I2C-bus controlled 4 45 W best efficiency amplifier
12. Contents
1
2
3
4
5
5.1
5.2
6
7
8
9
10
10.1
10.2
10.3
10.4
11
12
General description . . . . . . . . . . . . . . . . . . . . . . 1
Features and benefits . . . . . . . . . . . . . . . . . . . . 1
Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
Ordering information . . . . . . . . . . . . . . . . . . . . . 3
Pinning information . . . . . . . . . . . . . . . . . . . . . . 4
Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal characteristics . . . . . . . . . . . . . . . . . . 7
Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Package outline . . . . . . . . . . . . . . . . . . . . . . . . 15
Revision history . . . . . . . . . . . . . . . . . . . . . . . . 18
Legal information. . . . . . . . . . . . . . . . . . . . . . . 19
Data sheet status . . . . . . . . . . . . . . . . . . . . . . 19
Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Contact information. . . . . . . . . . . . . . . . . . . . . 20
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2013.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 27 September 2013
Document identifier: TDF8546_SDS
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