1SMB20AT3G

1SMB5.0AT3 Series 600 Watt Peak Power Zener Transient Voltage Suppressors Unidirectional* http://onsemi.com The SMB series is designed to protect voltage sensitive components from high voltage, high energy transients. They have excellent clamping capability, high surge capability, low zener impedance and fast response time. The SMB series is supplied in ON Semiconductor’s exclusive, cost-effective, highly reliable Surmetict package and is ideally suited for use in communication systems, automotive, numerical controls, process controls, medical equipment, business machines, power supplies and many other industrial/consumer applications. Features PLASTIC SURFACE MOUNT ZENER OVERVOLTAGE TRANSIENT SUPPRESSORS 5.0 V − 170 V, 600 W PEAK POWER Cathode Anode • • • • • • • • • Working Peak Reverse Voltage Range − 5.0 V to 170 V Standard Zener Breakdown Voltage Range − 6.7 V to 199 V Peak Power − 600 W @ 1.0 ms ESD Rating of Class 3 (>16 kV) per Human Body Model Maximum Clamp Voltage @ Peak Pulse Current Low Leakage < 5.0 mA Above 10 V UL 497B for Isolated Loop Circuit Protection Response Time is Typically < 1.0 ns Pb−Free Packages are Available A Y WW xx G SMB CASE 403A PLASTIC MARKING DIAGRAM AYWW xx G G = Assembly Location = Year = Work Week = Device Code (Refer to page 3) = Pb−Free Package Mechanical Characteristics CASE: Void-free, transfer-molded, thermosetting plastic FINISH: All external surfaces are corrosion resistant and leads are readily solderable MAXIMUM CASE TEMPERATURE FOR SOLDERING PURPOSES: 260°C for 10 Seconds LEADS: Modified L−Bend providing more contact area to bond pads POLARITY: Cathode indicated by polarity band MOUNTING POSITION: Any (Note: Microdot may be in either location) ORDERING INFORMATION Device 1SMBxxxAT3 1SMBxxxAT3G Package SMB SMB (Pb−Free) Shipping † 2500/Tape & Reel 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. DEVICE MARKING INFORMATION See specific marking information in the device marking column of the Electrical Characteristics table on page 3 of this data sheet. © Semiconductor Components Industries, LLC, 2007 1 February, 2007 − Rev. 10 Publication Order Number: 1SMB5.0AT3/D 1SMB5.0AT3 Series MAXIMUM RATINGS Rating Peak Power Dissipation (Note 1) @ TL = 25°C, Pulse Width = 1 ms DC Power Dissipation @ TL = 75°C Measured Zero Lead Length (Note 2) Derate Above 75°C Thermal Resistance from Junction−to−Lead DC Power Dissipation (Note 3) @ TA = 25°C Derate Above 25°C Thermal Resistance from Junction−to−Ambient Forward Surge Current (Note 4) @ TA = 25°C Operating and Storage Temperature Range Symbol PPK PD Value 600 3.0 40 25 0.55 4.4 226 100 −65 to +150 Unit W W mW/°C °C/W W mW/°C °C/W A °C RqJL PD RqJA IFSM TJ, Tstg Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. 10 X 1000 ms, non−repetitive. 2. 1 in square copper pad, FR−4 board. 3. FR−4 board, using ON Semiconductor minimum recommended footprint, as shown in 403A case outline dimensions spec. 4. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, duty cycle = 4 pulses per minute maximum. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted, VF = 3.5 V Max. @ IF (Note 5) = 30 A) Symbol IPP VC VRWM IR VBR IT IF VF Parameter Maximum Reverse Peak Pulse Current Clamping Voltage @ IPP Working Peak Reverse Voltage Maximum Reverse Leakage Current @ VRWM Breakdown Voltage @ IT Test Current Forward Current Forward Voltage @ IF VC VBR VRWM I IF IR VF IT V IPP 5. 1/2 sine wave (or equivalent square wave), PW = 8.3 ms, non−repetitive duty cycle. Uni−Directional TVS http://onsemi.com 2 1SMB5.0AT3 Series ELECTRICAL CHARACTERISTICS (Devices listed in bold, italic are ON Semiconductor Preferred devices.) VRWM (Note 6) V 5.0 6.0 6.5 7.0 7.5 8.0 8.5 9.0 10 11 12 13 14 15 16 17 18 20 22 24 26 28 30 33 36 40 43 45 48 51 54 58 60 64 70 75 85 90 100 110 120 130 150 160 170 Breakdown Voltage IR @ VRWM mA 800 800 500 500 100 50 10 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 55.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 5.0 VBR (Note 7) Volts Min 6.40 6.67 7.22 7.78 8.33 8.89 9.44 10.0 11.1 12.2 13.3 14.4 15.6 16.7 17.8 18.9 20.0 22.2 24.4 26.7 28.9 31.1 33.3 36.7 40.0 44.4 47.8 50.0 53.3 56.7 60.0 64.4 66.7 71.1 77.8 83.3 94.4 100 111 122 133 144 167 178 189 Nom 6.7 7.02 7.6 8.19 8.77 9.36 9.92 10.55 11.7 12.85 14 15.15 16.4 17.6 18.75 19.9 21.05 23.35 25.65 28.1 30.4 32.75 35.05 38.65 42.1 46.75 50.3 52.65 56.1 59.7 63.15 67.8 70.2 74.85 81.9 87.7 99.2 105.5 117 128.5 140 151.5 176 187.5 199 Max 7.0 7.37 7.98 8.6 9.21 9.83 10.4 11.1 12.3 13.5 14.7 15.9 17.2 18.5 19.7 20.9 22.1 24.5 26.9 29.5 31.9 34.4 36.8 40.6 44.2 49.1 52.8 55.3 58.9 62.7 66.3 71.2 73.7 78.6 86 92.1 104 111 123 135 147 159 185 197 209 @ IT mA 10 10 10 10 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 VC @ IPP (Note 8) VC V 9.2 10.3 11.2 12.0 12.9 13.6 14.4 15.4 17.0 18.2 19.9 21.5 23.2 24.4 26.0 27.6 29.2 32.4 35.5 38.9 42.1 45.4 48.4 53.3 58.1 64.5 69.4 72.7 77.4 82.4 87.1 93.6 96.8 103 113 121 137 146 162 177 193 209 243 259 275 IPP A 65.2 58.3 53.6 50.0 46.5 44.1 41.7 39.0 35.3 33.0 30.2 27.9 25.8 24.0 23.1 21.7 20.5 18.5 16.9 15.4 14.2 13.2 12.4 11.3 10.3 9.3 8.6 8.3 7.7 7.3 6.9 6.4 6.2 5.8 5.3 4.9 4.4 4.1 3.7 3.4 3.1 2.9 2.5 2.3 2.2 Ctyp (Note 9) pF 2700 2300 2140 2005 1890 1780 1690 1605 1460 1345 1245 1160 1085 1020 965 915 870 790 730 675 630 590 555 510 470 430 400 385 365 345 330 310 300 280 260 245 220 210 190 175 160 150 135 125 120 Device* 1SMB5.0AT3, G 1SMB6.0AT3, G 1SMB6.5AT3, G 1SMB7.0AT3, G 1SMB7.5AT3, G 1SMB8.0AT3, G 1SMB8.5AT3, G 1SMB9.0AT3, G 1SMB10AT3, G 1SMB11AT3, G 1SMB12AT3, G 1SMB13AT3, G 1SMB14AT3, G 1SMB15AT3, G 1SMB16AT3, G 1SMB17AT3, G 1SMB18AT3, G 1SMB20AT3, G 1SMB22AT3, G 1SMB24AT3, G 1SMB26AT3, G 1SMB28AT3, G 1SMB30AT3, G 1SMB33AT3, G 1SMB36AT3, G 1SMB40AT3, G 1SMB43AT3, G 1SMB45AT3, G 1SMB48AT3, G 1SMB51AT3, G 1SMB54AT3, G 1SMB58AT3, G 1SMB60AT3, G 1SMB64AT3, G 1SMB70AT3, G 1SMB75AT3, G 1SMB85AT3, G 1SMB90AT3, G 1SMB100AT3, G 1SMB110AT3, G 1SMB120AT3, G 1SMB130AT3, G 1SMB150AT3, G 1SMB160AT3, G 1SMB170AT3, G Device Marking KE KG KK KM KP KR KT KV KX KZ LE LG LK LM LP LR LT LV LX LZ ME MG MK MM MP MR MT MV MX MZ NE NG NK NM NP NR NV NX NZ PE PG PK PM PP PR 6. A transient suppressor is normally selected according to the working peak reverse voltage (VRWM), which should be equal to or greater than the DC or continuous peak operating voltage level. 7. VBR measured at pulse test current IT at an ambient temperature of 25°C. 8. Surge current waveform per Figure 2 and derate per Figure 4 of the General Data − 600 W at the beginning of this group. 9. Bias Voltage = 0 V, F = 1 MHz, TJ = 25°C †Please see 1SMB10CAT3 to 1SMB78CAT3 for Bidirectional devices. * The “G” suffix indicates Pb−Free package available. http://onsemi.com 3 1SMB5.0AT3 Series 100 PPK, PEAK POWER (kW) NONREPETITIVE PULSE WAVEFORM SHOWN IN FIGURE 2 10 tr ≤ 10 ms 100 VALUE (%) PEAK VALUE − IPP I HALF VALUE − PP 2 PULSE WIDTH (tP) IS DEFINED AS THAT POINT WHERE THE PEAK CURRENT DECAYS TO 50% OF IPP. 1 50 tP 0.1 0.1 ms 1 ms 10 ms 100 ms 1 ms 10 ms 0 0 1 2 3 t, TIME (ms) 4 5 tP, PULSE WIDTH Figure 1. Pulse Rating Curve Figure 2. Pulse Waveform 160 PEAK PULSE DERATING IN % OF PEAK POWER OR CURRENT @ T = 25° C A 140 10,000 TJ = 25°C f = 1 MHz 1SMB5.0AT3G C, CAPACITANCE (pF) 1000 1SMB10AT3G 100 120 100 80 60 40 20 0 0 25 50 75 100 125 150 1SMB48AT3G 10 1SMB170AT3G 1 1 10 100 1000 BIAS VOLTAGE (VOLTS) TA, AMBIENT TEMPERATURE (°C) Figure 3. Pulse Derating Curve Figure 4. Typical Junction Capacitance vs. Bias Voltage Zin Vin LOAD VL Figure 5. Typical Protection Circuit http://onsemi.com 4 1SMB5.0AT3 Series APPLICATION NOTES RESPONSE TIME In most applications, the transient suppressor device is placed in parallel with the equipment or component to be protected. In this situation, there is a time delay associated with the capacitance of the device and an overshoot condition associated with the inductance of the device and the inductance of the connection method. The capacitive effect is of minor importance in the parallel protection scheme because it only produces a time delay in the transition from the operating voltage to the clamp voltage as shown in Figure 6. The inductive effects in the device are due to actual turn-on time (time required for the device to go from zero current to full current) and lead inductance. This inductive effect produces an overshoot in the voltage across the equipment or component being protected as shown in Figure 7. Minimizing this overshoot is very important in the application, since the main purpose for adding a transient suppressor is to clamp voltage spikes. The SMB series have a very good response time, typically < 1.0 ns and negligible inductance. However, external inductive effects could produce unacceptable overshoot. Proper circuit layout, minimum lead lengths and placing the suppressor device as close as possible to the equipment or components to be protected will minimize this overshoot. Some input impedance represented by Zin is essential to prevent overstress of the protection device. This impedance should be as high as possible, without restricting the circuit operation. DUTY CYCLE DERATING The data of Figure 1 applies for non-repetitive conditions and at a lead temperature of 25°C. If the duty cycle increases, the peak power must be reduced as indicated by the curves of Figure 8. Average power must be derated as the lead or ambient temperature rises above 25°C. The average power derating curve normally given on data sheets may be normalized and used for this purpose. At first glance the derating curves of Figure 8 appear to be in error as the 10 ms pulse has a higher derating factor than the 10 ms pulse. However, when the derating factor for a given pulse of Figure 8 is multiplied by the peak power value of Figure 1 for the same pulse, the results follow the expected trend. http://onsemi.com 5 1SMB5.0AT3 Series OVERSHOOT DUE TO INDUCTIVE EFFECTS Vin (TRANSIENT) VL VL V Vin (TRANSIENT) V Vin td tD = TIME DELAY DUE TO CAPACITIVE EFFECT t t Figure 6. Figure 7. 1 0.7 0.5 DERATING FACTOR 0.3 0.2 0.1 0.07 0.05 0.03 0.02 10 ms 0.01 0.1 0.2 0.5 1 2 5 10 D, DUTY CYCLE (%) 20 50 100 100 ms PULSE WIDTH 10 ms 1 ms Figure 8. Typical Derating Factor for Duty Cycle UL RECOGNITION The entire series has Underwriters Laboratory Recognition for the classification of protectors (QVGV2) under the UL standard for safety 497B and File #E210057. Many competitors only have one or two devices recognized or have recognition in a non-protective category. Some competitors have no recognition at all. With the UL497B recognition, our parts successfully passed several tests including Strike Voltage Breakdown test, Endurance Conditioning, Temperature test, Dielectric Voltage-Withstand test, Discharge test and several more. Whereas, some competitors have only passed a flammability test for the package material, we have been recognized for much more to be included in their Protector category. http://onsemi.com 6 1SMB5.0AT3 Series PACKAGE DIMENSIONS SMB CASE 403A−03 ISSUE F HE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. D DIMENSION SHALL BE MEASURED WITHIN DIMENSION P. DIM A A1 b c D E HE L L1 MIN 1.90 0.05 1.96 0.15 3.30 4.06 5.21 0.76 MILLIMETERS NOM MAX 2.13 2.45 0.10 0.20 2.03 2.20 0.23 0.31 3.56 3.95 4.32 4.60 5.44 5.60 1.02 1.60 0.51 REF MIN 0.075 0.002 0.077 0.006 0.130 0.160 0.205 0.030 INCHES NOM 0.084 0.004 0.080 0.009 0.140 0.170 0.214 0.040 0.020 REF MAX 0.096 0.008 0.087 0.012 0.156 0.181 0.220 0.063 b D A L L1 c A1 SOLDERING FOOTPRINT* 2.261 0.089 2.743 0.108 2.159 0.085 SCALE 8:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. SURMETIC is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 7 1SMB5.0AT3/D