2N6052
Preferred Device
Darlington Complementary
Silicon Power Transistors
This package is designed for general−purpose amplifier and low
frequency switching applications.
Features
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• High DC Current Gain — hFE = 3500 (Typ) @ IC = 5.0 Adc
• Collector−Emitter Sustaining Voltage — @ 100 mA
VCEO(sus) = 100 Vdc (Min)
• Monolithic Construction with Built−In Base−Emitter Shunt Resistors
• This is a Pb−Free Device*
12 AMPERE
COMPLEMENTARY SILICON
POWER TRANSISTOR
100 VOLTS, 150 WATTS
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
VCEO
100
Vdc
Collector−Base Voltage
VCB
100
Vdc
Emitter−Base Voltage
VEB
5.0
Vdc
Collector Current − Continuous
Peak
IC
12
20
Adc
Base Current
IB
0.2
Adc
Total Power Dissipation @ TC = 25°C
Derate above 25°C
PD
150
0.857
W
W/°C
Operating and Storage Temperature
Range
TJ, Tstg
−65 to + 200
°C
Characteristic
Symbol
Max
Unit
Thermal Resistance, Junction−to−Case
RqJC
1.17
°C/W
Collector−Emitter Voltage
COLLECTOR
CASE
BASE
1
EMITTER 2
MARKING
DIAGRAM
THERMAL CHARACTERISTICS
2
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Indicates JEDEC Registered Data.
PD, POWER DISSIPATION (WATTS)
160
TO−204AA (TO−3)
CASE 1−07
STYLE 1
2N6052
G
A
YY
WW
MEX
140
120
100
2N6052G
AYYWW
MEX
1
=
=
=
=
=
=
Device Code
Pb−Free Package
Location Code
Year
Work Week
Country of Orgin
80
60
ORDERING INFORMATION
40
Device
20
0
2N6052G
0
25
50
75
100
125
150
TC, CASE TEMPERATURE (°C)
175
Package
Shipping
TO−3
(Pb−Free)
100 Units/Tray
200
Preferred devices are recommended choices for future use
and best overall value.
Figure 1. Power Derating
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2008
September, 2008 − Rev. 5
1
Publication Order Number:
2N6052/D
2N6052
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ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) (Note 2)
Characteristic
Symbol
Min
Max
Unit
(IC = 100 mAdc, IB = 0)
VCEO(sus)
100
−
Vdc
(VCE = 50 Vdc, IB = 0)
ICEO
−
1.0
mAdc
−
−
0.5
5.0
−
2.0
750
100
18,000
−
−
−
2.0
3.0
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3)
Collector Cutoff Current
Collector Cutoff Current
(VCE = Rated VCEO, VBE(off) = 1.5 Vdc)
(VCE = Rated VCEO, VBE(off) = 1.5 Vdc, TC = 150_C)
Emitter Cutoff Current
(VBE = 5.0 Vdc, IC = 0)
ICEX
mAdc
IEBO
mAdc
ON CHARACTERISTICS (Note 3)
DC Current Gain
(IC = 6.0 Adc, VCE = 3.0 Vdc)
(IC = 12 Adc, VCE = 3.0 Vdc)
Collector−Emitter Saturation Voltage
(IC = 6.0 Adc, IB = 24 mAdc)
(IC = 12 Adc, IB = 120 mAdc)
hFE
−
VCE(sat)
Vdc
Base−Emitter Saturation Voltage
(IC = 12 Adc, IB = 120 mAdc)
VBE(sat)
−
4.0
Vdc
Base−Emitter On Voltage
(IC = 6.0 Adc, VCE = 3.0 Vdc)
VBE(on)
−
2.8
Vdc
Magnitude of Common Emitter Small−Signal Short Circuit Forward
Current Transfer Ratio
(IC = 5.0 Adc, VCE = 3.0 Vdc, f = 1.0 MHz)
|hfe|
4.0
−
MHz
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
Cob
−
500
pF
(IC = 5.0 Adc, VCE = 3.0 Vdc, f = 1.0 kHz)
hfe
300
−
−
DYNAMIC CHARACTERISTICS
Small−Signal Current Gain
2. Indicates JEDEC Registered Data.
3. Pulse test: Pulse Width = 300 ms, Duty Cycle = 2.0%.
10
VCC
-30 V
RB & RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
D1 MUST BE FAST RECOVERY TYPE, eg:
1N5825 USED ABOVE IB ≈ 100 mA
MSD6100 USED BELOW IB ≈ 100 mA
RC
ts
SCOPE
TUT
V2
approx
+8.0 V
51
V1
approx
-8.0 V
D1
≈ 5.0 k
t, TIME (s)
μ
RB
0
≈ 50
tr, tf ≤ 10 ns
DUTY CYCLE = 1.0%
2.0
tf
1.0
tr
0.5
+4.0 V
25 ms
2N6052
2N6059
5.0
td @ VBE(off) = 0
for td and tr, D1 is disconnected
and V2 = 0
0.2
0.1
0.2
For NPN test circuit reverse diode and voltage polarities.
Figure 2. Switching Times Test Circuit
0.5
5.0
1.0
3.0
IC, COLLECTOR CURRENT (AMP)
Figure 3. Switching Times
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2
VCC = 30 V
IC/IB = 250
IB1 = IB2
TJ = 25°C
10
20
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
2N6052
1.0
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
0.1
0.07
0.05
P(pk)
RqJC(t) = r(t) RqJC
RqJC = 1.17°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
t1
READ TIME AT t1
t2
TJ(pk) - TC = P(pk) qJC(t)
DUTY CYCLE, D = t1/t2
0.05
0.02
0.03
0.01
0.02
SINGLE
PULSE
0.01
0.01
0.02
0.03 0.05 0.1
0.2 0.3
0.5
1.0
2.0 3.0 5.0
t, TIME (ms)
10
20
30
50
100
200 300
500
1000
Figure 4. Thermal Response
ACTIVE−REGION SAFE OPERATING AREA
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figures 5, and 6 is based on TJ(pk) = 200_C;
TC is variable depending on conditions. Second breakdown
pulse limits are valid for duty cycles to 10% provided
TJ(pk) v 200_C; TJ(pk) may be calculated from the data in
Figure 4. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown.
IC, COLLECTOR CURRENT (AMP)
50
0.1 ms
20
10
0.5 ms
5.0
1.0 ms
2.0
5.0 ms
1.0
TJ = 200°C
0.5
SECOND BREAKDOWN LIMITED
0.2
BONDING WIRE LIMITED
0.1
THERMAL LIMITATION
@TC = 25°C (SINGLE PULSE)
0.05
10
20
30
d
c
50
70
100
VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS)
500
3000
2000
TC = 25°C
VCE = 3.0 V
IC = 5.0 A
1000
TJ = 25°C
300
C, CAPACITANCE (pF)
hfe, SMALL-SIGNAL CURRENT GAIN
Figure 5.
500
200
100
200
Cib
Cob
100
70
50
30
1.0
2.0
5.0
10
20
50 100
f, FREQUENCY (kHz)
200
50
0.1
500 1000
0.2
10 20
0.5 1.0 2.0
5.0
VR, REVERSE VOLTAGE (VOLTS)
Figure 7. Capacitance
Figure 6. Small−Signal Current Gain
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3
50
100
2N6052
20,000
VCE = 3.0 V
hFE , DC CURRENT GAIN
10,000
TJ = 150°C
5000
3000
25°C
2000
1000
-55°C
500
300
200
0.2 0.3
0.5
1.0
2.0 3.0
5.0
IC, COLLECTOR CURRENT (AMP)
20
10
VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS)
Figure 8. DC Current Gain
3.0
TJ = 25°C
2.6
IC = 3.0 A
6.0 A
9.0 A
12 A
2.2
1.8
1.4
1.0
0.5
5.0
2.0 3.0
10
IB, BASE CURRENT (mA)
1.0
20 30
50
Figure 9. Collector Saturation Region
3.0
TJ = 25°C
V, VOLTAGE (VOLTS)
2.5
2.0
1.5
VBE(sat) @ IC/IB = 250
VBE @ VCE = 3.0 V
1.0
VCE(sat) @ IC/IB = 250
0.5
0.2 0.3
0.5
1.0
2.0 3.0
5.0
IC, COLLECTOR CURRENT (AMP)
Figure 10. “On” Voltages
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4
10
20
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 1−07
ISSUE Z
DATE 05/18/1988
SCALE 1:1
A
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO-204AA OUTLINE SHALL APPLY.
C
−T−
E
D
K
2 PL
0.13 (0.005)
U
T Q
M
M
Y
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
M
−Y−
L
V
SEATING
PLANE
2
H
G
B
M
T Y
1
−Q−
0.13 (0.005)
INCHES
MIN
MAX
1.550 REF
--1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
--0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
--26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
--21.08
3.84
4.19
30.15 BSC
3.33
4.77
M
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
STYLE 2:
PIN 1. BASE
2. COLLECTOR
CASE: EMITTER
STYLE 3:
PIN 1. GATE
2. SOURCE
CASE: DRAIN
STYLE 4:
PIN 1. GROUND
2. INPUT
CASE: OUTPUT
STYLE 6:
PIN 1. GATE
2. EMITTER
CASE: COLLECTOR
STYLE 7:
PIN 1. ANODE
2. OPEN
CASE: CATHODE
STYLE 8:
PIN 1. CATHODE #1
2. CATHODE #2
CASE: ANODE
STYLE 9:
PIN 1. ANODE #1
2. ANODE #2
CASE: CATHODE
STYLE 5:
PIN 1. CATHODE
2. EXTERNAL TRIP/DELAY
CASE: ANODE
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
© Semiconductor Components Industries, LLC, 2000
January, 2000 − Rev. 07Z
1
Case Outline Number:
1
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