2N6497
High Voltage NPN Silicon
Power Transistors
These devices are designed for high voltage inverters, switching
regulators and line−operated amplifier applications. Especially well
suited for switching power supply applications.
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Features
• High Collector−Emitter Sustaining Voltage −
•
•
•
5 AMPERE
POWER TRANSISTORS
NPN SILICON
250 VOLTS − 80 WATTS
VCEO(sus) = 250 Vdc (Min)
Excellent DC Current Gain −
hFE = 10−75 @ IC = 2.5 Adc
Low Collector−Emitter Saturation Voltage @ IC = 2.5 Adc −
VCE(sat) = 1.0 Vdc (Max)
Pb−Free Packages are Available*
MARKING
DIAGRAM
MAXIMUM RATINGS (Note 1)
Rating
Symbol
Value
Unit
VCEO
250
Vdc
Collector−Base Voltage
VCB
350
Vdc
Emitter−Base Voltage
VEB
6.0
Vdc
Collector Current − Continuous
− Peak
IC
5.0
10
Adc
Base Current
IB
2.0
Adc
Total Power Dissipation @ TC = 25_C
Derate above 25_C
PD
80
0.64
W
W/°C
TJ, Tstg
−65 to +150
°C
Symbol
Max
Unit
RqJC
1.56
_C/W
Collector−Emitter Voltage
Operating and Storage Junction
Temperature Range
4
TO−220AB
CASE 221A
STYLE 1
1
2
3
2N6497
G
A
Y
WW
THERMAL CHARACTERISTICS
Characteristics
Thermal Resistance, Junction−to−Case
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Indicates JEDEC Registered Data.
2N6497G
AYWW
=
=
=
=
=
Device Code
Pb−Free Package
Assembly Location
Year
Work Week
ORDERING INFORMATION
Package
Shipping
2N6497
Device
TO−220AB
50 Units / Rail
2N6497G
TO−220AB
(Pb−Free)
50 Units / Rail
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
August, 2006 − Rev. 13
1
Publication Order Number:
2N6497/D
2N6497
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ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) (Note 2)
Characteristic
Symbol
Min
Typ
Max
Unit
VCEO(sus)
250
−
−
Vdc
−
−
−
−
1.0
10
−
−
1.0
10
3.0
−
−
75
−
−
−
−
−
1.0
5.0
−
−
−
−
1.5
2.5
5.0
−
−
Cob
−
−
150
pF
Rise Time (VCC = 125 Vdc, IC = 2.5 Adc, IB1 = 0.5 Adc)
tr
−
0.4
1.0
ms
Storage Time
(VCC = 125 Vdc, IC = 2.5 Adc, VBE = 5.0 Vdc, IB1 = IB2 = 0.5 Adc)
ts
−
1.4
2.5
Fall Time (VCC = 125 Vdc, IC = 2.5 Adc, IB1 = IB2 = 0.5 Adc)
tf
−
0.45
1.0
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3) (IC = 25 mAdc, IB = 0)
Collector Cutoff Current
(VCE = 350 Vdc, VBE(off) = 1.5 Vdc)
(VCE = 175 Vdc, VBE(off) = 1.5 Vdc, TC = 100_C)
ICEX
Emitter Cutoff Current (VBE = 6.0 Vdc, IC = 0)
IEBO
mAdc
mAdc
ON CHARACTERISTICS (Note 3)
DC Current Gain
(IC = 2.5 Adc, VCE = 10 Vdc)
(IC = 5.0 Adc, VCE = 10 Vdc)
hFE
Collector−Emitter Saturation Voltage
(IC = 2.5 Adc, IB = 500 mAdc)
(IC = 5.0 Adc, IB = 2.0 Adc)
VCE(sat)
Base−Emitter Saturation Voltage
(IC = 2.5 Adc, IB = 500 mAdc)
(IC = 5.0 Adc, IB = 2.0 Adc)
VBE(sat)
−
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product
(IC = 250 mAdc, VCE = 10 Vdc, f = 1.0 MHz)
fT
Output Capacitance (VCB = 10 Vdc, IE = 0, f = 100 kHz)
MHz
SWITCHING CHARACTERISTICS
ms
ms
2. Indicates JEDEC Registered Data.
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%.
VCC
+ 125 V
25 ms
1.0
0.7
0.5
RC [ 50
+ 11 V
0.3
SCOPE
− 9.0 V
tr, tf v 10 ns
DUTY CYCLE = 1.0%
t, TIME (s)
μ
RB [ 20
0
D1
− 5.0 V
0.2
tr
0.1
0.07
0.05
0.03
RB AND RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
VCC = 125 V
IC/IB = 5.0
TJ = 25°C
td @ VBE(off) = 5.0 V
0.02
D1 MUST BE FAST RECOVERY TYPE, e.g.:
1N5825 USED ABOVE IB [ 100 mA
MSD6100 USED BELOW IB [ 100 mA
0.01
0.05 0.07 0.1
Figure 1. Switching Time Test Circuit
0.2 0.3
0.5 0.7 1.0
2.0 3.0
IC, COLLECTOR CURRENT (AMP)
Figure 2. Turn−On Time
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2
5.0
r(t) EFFECTIVE TRANSIENT
THERMAL RESISTANCE (NORMALIZED)
2N6497
1.0
0.7
0.5
D = 0.5
0.3
0.2
0.2
0.1
0.07
0.05
0.1
P(pk)
0.05
t1
0.03
SINGLE
PULSE
t2
SINGLE PULSE
0.01
0.02
0.01
0.01
RqJC(max) = 1.56°C/W
0.02
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) − TC = P(pk) RqJC(t)
DUTY CYCLE, D = t1/t2
0.02 0.03
0.05
0.1
0.2 0.3
0.5
1.0
2.0 3.0 5.0
10
t, TIME OR PULSE WIDTH (ms)
20
30
50
100
200 300
500
1000
Figure 3. Thermal Response
20
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 4 is based on TC = 25_C; TJ(pk) is
variable depending on power level. Second breakdown
pulse limits are valid for duty cycles to 10% provided TJ(pk)
v 150_C. TJ(pk) may be calculated from the data in
Figure 3. At high case temperatures, thermal limitations will
reduce the power that can be handled to values less than the
limitations imposed by second breakdown. Second
breakdown limitations do not derate the same as thermal
limitations. Allowable current at the voltage shown on
Figure 4 may be found at any case temperature by using the
appropriate curve on Figure 6.
IC, COLLECTOR CURRENT (AMP)
10
5.0
dc
2.0
5.0 ms
1.0 ms
100 ms
1.0
TC = 25°C
0.5
BONDING WIRE LIMITED
THERMAL LIMIT (SINGLE PULSE)
SECOND BREAKDOWN LIMIT
0.2
0.1
0.05
0.02
CURVES APPLY BELOW RATED VCEO
5.0 7.0
10
20 30
50 70 100
200 300
VCE, COLLECTOR−EMITTER VOLTAGE (VOLTS)
500
Figure 4. Active−Region Safe Operating Area
100
ts
t, TIME (s)
μ
3.0
VCC = 125 V
IC/IB = 5.0
TJ = 25°C
POWER DERATING FACTOR (%)
10
7.0
5.0
2.0
1.0
0.7
0.5
0.3
tf
0.2
0.1
0.05 0.07 0.1
0.2 0.3
0.5 0.7 1.0
2.0
IC, COLLECTOR CURRENT (AMP)
3.0
60
THERMAL DERATING
40
20
0
5.0
SECOND BREAKDOWN DERATING
80
0
Figure 5. Turn−Off Time
20
40
60
80
100
120
TC, CASE TEMPERATURE (°C)
Figure 6. Power Derating
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3
140
160
100
TJ = 150°C
VCE = 10 V
70
hFE , DC CURRENT GAIN
VCE , COLLECTOR−EMITTER VOLTAGE (VOLTS)
2N6497
50
25°C
30
20
−55 °C
10
7.0
5.0
0.05 0.07 0.1
0.2 0.3
0.5 0.7 1.0
2.0
IC, COLLECTOR CURRENT (AMP)
3.0
4.0
TJ = 25°C
3.2
2.4
1.6
IC = 1.0 A
0
0.01 0.02
5.0
Figure 7. DC Current Gain
θV, TEMPERATURE COEFFICIENTS (mV/°C)
V, VOLTAGE (VOLTS)
TJ = 25°C
1.0
VBE(sat) @ IC/IB = 5.0
0.8
VBE @ VCE = 10 V
0.6
0.4
VCE(sat) @ IC/IB = 5.0
0.2
0
0.05 0.07 0.1
0.2
0.3
0.5 0.7
IC/IB = 2.5
1.0
2.0 3.0
+3.0
2.0
5.0
10
*APPLIES FOR IC/IB v
5.0
hFE@VCE + 10V
3
+2.0
+1.0
*qVC for VCE(sat)
25°C to 150°C
0
−55 °C to 25°C
−1.0
−2.0
25°C to 150°C
qVB for VBE
−55 to 25°C
0.2
0.3
0.5 0.7
1.0
2.0 3.0
Figure 9. “On” Voltages
Figure 10. Temperature Coefficients
5.0
1000
700
500
VCE = 200 V
101
100°C
C, CAPACITANCE (pF)
IC, COLLECTOR CURRENT (A)
μ
0.1 0.2
0.5
1.0
IB, BASE CURRENT (mA)
IC, COLLECTOR CURRENT (AMP)
TJ = 150°C
100
10−2
−0.1
0.05
IC, COLLECTOR CURRENT (AMP)
102
10−1
5.0 A
+4.0
−3.0
0.05 0.07 0.1
104
103
3.0 A
Figure 8. Collector Saturation Region
1.4
1.2
2.0 A
0.8
Cib
300
200
TJ = 25°C
100
70
50
Cob
30
25°C
REVERSE
−0.2
20
FORWARD
0
+0.2
+0.4
10
0.4 0.6 1.0
+0.6
VBE, BASE−EMITTER VOLTAGE (VOLTS)
Figure 11. Collector Cutoff Region
2.0 4.0 6.0 10
20
40 60 100
VR, REVERSE VOLTAGE (VOLTS)
Figure 12. Capacitance
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4
200 400
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TO−220
CASE 221A
ISSUE AK
DATE 13 JAN 2022
SCALE 1:1
STYLE 1:
PIN 1.
2.
3.
4.
BASE
COLLECTOR
EMITTER
COLLECTOR
STYLE 2:
PIN 1.
2.
3.
4.
BASE
EMITTER
COLLECTOR
EMITTER
STYLE 3:
PIN 1.
2.
3.
4.
CATHODE
ANODE
GATE
ANODE
STYLE 4:
PIN 1.
2.
3.
4.
MAIN TERMINAL 1
MAIN TERMINAL 2
GATE
MAIN TERMINAL 2
STYLE 5:
PIN 1.
2.
3.
4.
GATE
DRAIN
SOURCE
DRAIN
STYLE 6:
PIN 1.
2.
3.
4.
ANODE
CATHODE
ANODE
CATHODE
STYLE 7:
PIN 1.
2.
3.
4.
CATHODE
ANODE
CATHODE
ANODE
STYLE 8:
PIN 1.
2.
3.
4.
CATHODE
ANODE
EXTERNAL TRIP/DELAY
ANODE
STYLE 9:
PIN 1.
2.
3.
4.
GATE
COLLECTOR
EMITTER
COLLECTOR
STYLE 10:
PIN 1.
2.
3.
4.
GATE
SOURCE
DRAIN
SOURCE
STYLE 11:
PIN 1.
2.
3.
4.
DRAIN
SOURCE
GATE
SOURCE
STYLE 12:
PIN 1.
2.
3.
4.
MAIN TERMINAL 1
MAIN TERMINAL 2
GATE
NOT CONNECTED
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42148B
TO−220
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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