74LCXZ16244MEA

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This literature is subject to all applicable copyright laws and is not for resale in any manner. Revised August 2001 74LCXZ16244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs General Description Features The LCXZ16244 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. ■ 5V tolerant inputs and outputs When VCC is between 0 and 1.5V, the LCXZ12644 is in the high impedance state during power up or power down. This places the outputs in high impedance (Z) state preventing intermittent low impedance loading or glitching in bus oriented applications. The LCXZ16244 is designed for low voltage (2.7V or 3.3V) VCC applications with capability of interfacing to a 5V signal environment. The LCXZ16244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. ■ Guaranteed power up/down high impedance ■ Supports live insertion/withdrawal ■ 2.7V–3.6V VCC specifications provided ■ 4.5 ns tPD max (VCC = 3.0V), 20 µA ICC max ■ ±24 mA output drive (VCC = 3.0V) ■ Implements patented noise/EMI reduction circuitry ■ Latch-up performance exceeds 500 mA ■ ESD performance: Human body model > 2000V Machine model > 200V ■ Also packaged in plastic Fine-Pitch Ball Grid Array (FBGA) (Preliminary) Ordering Code: Order Number 74LCXZ16244GX (Note 1) Package Number BGA54A (Preliminary) Package Description 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide [TAPE and REEL] 74LCXZ16244MEA (Note 2) MS48A 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide 74LCXZ16244MTD (Note 2) MTD48 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Note 1: BGA package available in Tape and Reel only. Note 2: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol © 2001 Fairchild Semiconductor Corporation DS500252 www.fairchildsemi.com 74LCXZ16244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs September 2000 74LCXZ16244 Connection Diagrams Pin Descriptions Pin Assignment for SSOP and TSSOP Pin Names Description OEn Output Enable Input (Active LOW) I0–I15 Inputs O0–O15 Outputs NC No Connect FBGA Pin Assignments 1 2 3 4 5 6 A O0 NC OE1 OE2 NC I0 B O2 O1 NC NC I1 I2 C O4 O3 VCC VCC I3 I4 D O6 O5 GND GND I5 I6 E O8 O7 GND GND I7 I8 F O10 O9 GND GND I9 I10 I12 G O12 O11 VCC VCC I11 H O14 O13 NC NC I13 I14 J O15 NC OE4 OE3 NC I15 Truth Tables Inputs OE1 Pin Assignment for FBGA Outputs I0–I3 L L L L H H H X Z Inputs Outputs OE2 I4–I7 L L L L H H H X Inputs (Top Thru View) Z Outputs I8–I11 L L L L H H H X Z I12–I15 O12–O15 Inputs O8–O11 Outputs L L L L H H H X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance 2 O4–O7 OE3 OE4 www.fairchildsemi.com O0–O3 3-STATE outputs are controlled by an Output Enable (OEn) input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. The LCXZ16244 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is nibble (4 bits) controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The Logic Diagram 3 www.fairchildsemi.com 74LCXZ16244 Functional Description 74LCXZ16244 Absolute Maximum Ratings(Note 3) Symbol Parameter Value VCC Supply Voltage −0.5 to +7.0 VI DC Input Voltage −0.5 to +7.0 VO DC Output Voltage −0.5 to +7.0 Conditions Units V V Output in 3-STATE or VCC = 0–1.5V −0.5 to VCC + 0.5 Output in HIGH or LOW State (Note 4) IIK DC Input Diode Current −50 VI < GND IOK DC Output Diode Current −50 VO < GND +50 VO > VCC V mA mA IO DC Output Source/Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature −65 to +150 °C Recommended Operating Conditions (Note 5) Symbol Parameter VCC Supply Voltage VI Input Voltage VO Output Voltage IOH/IOL Min Max 2.7 3.6 V 0 5.5 V HIGH or LOW State 0 VCC 3-STATE or VCC = OFF 0 5.5 Operating Output Current TA Free-Air Operating Temperature ∆t/∆V Input Edge Rate, VIN = 0.8V–2.0V, VCC = 3.0V VCC = 3.0V − 3.6V ±24 VCC = 2.7V − 3.0V ±12 Units V mA −40 85 °C 0 10 ns/V Note 3: The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Note 4: IO Absolute Maximum Rating must be observed. Note 5: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol Parameter Conditions VCC Min 2.0 VIH HIGH Level Input Voltage 2.7 − 3.6 VIL LOW Level Input Voltage 2.7 − 3.6 VOH HIGH Level Output Voltage VOL LOW Level Output Voltage TA = −40°C to +85°C (V) V 0.8 IOH = −100 µA 2.7 − 3.6 VCC − 0.2 IOH = −12 mA 2.7 2.2 IOH = −18 mA 3.0 2.4 2.2 Units Max V V IOH = −24 mA 3.0 IOL = 100 µA 2.7 − 3.6 0.2 IOL = 12 mA 2.7 0.4 IOL = 16 mA 3.0 0.4 V IOL = 24 mA 3.0 0.55 II Input Leakage Current 0 ≤ VI ≤ 5.5V 2.7 − 3.6 ±5.0 µA IOZ 3-STATE Output Leakage 0 ≤ VO ≤ 5.5V 2.7 − 3.6 ±5.0 µA 0 10 µA 0 − 1.5 ±5.0 µA VI = VIH or VIL IOFF Power-Off Leakage Current VI or VO = 5.5V IPU/PD Power Up/Down VO = 0.5V to VCC 3-STATE Output Current VI = GND or VCC ICC ∆ICC Quiescent Supply Current Increase in ICC per Input VI = VCC or GND 2.7 − 3.6 225 3.6V ≤ VI, VO ≤ 5.5V (Note 6) 2.7 − 3.6 ±225 VIH = VCC −0.6V 2.7 − 3.6 500 Note 6: Outputs disabled or 3-STATE only. www.fairchildsemi.com 4 µA µA TA = −40°C to +85°C, RL = 500 Ω Symbol Parameter VCC = 3.3V ± 0.3V VCC = 2.7V CL = 50 pF CL = 50 pF Units Min Max Min tPHL Propagation Delay 1.0 4.5 1.0 5.2 tPLH Data to Output 1.0 4.5 1.0 5.2 tPZL Output Enable Time 1.0 5.5 1.0 6.3 1.0 5.5 1.0 6.3 1.0 5.4 1.0 5.7 1.0 5.4 1.0 5.7 tPZH tPLZ Output Disable Time tPHZ tOSHL Output to Output Skew (Note 7) Max 1.0 tOSLH ns ns ns ns 1.0 Note 7: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW (tOSHL) or LOW-to-HIGH (tOSLH). Parameter guaranteed by design. Dynamic Switching Characteristics Symbol Parameter Conditions VCC TA = 25°C (V) Typical Units VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 0.8 V VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 3.3V, VIL = 0V 3.3 −0.8 V Capacitance Typical Units CIN Symbol Input Capacitance Parameter VCC = Open, VI = 0V or VCC Conditions 7 pF COUT Output Capacitance VCC = 3.3V, VI = 0V or VCC 8 pF CPD Power Dissipation Capacitance VCC = 3.3V, VI = 0V or VCC, f = 10 MHz 20 pF 5 www.fairchildsemi.com 74LCXZ16244 AC Electrical Characteristics 74LCXZ16244 AC LOADING and WAVEFORMS Generic for LCX Family FIGURE 1. AC Test Circuit (CL includes probe and jig capacitance) CL VI 6V for VCC = 3.3V, 2.7V 50 pF Waveform for Inverting and Non-Inverting Functions 3-STATE Output High Enable and Disable Times for Logic Propagation Delay. Pulse Width and trec Waveforms Setup Time, Hold Time and Recovery Time for Logic trise and tfall 3-STATE Output Low Enable and Disable Times for Logic FIGURE 2. Waveforms (Input Characteristics; f = 1 MHz, tr = tf = 3 ns) Symbol www.fairchildsemi.com VCC 3.3V ± 0.3V 2.7V Vmi 1.5V 1.5V Vmo 1.5V 1.5V Vx VOL + 0.3V VOL + 0.3V Vy VOH − 0.3V VOH − 0.3V 6 74LCXZ16244 Schematic Diagram Generic for LCX Family 7 www.fairchildsemi.com 74LCXZ16244 Physical Dimensions inches (millimeters) unless otherwise noted 54-Ball Fine-Pitch Ball Grid Array (FBGA), JEDEC MO-205, 5.5mm Wide Package Number BGA54A Preliminary www.fairchildsemi.com 8 74LCXZ16244 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Small Shrink Outline Package (SSOP), JEDEC MO-118, 0.300" Wide Package Number MS48A 9 www.fairchildsemi.com 74LCXZ16244 Low Voltage 16-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 48-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Package Number MTD48 Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 10 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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