74VHCT74AMTCX

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This literature is subject to all applicable copyright laws and is not for resale in any manner. 74VHCT74A Dual D-Type Flip-Flop with Preset and Clear Features General Description n High speed: fMAX = 160MHz (Typ.) at TA = 25°C n High noise immunity: VIH = 2.0V, VIL = 0.8V The VHCT74A is an advanced high speed CMOS Dual D-Type Flip-Flop fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D INPUT is transferred to the Q OUTPUT during the positive going transition of the CK pulse. CLR and PR are independent of the CK and are accomplished by setting the appropriate input LOW. n Power down protection is provided on all inputs and outputs n Low power dissipation: ICC = 2µA (Max.) at TA = 25°C n Pin and function compatible with 74HCT74 Protection circuits ensure that 0V to 7V can be applied to the input pins without regard to the supply voltage and to the output pins with VCC = 0V. These circuits prevent device destruction due to mismatched supply and input/ output voltages. This device can be used to interface 3V to 5V systems and two supply systems such as battery backup. Ordering Information Order Number Package Number Package Description 74VHCT74AM M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow 74VHCT74ASJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 74VHCT74AMTC MTC14 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©2008 Fairchild Semiconductor Corporation 74VHCT74A Rev. 1.4.0 www.fairchildsemi.com 74VHCT74A — Dual D-Type Flip-Flop with Preset and Clear May 2008 Logic Symbol IEEE/IEC Pin Description Pin Names Truth Table Description D1, D2 Data Inputs CK1, CK2 Clock Pulse Inputs CLR1, CLR2 Direct Clear Inputs PR1, PR2 Direct Preset Inputs Q1, Q1, Q2, Q2 Outputs ©2008 Fairchild Semiconductor Corporation 74VHCT74A Rev. 1.4.0 Inputs Outputs CLR PR D CK Q Q Function L H X X L H Clear H L X X H L Preset L L X X H H H H L L H H H H H L H H X Qn Qn No Change www.fairchildsemi.com 2 74VHCT74A — Dual D-Type Flip-Flop with Preset and Clear Connection Diagram Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Rating VCC Supply Voltage –0.5V to +7.0V VIN DC Input Voltage –0.5V to +7.0V VOUT DC Output Voltage Note 1 –0.5V to VCC + 0.5V Note 2 –0.5V to 7.0V IIK Input Diode Current –20mA IOK Output Diode Current(3) ±20mA IOUT DC Output Current ±25mA ICC DC VCC / GND Current ±50mA TSTG TL Storage Temperature –65°C to +150°C Lead Temperature (Soldering, 10 seconds) 260°C Recommended Operating Conditions(4) The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter VCC Supply Voltage VIN Input Voltage VOUT Rating 4.5V to +5.5V 0V to +5.5V Output Voltage Note 1 0V to VCC Note 2 TOPR Operating Temperature t r, t f Input Rise and Fall Time 0V to 5.5V –40°C to +85°C VCC = 5.0V ±0.5V 0ns/V ∼ 20ns/V Notes: 1. HIGH or LOW state. IOUT absolute maximum rating must be observed. 2. VCC = 0V. 3. VOUT < GND, VOUT > VCC (Outputs Active). 4. Unused inputs must be held HIGH or LOW. They may not float. ©2008 Fairchild Semiconductor Corporation 74VHCT74A Rev. 1.4.0 www.fairchildsemi.com 3 74VHCT74A — Dual D-Type Flip-Flop with Preset and Clear Absolute Maximum Ratings TA = –40°C to +85°C TA = 25°C Symbol VIH VIL VOH VOL Parameter VCC (V) Conditions Min. Typ. Max. Min. Max. HIGH Level Input Voltage 4.5 2.0 2.0 5.5 2.0 2.0 LOW Level Input Voltage 4.5 0.8 0.8 5.5 0.8 0.8 HIGH Level Output Voltage 4.5 LOW Level Output Voltage 4.5 4.5 4.5 VIN = VIH IOH = –50µA or VIL IOH = –8mA 4.40 4.50 VIN = VIH IOL = 50µA or VIL IOL = 8mA V 4.40 3.94 Units V V 3.80 0.0 0.1 0.1 0.36 0.44 V 0–5.5 VIN = 5.5V or GND ±0.1 ±1.0 µA Quiescent Supply Current 5.5 VIN = VCC or GND 2.0 20.0 µA ICCT Maximum ICC / Input 5.5 VIN = 3.4V, Other Inputs = VCC or GND 1.35 1.50 mA IOFF Output Leakage Current (Power Down State) 0.0 VOUT = 5.5V +0.5 +5.0 µA IIN Input Leakage Current ICC AC Electrical Characteristics TA = –40°C to +85°C TA = 25°C Symbol fMAX Parameter Maximum Clock Frequency tPLH, tPHL Propagation Delay Time (CK-Q, Q) tPLH, tPHL Propagation Delay Time (CLR, PR-Q, Q) CIN CPD VCC (V)(5) Conditions Min. Typ. 5.0 CL = 15pF 100 160 80 5.0 CL = 50pF 80 140 65 5.0 CL = 15pF 5.8 5.0 CL = 50pF 6.3 8.8 1.0 10.0 5.0 CL = 15pF 7.6 10.4 1.0 12.0 5.0 CL = 50pF 8.1 11.4 1.0 13.0 4 10 Input Capacitance VCC = Open Power Dissipation Capacitance (6) Max. 7.8 Min. 1.0 Max. Units MHz 9.0 10 24 ns ns pF pF Notes: 5. VCC is 5.0 ± 0.5V 6. CPD is defined as the value of internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (Opr.) = CPD • VCC • fIN + ICC / 2 (per flip-flop). ©2008 Fairchild Semiconductor Corporation 74VHCT74A Rev. 1.4.0 www.fairchildsemi.com 4 74VHCT74A — Dual D-Type Flip-Flop with Preset and Clear DC Electrical Characteristics TA = –40°C to +85°C TA = 25°C Symbol Guaranteed Minimum Typ. Units Parameter VCC (V) Minimum Pulse Width (CK) 5.0 ± 0.5 5.0 5.0 ns Minimum Pulse Width (CLR, PR) 5.0 ± 0.5 5.0 5.0 ns tS Minimum Setup Time 5.0 ± 0.5 5.0 5.0 ns tH Minimum Hold Time 5.0 ± 0.5 0 0 ns Minimum Removal Time (CLR, PR) 5.0 ± 0.5 3.5 3.5 ns tW(L), tW(H) tW(L) tREM ©2008 Fairchild Semiconductor Corporation 74VHCT74A Rev. 1.4.0 www.fairchildsemi.com 5 74VHCT74A — Dual D-Type Flip-Flop with Preset and Clear AC Operating Requirements 0.65 A 0.43TYP 14 8 B 6.4 6.10 3.2 1 PIN#1 IDENT 0.2 C B A 7 TOP VIEW 1.65 ALL LEAD TIPS 0.45 RECOMMENDED LAND PATTERN 1.2 MAX 0.30 0.19 ALL LEAD TIPS 0.1 C 0.65 SEE DETAIL A 0.90+0.15 -0.10 0.13 A B 0.20 0.09 C C FRONT VIEW 0.09 MIN NOTES: A. CONFORMS TO JEDEC REGISTRATION MO-153, VARIATION AB, REF NOTE 6 B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONING AND TOLERANCES PER ANSI Y14.5M, 2009. E. LANDPATTERN STANDARD: SOP65P640X110-14M. F. DRAWING FILE NAME: MKT-MTC14rev7. GAGE PLANE 0.09 MIN 1.00 0.25 SEATING PLANE DETAIL A 8.75 8.50 A 7.62 14 8 14 B 0.65 8 4.00 3.80 6.00 1 PIN #1 IDENT. 1.27 (0.33) TOP VIEW 5.60 7 0.51 0.35 0.25 M C B A 1.75 MAX 1.70 1 1.27 LAND PATTERN RECOMMENDATION A C 1.50 1.25 FRONT VIEW 0.25 0.10 0.50 0.25 x 45 R0.10 GAGE PLANE R0.10 0.36 8° 0° 0.90 0.50 (1.04) 0.10 C 0.25 0.19 SIDE VIEW NOTES: A. CONFORMS TO JEDEC MS-012, VARIATION AB, ISSUE C B. ALL DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS DO NOT INCLUDE MOLD FLASH OR BURRS D. LAND PATTERN STANDARD: SOIC127P600X145-14M E. CONFORMS TO ASME Y14.5M, 2009 D. DRAWING FILENAME: MKT-M14Arev14 SEATING PLANE DETAIL A SCALE 16 : 1 7 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. 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