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CS2001

CS2001

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    CS2001 - 1.2 A Switching Regulator, and 5.0 V, 100 mA Linear Regulator with RESET - ON Semiconductor

  • 数据手册
  • 价格&库存
CS2001 数据手册
CS2001 1.2 A Switching Regulator, and 5.0 V, 100 mA Linear Regulator with RESET The CS2001 is a smart power supply ASIC utilized in automotive airbag systems. It contains a current–mode switching regulator with a 1.2 A on–chip switch and a 5.0 V, 100 mA linear regulator. The linear output capacitor must be 3.3 µF or greater with an ESR in the range of 100 mΩ to 1.0 Ω. If the ESR of the cap is less than 100 mΩ, a series resistor must be used. The switcher can be configured in either a boost or flyback topology. The boost topology produces energy reserve voltage VER which is externally adjustable (25 V maximum) through the resistor divider connected to the VFB pin. In the event of fault conditions that produce VFB either open or shorted, the switcher is shut down. Under normal operating conditions (VBAT > 8.0 V), the current loading on the linear regulator is directed through VBAT. A low battery or loss of battery condition switches the supply for the linear regulator from VBAT to VER and shuts down the switcher using the ASIC’s internal “smartswitch.” This switchover feature minimizes the power dissipation in both the linear and switcher output devices and saves the cost of using a larger inductor. The NERD (No Energy Reserve Detected) pin is a dual function output. If VOUT is not in regulation, it provides a Power On Reset function whose time interval is externally adjustable with the capacitor. This interval can be seen on the RESETB pin, which allows for clean power–up and power–down of the microprocessor. Once VOUT is in regulation, the logic level of the NERD output (usually low) indicates to the microprocessor whether or not the VER pin is connected. A switched–capacitor voltage tripler accepts input voltage VER and produces output voltage VCHG (typically VER + 8.0 V). This voltage is used in the system to drive high–side FETs. This part is capable of withstanding a 50 V peak transient voltage. The linear regulator will not shut down during this event. Features Linear Regulator 5.0 V ±2% @ 100 mA Switching Regulator 1.2 A Peak Internal Switch Voltage Tripler Smart Functions – Smartswitch – RESET – Energy Reserve Status • Protection – Overtemperature – Current Limit – 50 V Peak Transient Capability • Internally Fused Leads in SO–20L Package http://onsemi.com 20 1 SO–20L DWF SUFFIX CASE 751D MARKING DIAGRAM 20 CS2001 AWLYYWW 1 A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week PIN CONNECTIONS 1 VER VBAT VFB GND1 GND2 GND3 GND4 VSW SWSD COMP 20 VOUT RESETB NERD GND8 GND7 GND6 GND5 VCHG IBIAS CPUMP • • • • ORDERING INFORMATION Device CS2001YDWF20 CS2001YDWFR20 Package SO–20L SO–20L Shipping 37 Units/Rail 1000 Tape & Reel © Semiconductor Components Industries, LLC, 2001 1 December, 2000 – Rev. 5 Publication Order Number: CS2001/D CS2001 100 µF 68 µH Microprocessor VER VBAT VFB GND1 1.0 k 95.3 k VOUT RESETB NERD GND8 ESR GND7 GND2 CS2001 GND6 GND3 GND4 GND5 VCHG IBIAS CPUMP 30.1 k 270 pF 1.0 µF 0.1 µF 1.0 µF 0.47 µF Reserve Firing Voltage 11 k VIGN 5.1 k 1000 µF 1000 µF VSW SWSD COMP Tripler Firing Voltage 10 µF Figure 1. Application Diagram ABSOLUTE MAXIMUM RATINGS* Rating VBAT VER VOUT Digital Input/Output Voltage Peak Transient Voltage (36 V Load Dump @ 14 V Battery Voltage) Storage Temperature Range Junction to Free Air Thermal Impedance ESD Susceptibility (Human Body Model) Lead Temperature Soldering: TA TJ 1. 60 second maximum above 183°C. *The maximum package power dissipation must be observed. Reflow: (SMD styles only) (Note 1.) Value –0.5 to 25 –0.5 to 25 –0.5 to 7.0 –0.5 to 7.0 50 –55 to 150 55 4.0 230 peak –40 to 85 –40 to 150 Unit V V V V V °C °C/W kV °C °C °C http://onsemi.com 2 CS2001 ELECTRICAL CHARACTERISTICS (8.0 V ≤ VBAT ≤ 16 V, 8.0 V ≤ VER ≤ 25 V, 1.0 mA ≤ IV(OUT) ≤ 100 mA, TTEST = –40°C to 125°C; unless otherwise specified.) Characteristic Linear Regulator Output Voltage Regulator Bias Current (from VBAT) Output Driven from VBAT, VER = 25 V Output Driven from VER, VBAT = 0 V IV(BAT) @ IV(OUT) = –100 mA, SWSD = 4.0 V, VBAT = 16 V, VER = 25 V T = –40°C T = 25°C T = 125°C IVER @ IV(OUT) = –100 mA, SWSD = 4.0 V, VBAT = 0 V, VER = 25 V T = –40°C T = 25°C T = 125°C VER = 25 V, IV(OUT) = –100 mA (Probe Only) VBAT = 0 V, IV(OUT) = –100 mA VER = 25 V, IV(OUT) = –50 mA VER = 25 V, IV(OUT) = –50 mA VBAT = 16 V, VER = 25 V, IV(OUT) = – 1.0 mA, C = 10 µF, ESR = 0.5 Ω – – – VER = 25V, IV(OUT) = –1.0 mA CPUMP 270 pF, RI(BIAS) = 30.1 kΩ ∆IV(BAT) for 0 A ≤ IV(SW) ≤ 1.2 A IV(SW) = 1.2 A – – VFB Above Short Low Detection Level – – – IV(SW) @ VSW = 50 V, SWSD = VOUT VBAT = 16 V, IV(OUT) = –1.0 mA, CCHG = 1.5 mF VER = 8.0 V, IV(CHG) = –30 µA VER = 12 V, IV(CHG) = –90 µA CCHG = 0.15 µF, VER = 8.0 V, VCHG = 14.25 V – VER = 28 V, IV(CHG) = 0 µA – 6.25 6.25 – 25 25 – 8.0 8.0 – 32.5 32.5 – 13 13 30 40 40 3.0 V V ms V V mA 135 – – 1.2 1.238 – 200 200 80 – 150 – – – 1.27 – 250 250 – – 165 50 1.6 2.4 1.303 1.0 300 300 95 100 kHz mA V A V µA mV mV % µA 4.9 4.9 – – 5.1 5.1 V V Test Conditions Min Typ Max Unit – – – – – – 8.0 7.0 6.0 mA mA mA Regulator Bias Current (from VER) – – – – – 6.5 0.5 – – – 120 – – – – – – – – – – – 11 9.0 8.0 1.5 1.5 8.0 1.0 0.05 0.025 0.025 – mA mA mA V V V V V V V mA Dropout Voltage VBAT – VOUT Dropout Voltage VER – VOUT Smart Switch Threshold VBAT to VER Smart Switch Threshold Hysteresis VOUT Output Noise Line Regulation Load Regulation Output Current Limit Switching Regulator Switching Frequency Pump Drive Current Switch Saturation Voltage Output Current Limit VFB Regulation VFB Input Current VFB Input Shorted Low Detection Level CPUMP Short Detection Threshold Maximum Duty Cycle VSW Leakage Current Voltage Tripler Output Voltage Clamp VCHG – VER Initial Charge Time Maximum Output Voltage Clamp VCHG Output Voltage Clamp VCHG Short Circuit Path Current Limit VER to VCHG http://onsemi.com 3 CS2001 ELECTRICAL CHARACTERISTICS (continued) (8.0 V ≤ VBAT ≤ 16 V, 8.0 V ≤ VER ≤ 25 V, 1.0 mA ≤ IV(OUT) ≤ 100 mA, TTEST = –40°C to 125°C; unless otherwise specified.) Characteristic RESETB OUTPUT High Threshold Low Threshold Hysteresis Output Low Voltage Pull–Up Resistor SWSD Input High Threshold Low Threshold Input Impedance NERD OUTPUT VER Detection Voltage Output Low Voltage Pull–Up Current Power On Delay Clamping Voltage (Low) Clamping Voltage (High) General VER Load Current VER = 25 V, VBAT = 16 V, IV(OUT) = –100 mA T = –40°C T = 25°C T = 125°C (Guaranteed by Design) – – – 160 – – – – 5.0 5.0 4.0 210 mA mA mA °C VER Present VER Not Present VBAT = 0 V VOUT Increasing VOUT Decreasing – VOUT = 1.0 V, IRESETB = 100 µA IRESETB = 1.0 mA, VOUT = 4.5 V RESETB = 1.0 V VBAT = 16 V, VER = 25 V, IV(OUT) = –1.0 mA – – Referenced to Ground VBAT = 16 V, IV(OUT) = –1.0 mA, CNERD = 0.47 mF – INERD = 1.0 mA, VOUT = 4.5 V NERD = 0.5 V – 1.5 – 30 6.25 1.0 3.5 – – 40 8.5 1.25 3.75 6.5 0.5 50 11 1.5 4.0 V V µA ms V V – 0.3 × VOUT 10 – – 20 0.7 × VOUT – 40 V V kΩ 4.525 4.5 25 – – 25 4.75 4.65 100 – – 50 4.85 4.825 200 0.5 0.5 100 V V mV V V kΩ Test Conditions Min Typ Max Unit Thermal Shutdown PACKAGE PIN DESCRIPTION PACKAGE PIN # SO–20L 1 2 3 4 5 6 7 8 9 10 11 12 PIN SYMBOL VER VBAT VFB GND1 GND2 GND3 GND4 VSW SWSD COMP CPUMP IBIAS Energy reserve input. Battery input. Charge PUMP control voltage input. Ground. Ground. Ground. Ground. Charge PUMP switch collector. Charge PUMP shutdown input. Charge PUMP compensation pin. Charge PUMP timing cap input. Reference current resistor pin. FUNCTION http://onsemi.com 4 CS2001 PACKAGE PIN DESCRIPTION (continued) PACKAGE PIN # SO–20L 13 14 15 16 17 18 19 20 PIN SYMBOL VCHG GND5 GND6 GND7 GND8 NERD RESETB VOUT FUNCTION Switched cap voltage tripler output. Ground. Ground. Ground. Ground. No energy reserve detected output. Reset output. Linear regulator output. VER VFB VREF V /C FB PUMP Short 0.25 V – Detect + – + VCC Switcher Error Amp VCC + – Preregulator Voltage Tripler VCHG Switcher V Comp REF Logic Base Drive 1.2 A VSW COMP VREF IBIAS CPUMP VCC Oscillator VREF Bandgap 1.25 V Reference VBAT VREF Over Temperature Current VCC Sense Amp + – Switcher VCC Shutdown Comp – 0.5 × V CC + GND SWSD VREF Low Battery – Detect 7.25 V + Linear VREF Error Amp + – VREF Logic No Battery Drive 100 mA Current Limit VER Detect VCC VOUT NERD VCC RESETB Reset Figure 2. Block Diagram http://onsemi.com 5 CS2001 CIRCUIT DESCRIPTION Figure 3 is an oscilloscope waveform showing the charge pump collector voltage, collector current and the charge pump timing capacitor during normal operation with IVER = 30mA. Figure 4 is an oscilloscope waveform showing the voltage tripler output and the energy reserve input during power up. Figure 4. Startup with RV(CHG) = 510 k Figure 3. Typical Operation with IVER = 30 mA http://onsemi.com 6 CS2001 PACKAGE DIMENSIONS SO–20L DWF SUFFIX CASE 751D–05 ISSUE F D A 11 X 45 _ q NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ H M B M 20 10X 0.25 E 1 10 20X B 0.25 M B TA S B S A SEATING PLANE h 18X e A1 T C PACKAGE THERMAL DATA Parameter RΘJC RΘJA Typical Typical SO–20L 9 55 Unit °C/W °C/W http://onsemi.com 7 L CS2001 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303–675–2167 or 800–344–3810 Toll Free USA/Canada N. American Technical Support: 800–282–9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor – European Support German Phone: (+1) 303–308–7140 (Mon–Fri 2:30pm to 7:00pm CET) Email: ONlit–german@hibbertco.com French Phone: (+1) 303–308–7141 (Mon–Fri 2:00pm to 7:00pm CET) Email: ONlit–french@hibbertco.com English Phone: (+1) 303–308–7142 (Mon–Fri 12:00pm to 5:00pm GMT) Email: ONlit@hibbertco.com EUROPEAN TOLL–FREE ACCESS*: 00–800–4422–3781 *Available from Germany, France, Italy, UK, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303–308–7143 (Mon–Fri 8:00am to 5:00pm MST) Email: ONlit–spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor – Asia Support Phone: 303–675–2121 (Tue–Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001–800–4422–3781 Email: ONlit–asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. http://onsemi.com 8 CS2001/D
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