DM74LS245N

Revised March 2000 DM74LS245 3-STATE Octal Bus Transceiver General Description Features These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control function implementation minimizes external timing requirements. ■ Bi-Directional bus transceiver in a high-density 20-pin package The device allows data transmission from the A Bus to the B Bus or from the B Bus to the A Bus depending upon the logic level at the direction control (DIR) input. The enable input (G) can be used to disable the device so that the buses are effectively isolated. ■ Hysteresis at bus inputs improve noise margins ■ 3-STATE outputs drive bus lines directly ■ PNP inputs reduce DC loading on bus lines ■ Typical propagation delay times, port-to-port 8 ns ■ Typical enable/disable times 17 ns ■ IOL (sink current) 24 mA ■ IOH (source current) −15 mA Ordering Code: Order Number Package Number Package Description DM74LS245WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide DM74LS245SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide DM74LS245N N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Enable Direction G Control Operation DIR L L B Data to A Bus L H A Data to B Bus H X Isolation H = HIGH Level L = LOW Level X = Irrelevant © 2000 Fairchild Semiconductor Corporation DS006413 www.fairchildsemi.com DM74LS245 3-STATE Octal Bus Transceiver August 1986 DM74LS245 Absolute Maximum Ratings(Note 1) Supply Voltage 7V Note 1: The “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The “Recommended Operating Conditions” table will define the conditions for actual device operation. Input Voltage 7V DIR or G A or B 5.5V 0°C to +70°C Operating Free Air Temperature Range −65°C to +150°C Storage Temperature Range Recommended Operating Conditions Symbol Parameter Min Nom Max 4.75 5 5.25 Units VCC Supply Voltage VIH HIGH Level Input Voltage V VIL LOW Level Input Voltage 0.8 V IOH HIGH Level Output Current −15 mA IOL LOW Level Output Current 24 mA TA Free Air Operating Temperature 70 °C 2 V 0 Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted) Symbol Parameter Conditions VI Input Clamp Voltage VCC = Min, II = −18 mA HYS Hysteresis (VT+ − VT−) VCC = Min HIGH Level VCC = Min, VIH = Min VOH Output Voltage Min 0.2 2.4 VIL = Max, IOH = −3 mA VCC = Min, VIH = Min Output Voltage VIL = Max VIH = Min IOZH IOZL Off-State Output Current, VCC = Max HIGH Level Voltage Applied VIL = Max Off-State Output Current, VIH = Min LOW Level Voltage Applied II Input Current at Maximum VCC = Max Input Voltage V 0.4 V 3.4 V 2 VIL = 0.5V, IOH = Max VCC = Min Units 2.7 VIL = Max, IOH = −1 mA LOW Level Max −1.5 VCC = Min, VIL = Min VOL Typ (Note 2) IOL = 12 mA 0.4 IOL = Max 0.5 VO = 2.7V 20 µA VO = 0.4V −200 µA A or B VI = 5.5V 0.1 DIR or G VI = 7V 0.1 V mA IIH HIGH Level Input Current VCC = Max, VI = 2.7V 20 µA IIL LOW Level Input Current VCC = Max, VI = 0.4V −0.2 mA IOS Short Circuit Output Current VCC = Max (Note 3) −225 mA ICC Supply Current Outputs HIGH −40 VCC = Max Outputs LOW Outputs at Hi-Z Note 2: All typicals are at VCC = 5V, TA = 25°C. Note 3: Not more than one output should be shorted at a time, not to exceed one second duration www.fairchildsemi.com 2 48 70 62 90 64 95 mA VCC = 5V, TA = 25°C Symbol tPLH tPHL Parameter Conditions Propagation Delay Time, CL = 45 pF LOW-to-HIGH Level Output RL = 667Ω Propagation Delay Time, HIGH-to-LOW Level Output tPZL Output Enable Time to LOW Level tPZH Output Enable Time to HIGH Level tPLZ tPHZ Output Disable Time CL = 5 pF from LOW Level RL = 667Ω Output Disable Time from HIGH Level tPLH tPHL Propagation Delay Time, CL = 150 pF LOW-to-HIGH Level Output RL = 667Ω Propagation Delay Time, HIGH-to-LOW Level Output tPZL Output Enable Time to LOW Level tPZH Output Enable Time to HIGH Level 3 Min Max Units 12 ns 12 ns 40 ns 40 ns 25 ns 25 ns 16 ns 17 ns 45 ns 45 ns www.fairchildsemi.com DM74LS245 Switching Characteristics DM74LS245 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B www.fairchildsemi.com 4 DM74LS245 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com DM74LS245 3-STATE Octal Bus Transceiver Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 6