MUN2241, MMUN2241L,
MUN5241, DTC115TE,
DTC115TM3, NSBC115TF3
Digital Transistors (BRT)
R1 = 100 kW, R2 = 8 kW
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NPN Transistors with Monolithic Bias
Resistor Network
PIN CONNECTIONS
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a base−
emitter resistor. The BRT eliminates these individual components by
integrating them into a single device. The use of a BRT can reduce
both system cost and board space.
Features
•
•
•
•
•
PIN 3
COLLECTOR
(OUTPUT)
PIN 1
BASE
(INPUT)
R1
R2
PIN 2
EMITTER
(GROUND)
MARKING DIAGRAMS
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC-Q101 Qualified
and PPAP Capable
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Symbol
Max
Unit
Collector−Base Voltage
VCBO
50
Vdc
Collector−Emitter Voltage
VCEO
50
Vdc
IC
100
mAdc
Input Forward Voltage
VIN(fwd)
40
Vdc
Input Reverse Voltage
VIN(rev)
6
Vdc
Collector Current − Continuous
SC−59
CASE 318D
STYLE 1
XXX MG
G
SOT−23
CASE 318
STYLE 6
1
1
MAXIMUM RATINGS (TA = 25°C)
Rating
XX MG
G
XX MG
G
SC−70/SOT−323
CASE 419
STYLE 3
XX M
SC−75
CASE 463
STYLE 1
XX M
SOT−723
CASE 631AA
STYLE 1
XM 1
SOT−1123
CASE 524AA
STYLE 1
1
1
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1
XXX
M
G
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation may vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering, marking, and shipping information in
the package dimensions section on page 2 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
November, 2016 − Rev. 2
1
Publication Order Number:
DTC115T/D
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
Table 1. ORDERING INFORMATION
Part Marking
Package
Shipping†
8U
SC−59
(Pb−Free)
3000 / Tape & Reel
MMUN2241LT1G
A8U
SOT−23
(Pb−Free)
3000 / Tape & Reel
MUN5241T1G
AW
SC−70/SOT−323
(Pb−Free)
3000 / Tape & Reel
DTC115TET1G
7V
SC−75
(Pb−Free)
3000 / Tape & Reel
DTC115TM3T5G
7D
SOT−723
(Pb−Free)
8000 / Tape & Reel
NSBC115TF3T5G
P (90°)*
SOT−1123
(Pb−Free)
8000 / Tape & Reel
Device
MUN2241T1G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
* (xx°) = Degree rotation in the clockwise direction.
PD, POWER DISSIPATION (mW)
300
250
(1) SC−75 and SC−70/SOT323; Minimum Pad
(2) SC−59; Minimum Pad
(3) SOT−23; Minimum Pad
(4) SOT−1123; 100 mm2, 1 oz. copper trace
(5) SOT−723; Minimum Pad
200
(1) (2) (3) (4) (5)
150
100
50
0
−50
−25
0
25
50
75
100
125
150
AMBIENT TEMPERATURE (°C)
Figure 1. Derating Curve
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2
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
230
338
1.8
2.7
mW
THERMAL CHARACTERISTICS (SC−59) (MUN2241)
Total Device Dissipation
TA = 25°C
PD
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
540
370
°C/W
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
264
287
°C/W
TJ, Tstg
−55 to +150
°C
246
400
2.0
3.2
mW
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SOT−23) (MMUN2241L)
Total Device Dissipation
TA = 25°C
PD
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
508
311
°C/W
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
174
208
°C/W
TJ, Tstg
−55 to +150
°C
202
310
1.6
2.5
mW
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SC−70/SOT−323) (MUN5241)
Total Device Dissipation
TA = 25°C
PD
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
RqJA
618
403
°C/W
Thermal Resistance,
Junction to Lead
(Note 1)
(Note 2)
RqJL
280
332
°C/W
TJ, Tstg
−55 to +150
°C
200
300
1.6
2.4
mW
Junction and Storage Temperature Range
THERMAL CHARACTERISTICS (SC−75) (DTC115TE)
Total Device Dissipation
TA = 25°C
PD
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
Junction and Storage Temperature Range
mW/°C
RqJA
600
400
°C/W
TJ, Tstg
−55 to +150
°C
260
600
2.0
4.8
mW
THERMAL CHARACTERISTICS (SOT−723) (DTC115TM3)
Total Device Dissipation
TA = 25°C
PD
(Note 1)
(Note 2)
(Note 1)
(Note 2)
Derate above 25°C
Thermal Resistance,
Junction to Ambient
(Note 1)
(Note 2)
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−4 @ 1.0 x 1.0 Inch Pad.
FR−4 @ 100 mm2, 1 oz. copper traces, still air.
FR−4 @ 500 mm2, 1 oz. copper traces, still air.
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3
mW/°C
RqJA
480
205
°C/W
TJ, Tstg
−55 to +150
°C
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
Table 2. THERMAL CHARACTERISTICS
Characteristic
Symbol
Max
Unit
254
297
2.0
2.4
mW
THERMAL CHARACTERISTICS (SOT−1123) (NSBC115TF3)
Total Device Dissipation
TA = 25°C
PD
(Note 3)
(Note 4)
(Note 3)
(Note 4)
Derate above 25°C
mW/°C
Thermal Resistance,
Junction to Ambient
(Note 3)
(Note 4)
RqJA
493
421
°C/W
Thermal Resistance, Junction to Lead
(Note 3)
RqJL
193
°C/W
TJ, Tstg
−55 to +150
°C
Junction and Storage Temperature Range
1.
2.
3.
4.
FR−4 @ Minimum Pad.
FR−4 @ 1.0 x 1.0 Inch Pad.
FR−4 @ 100 mm2, 1 oz. copper traces, still air.
FR−4 @ 500 mm2, 1 oz. copper traces, still air.
Table 3. ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
−
−
100
−
−
500
−
−
0.1
50
−
−
50
−
−
160
350
−
−
−
0.25
−
0.6
0.5
1.5
1.0
−
−
−
0.2
4.9
−
−
Unit
OFF CHARACTERISTICS
Collector−Base Cutoff Current
(VCB = 50 V, IE = 0)
ICBO
Collector−Emitter Cutoff Current
(VCE = 50 V, IB = 0)
ICEO
Emitter−Base Cutoff Current
(VEB = 6.0 V, IC = 0)
IEBO
Collector−Base Breakdown Voltage
(IC = 10 mA, IE = 0)
V(BR)CBO
Collector−Emitter Breakdown Voltage (Note 5)
(IC = 2.0 mA, IB = 0)
V(BR)CEO
nAdc
nAdc
mAdc
Vdc
Vdc
ON CHARACTERISTICS
hFE
DC Current Gain (Note 5)
(IC = 5.0 mA, VCE = 10 V)
Collector−Emitter Saturation Voltage (Note 5)
(IC = 10 mA, IB = 5.0 mA)
VCE(sat)
Input Voltage (off)
(VCE = 5.0 V, IC = 100 mA)
Vi(off)
Input Voltage (on)
(VCE = 0.3 V, IC = 1.0 mA)
Vi(on)
Output Voltage (on)
(VCC = 5.0 V, VB = 5.0 V, RL = 1.0 kW)
VOL
Output Voltage (off)
(VCC = 5.0 V, VB = 0.25 V, RL = 1.0 kW)
VOH
Vdc
Vdc
Vdc
Vdc
Vdc
Input Resistor
R1
70
100
130
Resistor Ratio
R1/R2
−
−
−
kW
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
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4
MUN2241, MMUN2241L, MUN5241, DTC115TE, DTC115TM3, NSBC115TF3
TYPICAL CHARACTERISTICS − NSBC115TF3
1000
IC/IB = 10
150°C
hFE, DC CURRENT GAIN
VCE(sat), COLLECTOR−EMITTER
VOLTAGE (V)
10
150°C
25°C
1
−55°C
0.1
−55°C
100
VCE = 10 V
10
0.01
0
10
20
30
40
1
50
10
100
IC, COLLECTOR CURRENT (mA)
IC, COLLECTOR CURRENT (mA)
Figure 2. VCE(sat) vs. IC
Figure 3. DC Current Gain
2.4
100
2.0
IC, COLLECTOR CURRENT (mA)
f = 10 kHz
IE = 0 A
TA = 25°C
1.6
1.2
0.8
0.4
0
150°C
25°C
−55°C
10
1
0.1
VO = 5 V
0.01
0
10
20
30
40
0
50
4
8
12
16
20
24
VR, REVERSE VOLTAGE (V)
Vin, INPUT VOLTAGE (V)
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
Vin, INPUT VOLTAGE (V)
Cob, OUTPUT CAPACITANCE (pF)
25°C
−55°C
10
25°C
150°C
1
VO = 0.2 V
0.1
0
10
20
30
40
IC, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
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5
50
28
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D
0.25
3
E
1
2
T
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
HE
T
L
3X b
L1
VIEW C
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXMG
G
1
3X
2.90
3X
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
0.90
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.95
PITCH
0.80
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. NO CONNECTION PIN 1. CATHODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. GATE
3. ANODE
3. CATHODE−ANODE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−59
CASE 318D−04
ISSUE H
DATE 28 JUN 2012
SCALE 2:1
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3
HE
1
DIM
A
A1
b
c
D
E
e
L
HE
E
2
b
e
MIN
1.00
0.01
0.35
0.09
2.70
1.30
1.70
0.20
2.50
MILLIMETERS
NOM
MAX
1.15
1.30
0.06
0.10
0.43
0.50
0.14
0.18
2.90
3.10
1.50
1.70
1.90
2.10
0.40
0.60
2.80
3.00
C
A
MAX
0.051
0.004
0.020
0.007
0.122
0.067
0.083
0.024
0.118
XXX MG
G
SOLDERING FOOTPRINT*
1
0.95
0.037
0.95
0.037
INCHES
NOM
0.045
0.002
0.017
0.005
0.114
0.059
0.075
0.016
0.110
GENERIC
MARKING DIAGRAM
L
A1
MIN
0.039
0.001
0.014
0.003
0.106
0.051
0.067
0.008
0.099
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package*
(*Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
2.4
0.094
1.0
0.039
0.8
0.031
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42664B
SC−59
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N.C.
3. CATHODE
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. N.C.
3. ANODE
STYLE 5:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 6:
PIN 1. ANODE
2. CATHODE
3. ANODE/CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−70 (SOT−323)
CASE 419
ISSUE R
DATE 11 OCT 2022
SCALE 4:1
GENERIC
MARKING DIAGRAM
XX MG
G
1
XX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 1:
CANCELLED
STYLE 6:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
DOCUMENT NUMBER:
DESCRIPTION:
STYLE 2:
PIN 1. ANODE
2. N.C.
3. CATHODE
STYLE 3:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 7:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 8:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. CATHODE-ANODE
STYLE 10:
PIN 1. CATHODE
2. ANODE
3. ANODE-CATHODE
98ASB42819B
SC−70 (SOT−323)
STYLE 11:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−75/SOT−416
CASE 463−01
ISSUE G
3
1
2
DATE 07 AUG 2015
SCALE 4:1
−E−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
2
3
b 3 PL
0.20 (0.008)
e
DIM
A
A1
b
C
D
E
e
L
HE
−D−
1
M
D
HE
C
0.20 (0.008) E
A
L
MILLIMETERS
MIN
NOM MAX
0.70
0.80
0.90
0.00
0.05
0.10
0.15
0.20
0.30
0.10
0.15
0.25
1.55
1.60
1.65
0.70
0.80
0.90
1.00 BSC
0.10
0.15
0.20
1.50
1.60
1.70
INCHES
NOM MAX
0.031 0.035
0.002 0.004
0.008 0.012
0.006 0.010
0.063 0.065
0.031 0.035
0.04 BSC
0.004 0.006 0.008
0.060 0.063 0.067
MIN
0.027
0.000
0.006
0.004
0.061
0.027
GENERIC
MARKING DIAGRAM*
A1
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. GATE
2. SOURCE
3. DRAIN
XX M
G
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
1
XX
= Specific Device Code
M
= Date Code
G
= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
SOLDERING FOOTPRINT*
0.356
0.014
1.803
0.071
0.508
0.020
0.787
0.031
1.000
0.039
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ASB15184C
SC−75/SOT−416
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−1123
CASE 524AA
ISSUE C
SCALE 8:1
DATE 29 NOV 2011
−X−
D
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS.
−Y−
1
3
2
E
TOP VIEW
A
DIM
A
b
b1
c
D
E
e
HE
L
L2
HE
c
SIDE VIEW
3X
b
L2
GENERIC
MARKING DIAGRAM*
0.08 X Y
e
2X
3X
b1
XM
L
X
M
BOTTOM VIEW
1.20
0.34
0.26
1
0.38
= Specific Device Code
= Date Code
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
SOLDERING FOOTPRINT*
3X
MILLIMETERS
MIN
MAX
0.34
0.40
0.15
0.28
0.10
0.20
0.07
0.17
0.75
0.85
0.55
0.65
0.35
0.40
0.95
1.05
0.185 REF
0.05
0.15
2X
0.20
PACKAGE
OUTLINE
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
DOCUMENT NUMBER:
DESCRIPTION:
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
98AON23134D
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. GATE
2. SOURCE
3. DRAIN
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SOT−1123, 3−LEAD, 1.0X0.6X0.37, 0.35P
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE D
DATE 10 AUG 2009
SCALE 4:1
−X−
D
b1
A
−Y−
3
E
1
2X
HE
2
2X
e
b
C
0.08 X Y
3X
1
3X
DIM
A
b
b1
C
D
E
e
HE
L
L2
SIDE VIEW
TOP VIEW
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
L
GENERIC
MARKING DIAGRAM*
L2
BOTTOM VIEW
STYLE 1:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. N/C
3. CATHODE
STYLE 3:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 4:
PIN 1. CATHODE
2. CATHODE
3. ANODE
STYLE 5:
PIN 1. GATE
2. SOURCE
3. DRAIN
XX M
1
XX
M
RECOMMENDED
SOLDERING FOOTPRINT*
= Specific Device Code
= Date Code
*This information is generic. Please refer
to device data sheet for actual part
marking. Pb−Free indicator, “G”, may
or not be present.
2X
0.40
2X
MILLIMETERS
MIN
NOM
MAX
0.45
0.50
0.55
0.15
0.21
0.27
0.25
0.31
0.37
0.07
0.12
0.17
1.15
1.20
1.25
0.75
0.80
0.85
0.40 BSC
1.15
1.20
1.25
0.29 REF
0.15
0.20
0.25
0.27
PACKAGE
OUTLINE
1.50
3X
0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON12989D
SOT−723
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
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