FAN5091MTCX

www.fairchildsemi.com FAN5091 Two Slice Interleaved Synchronous Buck Converter Features Description • Programmable output from 1.10V to 1.85V in 25mV steps using an integrated 5-bit DAC • Two interleaved synchronous slices for maximum performance • 100nsec response time • Built-in current sharing between slices • Remote sense • Programmable Active Droop (Voltage Positioning) • Programmable frequency from 200KHz to 2MHz • Adaptive delay gate switching • Integrated high-current gate drivers • Integrated Power Good, OV, UV, Enable/Soft Start functions • Drives N-channel MOSFETs • Operation optimized for 5V operation • High efficiency mode (E*) at light load • Overcurrent protection using MOSFET sensing • 24 pin TSSOP package The FAN5091 is a synchronous multi-slice DC-DC controller IC which provides a highly accurate, programmable output voltage for all high-performance processors. Two interleaved synchronous buck regulator slices with built-in current sharing operate 180° out of phase to provide the fast transient response needed to satisfy high current applications while minimizing external components. The FAN5091 features remote voltage sensing and Programmable Active Droop for 100nsec converter transient response with minimum output capacitance. It has integrated high-current gate drivers, with adaptive delay gate switching, eliminating the need for external drive devices. The FAN5091 uses a 5-bit D/A converter to program the output voltage from 1.10V to 1.85V in 25mV steps with an accuracy of 1%. The FAN5091 uses a high level of integration to deliver load currents in excess of 50A from a 5V source with minimal external circuitry. The FAN5091 also offers integrated functions including Power Good, Output Enable/Soft Start, under- voltage lockout, over-voltage protection, and adjustable current limiting with independent current sense on each slice. It is available in a 24 pin TSSOP package. Applications • • • • Power supply for Pentium IV Power supply for Athlon VRM for Pentium IV processor Programmable step-down power supply Block Diagram +12V Bypass 6 +12V 18 13 23 5V Reg OSC + - Digital Control 15 +12V 17 16 + + +5V 14 VO +12V 12 + +5V 11 Digital Control + 5-Bit DAC 1 2 3 4 10 +12V Power Good 5 VID0 VID2 VID4 VID1 VID3 24 19 PWRGD 8 9 21 7 DROOP/E* GNDA 22 ENABLE/SS 20 ILIM Pentium is a registered trademark of Intel Corporation. Athlon is a registered trademark of AMD. Programmable Active Droop is a trademark of Fairchild Semiconductor. REV. 1.0.0 5/10/01 FAN5091 PRODUCT SPECIFICATION Pin Assignments VID0 VID1 VID2 VID3 VID4 BYPASS AGND LDRVB PGNDB SWB HDRVB BOOTB 1 2 3 4 5 6 7 8 9 10 11 12 FAN5091 24 23 22 21 20 19 18 17 16 15 14 13 VFB RT ENABLE/SS DROOP/E* ILIM PWRGD VCC LDRVA PGNDA SWA HDRVA BOOTA Pin Definitions Pin Number Pin Name Pin Function Description VID0-4 Voltage Identification Code Inputs. These open collector/TTL compatible inputs will program the output voltage over the ranges specified in Table 1. Pull-ups are internal to the controller. 6 BYPASS 5V Rail. Bypass this pin with a 1µF ceramic capacitor to AGND. 7 AGND Analog Ground. Return path for low power analog circuitry. This pin should be connected to a low impedance system ground plane to minimize ground loops. 8 LDRVB Low Side FET Driver for B. Connect this pin to the gate of an N-channel MOSFET for synchronous operation. The trace from this pin to the MOSFET gate should be 1MHz, Oscon or ceramic capacitors may be considered. They have much smaller ESR than comparable electrolytics, but also much smaller capacitance. The output capacitance should also include a number of small value ceramic capacitors placed as close as possible to the processor; 0.1µF and 0.01µF are recommended values. Input Filter The DC-DC converter design may include an input inductor between the system main supply and the converter input as shown in Figure 6. This inductor serves to isolate the main supply from the noise in the switching portion of the DC-DC converter, and to limit the inrush current into the input capacitors during power up. A value of 1.3µH is recommended. It is necessary to have some low ESR capacitors at the input to the converter. These capacitors deliver current when the high side MOSFET switches on. Because of the interleaving, the number of such capacitors required is greatly reduced from that required for a single-slice buck converter. Figure 6 shows 3 x 1000µF, but the exact number required will vary with the output voltage and current, according to the formula I out I rms = --------- 2DC – 4DC 2 2 for the two slice FAN5091, where DC is the duty cycle, DC = Vout / Vin. Capacitor ripple current rating is a function of temperature, and so the manufacturer should be contacted to find out the ripple current rating at the expected operational temperature. For details on the design of an input filter, refer to Applications Bulletin AB-16. 1.3µH Vin +5V 1000µF, 16V Electrolytic Output Filter Capacitors The output bulk capacitors of a converter help determine its output ripple voltage and its transient response. It has already been seen in the section on selecting an inductor that the ESR helps set the minimum inductance. For most converters, the number of capacitors required is determined by the transient response and the output ripple voltage, and these are determined by the ESR and not the capacitance value. That is, in order to achieve the necessary ESR to meet the transient and ripple requirements, the capacitance value required is already very large. 18 Figure 6. Input Filter Design Considerations and Component Selection Additional information on design and component selection may be found in Fairchild’s Application Note 59. REV. 1.0.0 5/10/01 PRODUCT SPECIFICATION FAN5091 PCB Layout Guidelines PC Motherboard Sample Layout and Gerber File • Placement of the MOSFETs relative to the FAN5091 is critical. Place the MOSFETs such that the trace length of the HIDRV and LODRV pins of the FAN5091 to the FET gates is minimized. A long lead length on these pins will cause high amounts of ringing due to the inductance of the trace and the gate capacitance of the FET. This noise radiates throughout the board, and, because it is switching at such a high voltage and frequency, it is very difficult to suppress. A reference design for motherboard implementation of the FAN5091 along with the PCAD layout Gerber file and silk screen can be obtained through your local Fairchild representative. • In general, all of the noisy switching lines should be kept away from the quiet analog section of the FAN5091. That is, traces that connect to pins 8-17 (LODRV, HIDRV, PGND and BOOT) should be kept far away from the traces that connect to pins 1 through 7, and pins 18-24. • Place the 0.1µF decoupling capacitors as close to the FAN5091 pins as possible. Extra lead length on these reduces their ability to suppress noise. FAN5091 Evaluation Board Fairchild provides an evaluation board to verify the system level performance of the FAN5091. It serves as a guide to performance expectations when using the supplied external components and PCB layout. Please contact your local Fairchild representative for an evaluation board. Additional Information For additional information contact your local Fairchild representative. • Each power and ground pin should have its own via to the appropriate plane. This helps provide isolation between pins. • Place the MOSFETs, inductor, and Schottky of a given slice as close together as possible for the same reasons as in the first bullet above. Place the input bulk capacitors as close to the drains of the high side MOSFETs as possible. In addition, placement of a 0.1µF decoupling cap right on the drain of each high side MOSFET helps to suppress some of the high frequency switching noise on the input of the DC-DC converter. • Place the output bulk capacitors as close to the CPU as possible to optimize their ability to supply instantaneous current to the load in the event of a current transient. Additional space between the output capacitors and the CPU will allow the parasitic resistance of the board traces to degrade the DC-DC converter’s performance under severe load transient conditions, causing higher voltage deviation. For more detailed information regarding capacitor placement, refer to Application Bulletin AB-5. • A PC Board Layout Checklist is available from Fairchild Applications. Ask for Application Bulletin AB-11. REV. 1.0.0 5/10/01 19 FAN5091 PRODUCT SPECIFICATION Mechanical Dimensions – 24 Lead TSSOP Inches Symbol Millimeters Min. Max. Min. Max. A A1 B C D — .002 .007 .004 .303 .047 .006 — 0.05 0.19 0.09 7.70 1.20 0.15 E e H .169 .177 .026 BSC .252 BSC .018 .030 4.30 4.50 0.65 BSC 6.40 BSC 0.45 0.75 24 24 L N α ccc .012 .008 .316 0.30 0.20 7.90 0° 8° 0° 8° — .004 — 0.10 Notes: Notes 1. Dimensioning and tolerancing per ANSI Y14.5M-1982. 2. "D" and "E" do not include mold flash. Mold flash or protrusions shall not exceed .006 inch (0.15mm). 3. "L" is the length of terminal for soldering to a substrate. 4. Terminal numbers are shown for reference only. 5. Symbol "N" is the maximum number of terminals. 2 2 3 5 D E H C A1 A B e SEATING PLANE –C– α L LEAD COPLANARITY ccc C 20 REV. 1.0.0 5/10/01 FAN5091 PRODUCT SPECIFICATION Ordering Information Product Number FAN5091MTC Description Package 5V 24 pin TSSOP DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com 5/10/01 0.0m 005 Stock#DS30005091  2001 Fairchild Semiconductor Corporation