High-Current, High &
Low-Side, Gate-Drive IC
FAN7390
Description
The FAN7390 is a monolithic high− and low−side gate−drive IC,
which can drive high speed MOSFETs and IGBTs that operate up to
+600 V. It has a buffered output stage with all NMOS transistors
designed for high pulse current driving capability and minimum
cross−conduction.
ON Semiconductor’s high−voltage process and common−mode
noise canceling techniques provide stable operation of the high−side
driver under high dv/dt noise circumstances. An advanced level shift
circuit offers high−side gate driver operation up to VS = −9.8 V
(typical) for VBS = 15 V.
The UVLO circuit prevents malfunction when VDD and VBS are
lower than the specified threshold voltage.
The high current and low output voltage drop feature make this
device suitable for the PDP sustain pulse driver, motor driver,
switching power supply, and high− power DC−DC converter
applications.
SOIC8
8−SOP
CASE 751EG
SOIC14
14−SOP
CASE 751ER
MARKING DIAGRAM
FAN7390
&Z&3&K
7390
ALYW
FAN7390MX
Features
• Floating Channels for Bootstrap Operation to +600 V
• Typically 4.5 A / 4.5 A Sourcing / Sinking Current Driving
•
•
•
•
•
•
•
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Capability
Common−Mode dv/dt Noise−Canceling Circuit
Built−in Under−Voltage Lockout for Both Channels
Matched Propagation Delay for Both Channels
Logic (VSS) and Power (COM) Ground ±7 V Offset
3.3 V and 5 V Input Logic Compatible
Output In−Phase with Input
This is a Pb−Free Device
7390,
FAN7390
A
L
YW
&Z
&3
&K
FAN7390M1X
= Device Code
= Assembly Site
= Wafer Lot Number
= Assembly Start Week
= Assembly Plant Code
= 3−Digit Date Code
= 2−Digits Lot Run Traceability Code
ORDERING INFORMATION
See detailed ordering and shipping information on page 12 of
this data sheet.
Applications
•
•
•
•
PDP Sustain Driver
HID Lamp Ballast
SMPS
Motor Driver
© Semiconductor Components Industries, LLC, 2008
May, 2021 − Rev. 2
1
Publication Order Number:
FAN7390/D
FAN7390
TYPICAL APPLICATION CIRCUIT
15 V
R BOOT
FAN7390
Up to 600 V
D BOOT
HIN
1
HIN
VB
8
LIN
2
LIN
HO
7
Controller
Q1
R1
C BOOT
3
COM
4
LO
VS
6
VDD
5
R2
OUTPUT
Load
C1
Q2
R3
R4
Figure 1. Application Circuit for Half−Bridge (Referenced 8−SOP)
15V
RBOOT
DBOOT
FAN7390M1
HIN
1
HIN
NC 14
LIN
2
LIN
VB 13
3
VSS
HO 12
4
NC
VS 11
5
COM
NC 10
6
LO
NC 9
7
VDD
NC
Up to 600 V
Controller
VSS
Q1
R1
R2
C BOOT
OUTPUT
Load
8
C1
R3
Q2
R4
Figure 2. Application Circuit for Half−Bridge (Referenced 14−SOP)
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2
FAN7390
INTERNAL BLOCK DIAGRAM
FAN7390
8
VB
7
HO
6
VS
5
VDD
4
LO
3
COM
13
VB
12
HO
11
VS
7
V DD
6
LO
5
COM
1
200 kW
NOISE
CANCELLER
R
S
DRIVER
HIN
PULSE
GENERATOR
UVLO
R
Q
LIN
DELAY
2
200 kW
DRIVER
UVLO
VSS/COM
LEVEL
SHIFT
Figure 3. Functional Block Diagram (Referenced 8−SOP)
FAN7390M1
1
200 kW
NOISE
CANCELLER
R
S
DRIVER
HIN
PULSE
GENERATOR
UVLO
R
Q
LIN
VSS/COM
LEVEL
SHIFT
DELAY
2
DRIVER
UVLO
200 kW
VSS
3
Pin 4, 8, 9, 10 and 14 are no connection
Figure 4. Functional Block Diagram (Referenced 14−SOP)
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3
FAN7390
PIN CONFIGURATION
FAN7390M
HIN
1
LIN
2
FAN7390M1
8
VB
HIN
1
14
NC
7
HO
LIN
2
13
VB
12
HO
11
VS
FAN7390
COM
3
6
VS
VSS
3
LO
4
5
VDD
NC
4
COM
5
10
NC
LO
6
9
NC
VDD
7
8
NC
FAN7390M1
Figure 5. Pin Assignments (Top View)
PIN DEFINITIONS
8−Pin
14−Pin
Name
Description
1
1
HIN
Logic Input for High−Side Gate Driver Output
2
2
LIN
Logic Input for Low−Side Gate Driver Output
3
VSS
Logic Ground (FAN7390M1 only)
3
5
COM
Low−Side Driver Return
4
6
LO
Low−Side Driver Output
5
7
VDD
Low−Side and Logic Part Supply Voltage
6
11
VS
High−Voltage Floating Supply Return
7
12
HO
High−Side Driver Output
8
13
VB
High−Side Floating Supply
4, 8, 9, 10, 14
NC
No Connect
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4
FAN7390
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, unless otherwise noted)
Symbol
Characteristics
VS
High−Side Floating Supply Offset Voltage
VB
High−Side Floating Supply Voltage
Min
Max
Unit
VB − 25
VB + 0.3
V
−0.3
625.0
V
VS − 0.3
VB + 0.3
V
VHO
High−Side Floating Output Voltage HO
VDD
Low−Side and Logic Fixed Supply Voltage
−0.3
25.0
V
VLO
Low−Side Output Voltage LO
−0.3
VDD + 0.3
V
VIN
Logic Input Voltage (HIN and LIN)
VSS − 0.3
VDD + 0.3
V
VSS
Logic Ground (FAN7390M1 only)
VDD − 25
VDD + 0.3
V
−
50
V/ns
8−SOP
0.625
W
14−SOP
1.000
8−SOP
200
dVS/dt
Allowable Offset Voltage Slew Rate
PD
(Note 1, 2, 3)
Power Dissipation
qJA
Thermal Resistance, Junction−to−Ambient
14−SOP
110
TJ
Junction Temperature
−
+150
°C
TSTG
Storage Temperature
−
+150
°C
°C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Mounted on 76.2 x 114.3 x 1.6 mm PCB (FR−4 glass epoxy material).
2. Refer to the following standards:
JESD51−2: Integral circuits thermal test method environmental conditions − natural convection
JESD51−3: Low effective thermal conductivity test board for leaded surface mount packages.
3. Do not exceed PD under any circumstances.
RECOMMENDED OPERATING CONDITIONS
Symbol
Min
Max
Unit
VB
High−Side Floating Supply Voltage
Parameter
VS + 10
VS + 22
V
VS
High−Side Floating Supply Offset Voltage
6 − VDD
600
V
VHO
High−Side Output Voltage
VS
VB
V
VDD
Low−Side and Logic Supply Voltage
10
22
V
VLO
Low−Side Output Voltage
COM
VDD
V
VIN
Logic Input Voltage (HIN and LIN)
VSS
VDD
V
TA
Operating Ambient Temperature
−40
+125
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
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5
FAN7390
ELECTRICAL CHARACTERISTICS (VBIAS (VDD, VBS) = 15.0 V, VS = VSS = COM, TA = 25°C, unless otherwise specified. The VIL,
VIH, and IIN parameters are referenced to VSS/COM and are applicable to the respective input signals HIN and LIN. The VO and IO
parameters are referenced to COM and VS is applicable to the respective output signals HO and LO.)
Characteristics
Symbol
Test Condition
Min
Typ
Max
Unit
V
POWER SUPPLY SECTION (VDD AND VBS)
VDDUV+
VBSUV+
VDD and VBS Supply Under−Voltage
Positive−going Threshold
8.0
8.8
9.8
VDDUV−
VBSUV−
VDD and VBS Supply Under−Voltage
Negative−going Threshold
7.4
8.3
9.0
VDDUVH
VBSUVH
VDD and VBS Supply Under−Voltage Lockout
Hysteresis Voltage
−
0.5
−
ILK
Offset Supply Leakage Current
VB = VS = 600 V
−
−
50
IQBS
Quiescent VBS Supply Current
VIN = 0 V or 5 V
−
45
80
IQDD
Quiescent VDD Supply Current
VIN = 0 V or 5 V
−
75
110
IPBS
Operating VBS Supply Current
fIN = 20 kHz, rms value
−
530
640
IPDD
Operating VDD Supply Current
fIN = 20 kHz, rms value
−
530
640
mA
mA
LOGIC INPUT SECTION (HIN, LIN)
VIH
Logic “1” Input Voltage
2.5
−
−
VIL
Logic “0” Input Voltage
−
−
1.2
IIN+
Logic “1” Input Bias Current
VIN = 5 V
−
25
50
IIN−
Logic “0” Input Bias Current
VIN = 0 V
RIN
Input Pull−down Resistance
V
mA
−
1.0
2.0
100
200
−
kW
GATE DRIVER OUTPUT SECTION (HO, LO)
VOH
High−level Output Voltage, VBIAS−VO
No Load
−
−
1.0
V
VOL
Low−level Output Voltage, VO
No Load
−
−
35
mV
IO+
Output High, Short−circuit Pulsed Current (Note 4)
VO = 0 V, VIN = 5 V with
PW < 1 0 ms
3.5
4.5
IO−
Output Low, Short−circuit Pulsed Current (Note 4)
VO = 15 V, VIN = 0 V with
PW < 10 ms
3.5
4.5
−
VS
Allowable Negative VS Pin Voltage for HIN Signal
Propagation to HO
−
−9.8
−7.0
V
−7.0
−
7.0
V
VSS−COM
VSS−COM/COM−VSS Voltage Endurability
A
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. This parameter guaranteed by design.
DYNAMIC ELECTRICAL CHARACTERISTICS (VBIAS (VDD, VBS) = 15.0 V, VS = VSS = COM = 0 V, CL = 1000 pF, and TA = 25°C
unless otherwise specified.)
Symbol
Characteristics
Test Condition
Min
Typ
Max
Unit
ns
ton
Turn−on Propagation Delay
VS = 0 V
−
140
220
toff
Turn−off Propagation Delay
VS = 0 V
−
140
220
MT
Delay Matching, HS & LS Turn−on/off
−
0
50
tr
Turn−on Rise Time
−
25
50
tf
Turn−off Fall Time
−
20
45
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6
FAN7390
240
240
220
220
200
200
180
180
tOFF (ns)
tON (ns)
TYPICAL CHARACTERISTICS
160
140
160
140
120
120
100
100
80
80
60
−40
−20
0
20
40
60
80
100
60
−40
120
−20
0
Temperature (°C)
30
30
tF (ns)
tR (ns)
40
20
10
80
100
120
20
10
−20
0
20
40
60
80
100
0
−40
120
−20
0
Temperature (°C)
20
40
60
80
100
120
Temperature (°C)
Figure 8. Turn−on Rise Time vs. Temperature
Figure 9. Turn−off Fall Time vs. Temperature
50
50
40
MTOFF (ns)
40
MTON (ns)
60
Figure 7. Turn−off Propagation Delay vs.
Temperature
40
30
20
30
20
10
10
0
−40
40
Temperature (°C)
Figure 6. Turn−on Propagation Delay vs.
Temperature
0
−40
20
0
−20
0
20
40
60
80
100
−10
−40
120
Temperature (°C)
−20
0
20
40
60
80
100
120
Temperature (°C)
Figure 10. Turn−on Delay Matching vs. Temperature
Figure 11. Turn−off Delay Matching vs. Temperature
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7
FAN7390
TYPICAL CHARACTERISTICS (continued)
140
120
120
100
80
IQBS (mA)
IQDD (mA)
100
80
60
60
40
40
20
20
0
−40
−20
0
20
40
60
80
100
0
−40
120
−20
0
Figure 12. Quiescent VDD Supply Current vs.
Temperature
800
800
IPBS (mA)
1000
IPDD (mA)
40
60
80
100
120
Figure 13. Quiescent VBS Supply Current vs.
Temperature
1000
600
400
600
400
200
−40
−20
0
20
40
60
80
100
200
−40
120
−20
0
Temperature (°C)
20
40
60
80
100
120
Temperature (°C)
Figure 14. Operating VDD Supply Current vs.
Temperature
Figure 15. Operating VBS Supply Current vs.
Temperature
9.5
9.0
9.0
8.5
VDDUV− (V)
VDDUV+ (V)
20
Temperature (°C)
Temperature (°C)
8.5
8.0
8.0
7.5
7.5
−40
−20
0
20
40
60
80
100
7.0
−40
120
Temperature (°C)
−20
0
20
40
60
80
100
Temperature (°C)
Figure 16. VDD UVLO+ vs. Temperature
Figure 17. VDD UVLO− vs. Temperature
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8
120
FAN7390
9.5
9.0
9.0
8.5
VBSUV− (V)
VBSUV+ (V)
TYPICAL CHARACTERISTICS (continued)
8.5
8.0
8.0
7.5
7.5
−40
−20
0
20
40
60
80
100
7.0
−40
120
−20
0
Figure 18. VBS UVLO+ vs. Temperature
60
80
100
120
Figure 19. VBS UVLO− vs. Temperature
1500
20
1200
10
900
VOL (mV)
VOH (mV)
40
Temperature (°C)
Temperature (°C)
600
0
−10
300
0
−40
−20
0
20
40
60
80
100
−20
−40
120
−20
0
20
40
60
80
100
120
Temperature (°C)
Temperature (°C)
Figure 20. High−Level Output Voltage vs.
Temperature
Figure 21. Low−Level Output Voltage vs.
Temperature
3.0
3.0
2.5
2.5
2.0
2.0
VIL (V)
VIH (V)
20
1.5
1.0
1.5
1.0
0.5
−40
−20
0
20
40
60
80
100
0.5
−40
120
Temperature (°C)
−20
0
20
40
60
80
100
Temperature (°C)
Figure 22. Logic High Input Voltage vs.
Temperature
Figure 23. Low Input Voltage vs. Temperature
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9
120
FAN7390
TYPICAL CHARACTERISTICS (continued)
60
−7
50
−8
30
VS (V)
IIN+ (mA)
40
20
−9
−10
10
−11
0
−10
−40
−20
0
20
40
60
80
100
−12
−40
120
Temperature (°C)
−20
0
20
40
60
80
100
Temperature (°C)
Figure 24. Logic Input High Bias Current vs.
Temperature
Figure 25. Allowable Negative VS Voltage vs.
Temperature
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10
120
FAN7390
SWITCHING TIME DEFINITIONS
15V
HIN
1 HIN
VB 8
LIN
2 LIN
HO 7
10 mF
100 nF
1 nF
VS 6
3 COM
15 V
4 LO
VDD 5
1 nF
10 mF
100 nF
Figure 26. Switching Time Test Circuit (Referenced 8−SOP)
HIN
LIN
HO
LO
Figure 27. Input/Output Timing Diagram
50%
HIN
LIN
t on
50%
tr
t off
90%
HO
LO
tf
90%
10%
10%
Figure 28. Switching Time Waveform Definitions
HIN
LIN
50%
LO
10%
50%
MT
HO
10%
90%
LO
MT
90%
HO
Figure 29. Delay Matching Waveform Definitions
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11
FAN7390
ORDERING INFORMATION
Package
Operating Temperature Range
Shipping†
FAN7390MX
SOIC8
8−SOP
(Pb−Free)
−40°C~125°C
3000 / Tape & Reel
FAN7390M1X
SOIC14
14−SOP
(Pb−Free)
Device
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC8
CASE 751EG
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13741G
SOIC8
DATE 30 SEP 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOIC14 N
CASE 751ER
ISSUE O
DOCUMENT NUMBER:
DESCRIPTION:
98AON13761G
SOIC14 N
DATE 31 DEC 2016
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
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