FQP15P12

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Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET -120 V, -15 A, 0.2 Ω Description Features This P-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor®’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, audio amplifier, DC motor control, and variable switching power applications. • -15 A, -120 V, RDS(on) = 0.2 Ω (Max.) @ VGS=-10 V, ID = -7.5 A • Low Gate Charge (Typ. 29 nC) • Low Crss (Typ. 110 pF) • 100% Avalanche Tested • 175°C Maximum Junction Temperature Rating S G G D S G D S TO-220 TO-220F D Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted. Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQP15P12 - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage - Pulsed FQPF15P12 -120 (Note 1) Unit V -15 -15 * A -10.6 -10.6 * A -60 -60 * A ± 30 V mJ EAS Single Pulsed Avalanche Energy (Note 2) 1157 IAR Avalanche Current (Note 1) -15 A EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25°C) (Note 1) 10 -5.0 -55 to +175 mJ V/ns W W/°C °C 300 °C dv/dt PD TJ, TSTG TL (Note 3) 100 0.67 - Derate above 25°C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8" from Case for 5 Seconds 41 0.27 * Drain current limited by maximum junction temperature. Thermal Characteristics Symbol RθJC Parameter Thermal Resistance, Junction-to-Case RθJS Thermal Resistance, Case-to-Sink Typ. RθJA Thermal Resistance, Junction-to-Ambient ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 FQPF15P12 3.66 Unit °C/W 40 -- °C/W 62.5 62.5 °C/W FQP15P12 1.5 1 www.fairchildsemi.com FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET August 2014 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Unit -120 -- -- V -- V/°C Off Characteristics BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = 250 µA ∆BVDSS / ∆TJ Breakdown Voltage Temperature Coefficient ID = -250 µA, Referenced to 25°C -- -0.13 VDS = -120 V, VGS = 0 V -- -- -1 µA VDS = -96 V, TC = 150°C -- -- -10 µA Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA IDSS IGSSF IGSSR Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 µA -2.0 -- -4.0 V RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -7.5 A -- 0.17 0.2 Ω gFS Forward Transconductance VDS = -40 V, ID = -7.5 A -- 9.5 -- S VDS = -25 V, VGS = 0 V, f = 1.0 MHz -- 850 1100 pF -- 310 400 pF -- 110 140 pF Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -60 V, ID = -15 A, RG = 25 Ω (Note 4) VDS = -96 V, ID = -15 A, VGS = -10 V (Note 4) -- 15 40 ns -- 100 210 ns -- 80 170 ns -- 80 170 ns -- 29 38 nC -- 5.1 -- nC -- 15 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -15 A ISM -- -- -60 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -15 A Drain-Source Diode Forward Voltage -- -- -4.0 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -15 A, dIF / dt = 100 A/µs -- 126 -- ns -- 0.61 -- µC Notes: 1. Repetitive rating : pulse width limited by maximum junction temperature. 2. L = 6.0mH, IAS = -15A, VDD = -50V, RG = 25 Ω, starting TJ = 25°C. 3. ISD ≤ -15A, di/dt ≤ 300A/µs, VDD ≤ BVDSS, starting TJ = 25°C. 4. Essentially independent of operating temperature. ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 2 www.fairchildsemi.com FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET Electrical Characteristics 2 2 10 VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.0 V -5.5 V -5.0 V Bottom : -4.5 V Top : 1 10 1 -I D, Drain Current [A] -ID, Drain Current [A] 10 0 10 10 o 175 C o 25 C 0 10 o -55 C ※ Notes : 1. VDS = -40V 2. 250μ s Pulse Test ※ Notes : 1. 250μ s Pulse Test 2. TC = 25℃ -1 10 -1 -1 0 10 10 1 10 10 2 4 6 8 10 -VGS, Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 1.0 0.9 0.7 -I DR , Reverse Drain Current [A] RDS(ON) [Ω ], Drain-Source On-Resistance 0.8 VGS = -10V 0.6 0.5 0.4 VGS = -20V 0.3 0.2 0.1 0.0 ※ Note : TJ = 25℃ 1 10 175℃ 25℃ 0 10 ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test -1 0 20 40 10 60 0.0 0.5 1.0 -ID, Drain Current [A] Figure 3. On-Resistance Variation vs Drain Current and Gate Voltage 2.0 2.5 3.0 3.5 4.0 Figure 4. Body Diode Forward Voltage Variation with Source Current and Temperature 12 2200 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd Coss 2000 1800 VDS = -30V 10 1400 -V GS , Gate-Source Voltage [V] Ciss 1600 Capacitance [pF] 1.5 -VSD, Source-Drain voltage [V] ※ Notes ; 1. VGS = 0 V 2. f = 1 MHz 1200 1000 Crss 800 600 400 200 0 -1 10 0 10 1 10 VDS = -96V 8 6 4 2 ※ Note : ID = -15A 0 0 10 20 30 40 QG, Total Gate Charge [nC] -VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 VDS = -60V Figure 6. Gate Charge Characteristics 3 www.fairchildsemi.com FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET Typical Characteristics (Continued) 3.0 1.2 RDS(ON) , (Normalized) Drain-Source On-Resistance -BV DSS , (Normalized) Drain-Source Breakdown Voltage 2.5 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = -250 μ A 0.9 0.8 -100 -50 0 50 100 150 2.0 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -7.5 A 0.5 0.0 -100 200 o TJ, Junction Temperature [ C] 50 100 150 200 o Figure 8. On-Resistance Variation vs Temperature Operation in This Area is Limited by R DS(on) 2 0 TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs Temperature 10 -50 Operation in This Area is Limited by R DS(on) 2 10 -I D, Drain Current [A] -I D, Drain Current [A] 100 µs 1 ms 10 ms 1 10 DC 0 10 ※ Notes : 100 µs 1 ms 1 10 10 ms DC 0 10 ※ Notes : o o 1. TC = 25 C 1. TC = 25 C o o 2. TJ = 175 C 3. Single Pulse 2. TJ = 175 C 3. Single Pulse -1 10 -1 0 1 10 10 2 10 10 -VDS, Drain-Source Voltage [V] 0 10 1 10 2 10 -VDS, Drain-Source Voltage [V] Figure 9-1. Maximum Safe Operating Area for FQP15P12 Figure 9-2. Maximum Safe Operating Area for FQPF15P12 20 -I D, Drain Current [A] 15 10 5 0 25 50 75 100 125 150 175 TC, Case Temperature [℃] Figure 10. Maximum Drain Current vs Case Temperature ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 4 www.fairchildsemi.com FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET Typical Characteristics (Continued) 0 D = 0 .5 0 .2 ※ N o te s : 1 . Z θ J C( t) = 1 .5 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C( t) 0 .1 10 0 .0 5 -1 0 .0 2 0 .0 1 θ JC ( t) , T h e r m a l R e s p o n s e 10 PDM t1 Z s in g le p u ls e 10 FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET Typical Characteristics t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] D = 0 .5 10 0 0 .2 ※ N o te s : 1 . Z θ J C(t) = 3 .6 6 ℃ /W M a x. 2 . D u ty F a c to r, D = t 1 /t 2 3 . T JM - T C = P D M * Z θ J C(t) 0 .1 0 .0 5 10 0 .0 2 0 .0 1 -1 JC Zθ (t) , T h e rm a l R e s p o n s e Figure 11-1. Transient Thermal Response Curve for FQP15P12 PDM s in g le p u ls e 10 t1 t2 -2 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ] Figure 11-2. Transient Thermal Response Curve for FQPF15P12 ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 5 www.fairchildsemi.com FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET 200nF 200nF 12V VGS Same Same T Ty ype as DUT DUT 50KΩ 50K Ω Qg -10V 300nF 300nF VDS VGS Qgs Qgd DUT DUT VGS Charg Ch arge e Figure 12. Gate Charge Test Circuit & Waveform VDS RG RL t on td( d(on on)) VDD VGS VGS t of offf tr td( d(of offf ) tf 10 10% % DUT DUT VGS VDS 90% Figure 13. Resistive Switching Test Circuit & Waveforms VDS BVDS DSS S 1 --------------------------------EAS = ---- L IAS2 --2 BVDS DSS S - VDD L tp ID RG VDD VDD VGS Tim Ti me VDS (t) (t)) ID (t DUT DUT IAS BVDSS tp Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 6 www.fairchildsemi.com VDS DUT _ I SD L Driver Driv er RG VGS VGS ( Driver Driver ) Compliment of DUT Comp (N-C (N-Channel hannel)) VDD • dv/dt cont ntrrolled b byy RG • ISD controlled by pu pullse pe perriod Gate Pu Pulse W idth D = -------------------------Gate Ga te Pu Pullse Pe Perriod 10 10V V Body Bo dy D Diiod ode eR Re everse C Cu urrent I SD ( DUT ) IRM di//dt di IFM , Bo Body dy D Diiod ode eF Fo orward Cu Current VDS ( DUT ) VSD Body Bo dy D Diiode For Forw ward Vo Voltag age e Drop Drop VDD Body Bo dy Diod Diode e Recov cove ery dv dv/d /dtt Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms ©2003 Fairchild Semiconductor Corporation FQP15P12 / FQPF15P12 Rev. C2 7 www.fairchildsemi.com FQP15P12 / FQPF15P12 P-Channel QFET® MOSFET + SUPPLIER "B" PACKAGE SHAPE 3.50 10.67 9.65 E SUPPLIER "A" PACKAGE SHAPE 3.40 2.50 16.30 13.90 IF PRESENT, SEE NOTE "D" 16.51 15.42 E 9.40 8.13 E 1 [2.46] 2 3 C 4.10 2.70 14.04 12.70 2.13 2.06 FRONT VIEWS 4.70 4.00 1.62 H 1.42 "A1" 8.65 7.59 SEE NOTE "F" 1.62 1.10 2.67 2.40 1.00 0.55 6.69 6.06 OPTIONAL CHAMFER E 14.30 11.50 NOTE "I" BOTTOM VIEW 3 0.60 0.36 SIDE VIEW 2.85 2.10 2 1 BACK VIEW NOTES: A) REFERENCE JEDEC, TO-220, VARIATION AB B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS COMMON TO ALL PACKAGE SUPPLIERS EXCEPT WHERE NOTED [ ]. D) LOCATION OF MOLDED FEATURE MAY VARY (LOWER LEFT CORNER, LOWER CENTER AND CENTER OF THE PACKAGE) E DOES NOT COMPLY JEDEC STANDARD VALUE. F) "A1" DIMENSIONS AS BELOW: SINGLE GAUGE = 0.51 - 0.61 DUAL GAUGE = 1.10 - 1.45 G) DRAWING FILE NAME: TO220B03REV9 H PRESENCE IS SUPPLIER DEPENDENT I) SUPPLIER DEPENDENT MOLD LOCKING HOLES IN HEATSINK. B A 10.36 9.96 B 3.28 3.08 7.00 3.40 3.20 2.66 2.42 0.70 SEE NOTE "F" SEE NOTE "F" 6.88 6.48 1 X 45° B 16.00 15.60 16.07 15.67 (3.23) B 1 2.14 3 1.47 1.24 2.96 2.56 0.90 0.70 10.05 9.45 0.50 M A 30° 0.45 0.25 2.54 B 2.54 B 4.90 4.50 NOTES: A. EXCEPT WHERE NOTED CONFORMS TO EIAJ SC91A. B DOES NOT COMPLY EIAJ STD. VALUE. C. ALL DIMENSIONS ARE IN MILLIMETERS. D. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR PROTRUSIONS. E. DIMENSION AND TOLERANCE AS PER ASME Y14.5-1994. F. OPTION 1 - WITH SUPPORT PIN HOLE. OPTION 2 - NO SUPPORT PIN HOLE. G. DRAWING FILE NAME: TO220M03REV5 0.60 0.45 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. 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