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FSGM0465RWDTU

FSGM0465RWDTU

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO220-6

  • 描述:

    IC PWM/SENSEFET SMPS TO-220F-6W

  • 数据手册
  • 价格&库存
FSGM0465RWDTU 数据手册
FSGM0465R Green-Mode Power Switch Description The FSGM0465R is an integrated Pulse Width Modulation (PWM) controller and SENSEFET® specifically designed for offline Switch−Mode Power Supplies (SMPS) with minimal external components. The PWM controller includes an integrated fixed−frequency oscillator, Under−Voltage Lockout (UVLO), Leading−Edge Blanking (LEB), optimized gate driver, internal soft−start, temperature−compensated precise current sources for loop compensation, and self−protection circuitry. Compared with a discrete MOSFET and PWM controller solution, the FSGM series can reduce total cost, component count, size, and weight; while simultaneously increasing efficiency, productivity, and system reliability. This device provides a basic platform suited for cost−effective design of a flyback converter. www.onsemi.com TO−220−6LD LF CASE 340BG Features • Soft Burst−Mode Operation for Low Standby Power Consumption • • • • • • • • and Low Noise Precision Fixed Operating Frequency: 66 kHz Pulse−by−Pulse Current Limit Various Protection Functions: Overload Protection (OLP), Over−Voltage Protection (OVP), Abnormal Over−Current Protection (AOCP), Internal Thermal Shutdown (TSD) with Hysteresis, Output−Short Protection (OSP), and Under−Voltage Lockout (UVLO) with Hysteresis Auto−Restart Mode Internal Startup Circuit Internal High−Voltage SENSEFET: 650 V Built−in Soft−Start: 15 ms These are Pb−Free Devices TO−220 FULLPAK 6LD LF CASE 340BP MARKING DIAGRAM $Y&Z&3&K GM0465R Applications • Power Supply for LCD TV and Monitor, STB and DVD Combination Related Resources • Power Supply WebDesigner — Flyback Design & Simulation − In Minutes at No Expense $Y &Z &3 &K GM0465R = ON Semiconductor Logo = Assembly Plant Code = 3−Digit Date Code Format = 2−Digit Lot Run Tracebility Code = Specific Device Code Data ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2019 July, 2019 − Rev. 2 1 Publication Order Number: FSGM0465R/D FSGM0465R ORDERING INFORMATION Output Power Table (Note 2) Operating Junction Temperature 230VAC  15% (Note 3) Current Limit RDS(ON) (Max.) 85 − 265 VAC Adapter (Note 4) Open Frame (Note 5) Adapter (Note 4) Open Frame (Note 5) Replaces Device Shipping 400 / Tube Part Number Package FSGM0465RWDTU TO−220F 6−Lead (Note 1) W−Forming −40°C ~ +125°C 1.80 A 2.6 W 60 W 70 W 33 W 48 W FSDM0465RE FSGM0465RUDTU TO−220F 6−Lead (Note 1) U−Forming −40°C ~ +125°C 1.80 A 2.6 W 60 W 70 W 33 W 48 W FSDM0465RE FSGM0465RLDTU TO−220F 6−Lead (Note 1) L−Forming −40°C ~ +125°C 1.80 A 2.6 W 60 W 70 W 33 W 48 W FSDM0465RE 1. 2. 3. 4. 5. Pb−free package per JEDEC J−STD−020B. The junction temperature can limit the maximum output power. 230 VAC or 100 / 115 VAC with voltage doubler. Typical continuous power in a non−ventilated enclosed adapter measured at 50°C ambient temperature. Maximum practical continuous power in an open−frame design at 50°C ambient temperature. Application Circuit VO AC IN VSTR Drain PWM GND FB VCC Figure 1. Typical Application Circuit www.onsemi.com 2 FSGM0465R Internal Block Diagram N.C. VSTR VCC Drain 5 6 3 1 ICH Vref Vburst 0.5 V / 0.7 V VCC Vref I DELAY 7.5V / 12V OSC Soft Start I FB PWM FB VCC good Soft Burst 4 S Q R Q Gate Driver 3R LEB (300 ns) R tON < tOSP (1.2 ms) LPF VAOCP VOSP VSD 6V TSD VCC good S Q R Q VCC VOVP 24.5 V Figure 2. Internal Block Diagram Pin Configuration 6. VSTR 5. N.C. 4. FB 3. VCC 2. GND 1. Drain Figure 3. Pin Configuration (Top View) www.onsemi.com 3 2 GND FSGM0465R PIN DEFINITIONS ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ Pin No. Name Description 1 Drain SENSEFET Drain. High−voltage power SENSEFET drain connection. 2 GND Ground. This pin is the control ground and the SENSEFET source. 3 VCC Power Supply. This pin is the positive supply input, which provides the internal operating current for both startup and steady−state operation. 4 FB Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto−coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6 V, the overload protection triggers, which shuts down the power switch. 5 N.C. No connection. 6 VSTR Startup. This pin is connected directly, or through a resistor, to the high−voltage DC link. At startup, the internal high−voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12 V, the internal current source (ICH) is disabled. ABSOLUTE MAXIMUM RATINGS Symbol Parameter Min Max Unit VSTR VSTR Pin Voltage − 650 V VDS Drain Pin Voltage − 650 V VCC VCC Pin Voltage − 26 V VFB Feedback Pin Voltage −0.3 12.0 V IDM Drain Current Pulsed IDS Continuous Switching Drain Current (Note 6) − 10 A TC = 25°C − 5.0 A TC = 100°C − 3.2 A EAS Single Pulsed Avalanche Energy (Note 7) − 250 mJ PD Total Power Dissipation (TC = 25°C) (Note 8) − 45 W TJ Maximum Junction Temperature − 150 °C Operating Junction Temperature (Note 9) −40 +125 °C TSTG Storage Temperature −55 +150 °C VISO Minimum Isolation Voltage (Note 10) 2.5 − kV ESD Electrostatic Discharge Capability Human Body Model, JESD22−A114 2 − kV Charged Device Model, JESD22−C101 2 − Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 6. Repetitive peak switching current when the inductive load is assumed: Limited by maximum duty (DMAX = 0.75) and junction temperature (see Figure 4). 7. L = 45 mH, starting TJ = 25°C. 8. Infinite cooling condition (refer to the SEMI G30−88). 9. Although this parameter guarantees IC operation, it does not guarantee all electrical characteristics. 10. The voltage between the package back side and the lead is guaranteed. IDS DMAX f SW Figure 4. Repetitive Peak Switching Current www.onsemi.com 4 FSGM0465R THERMAL CHARACTERISTICS Symbol Characteristic qJA Junction−to−Ambient Thermal Impedance (Note 11) qJC Junction−to−Case Thermal Impedance (Note 12) Value Unit 62.5 °C/W 3 °C/W 11. Infinite cooling condition (refer to the SEMI G30−88). 12. Free standing with no heat−sink under natural convection. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Parameter Test Condition Min Typ Max Unit 650 − − V SENSEFET SECTION BVDSS Drain−Source Breakdown Voltage VCC = 0 V, ID = 250 mA IDSS Zero−Gate−Voltage Drain Current VDS = 520 V, TA = 125°C − − 250 mA Drain−Source On−State Resistance VGS = 10 V, ID = 1 A − 2.1 2.6 W CISS Input Capacitance (Note 13) VDS = 25 V, VGS = 0 V, f = 1MHz − 436 − pF COSS Output Capacitance (Note 13) VDS = 25 V, VGS = 0 V, f = 1MHz − 65 − pF Rise Time VDS = 325 V, ID = 4 A, RG = 25 W − 24 − ns Fall Time VDS = 325 V, ID = 4 A, RG = 25 W − 24 − ns td(on) Turn−on Delay Time VDS = 325 V, ID = 4 A, RG = 25 W − 13 − ns td(off) Turn−off Delay Time VDS = 325 V, ID = 4 A, RG = 25 W − 30 − ns VCC = 14 V, VFB = 4 V 60 66 72 kHz Switching Frequency Variation (Note 13) −25°C < TJ < +125°C − ±5 ±10 % DMAX Maximum Duty Ratio VCC = 14 V, VFB = 4 V 65 70 75 % DMIN Minimum Duty Ratio VCC = 14 V, VFB = 0 V − − 0 % IFB Feedback Source Current VFB = 0 160 210 260 mA VSTART UVLO Threshold Voltage VFB = 0 V, VCC Sweep 11 12 13 V After Turn−on, VFB = 0 V 7.0 7.5 8.0 V 13 − 23 V VSTR = 40 V, VCC Sweep − 15 − ms VCC = 14 V, VFB Sweep 0.6 0.7 0.8 V VBURL 0.4 0.5 0.6 V Hys − 200 − mV RDS(ON) tr tf CONTROL SECTION fS DfS Switching Frequency VSTOP VOP VCC Operating Range tS/S Internal Soft−Start Time BURST−MODE SECTION VBURH Burst−Mode Voltage PROTECTION SECTION ILIM Peak Drain Current Limit di/dt = 300 mA/ms 1.64 1.80 1.96 A VSD Shutdown Feedback Voltage VCC = 14 V, VFB Sweep 5.5 6.0 6.5 V Shutdown Delay Current VCC = 14 V, VFB = 4 V 2.5 3.3 4.1 mA − 300 − ns 23.0 24.5 26.0 V IDELAY Hys VOVP Leading−Edge Blanking Time (Note 13, 14) Over−Voltage Protection VCC Sweep www.onsemi.com 5 FSGM0465R ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) Symbol Parameter Test Condition Min Typ Max Unit 1.0 1.2 1.4 ms 1.8 2.0 2.2 V 2.0 2.5 3.0 ms 130 140 150 °C − 30 − °C PROTECTION SECTION tOSP VOSP Output Short Protection (Note 13) tOSP_FB TSD OSP Triggered when tON < tOSP & VFB > VOSP (Lasts Longer than tOSP_FB) Threshold Time Threshold VFB VFB Blanking Time Thermal Shutdown Temperature (Note 13) Hys Shutdown Temperature Hysteresis TOTAL DEVICE SECTION IOP Operating Supply Current, (Control Part in Burst Mode) VCC = 14 V, VFB = 0 V 1.2 1.6 2.0 mA IOPS Operating Switching Current, (Control Part and SENSEFET Part) VCC = 14 V, VFB = 4 V 2.0 2.5 3.0 mA Start Current VCC = 11 V (Before VCC Reaches VSTART) 0.5 0.6 0.7 mA Startup Charging Current VCC = VFB = 0 V, VSTR = 40 V 1.00 1.15 1.50 mA Minimum VSTR Supply Voltage VCC = VFB = 0 V, VSTR Sweep − 26 − V ISTART ICH VSTR Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 13. Although these parameters are guaranteed, they are not 100% tested in production. 14. tLEB includes gate turn−on time. Table 1. COMPARISON OF FSDM0465RE AND FSGM0465R Function FSDM0465RE FSGM0465R Burst Mode Advanced Burst Advanced Soft Burst Lightning Surge Strong Advantages of FSGM0465R Low noise and low standby power Enhanced SENSEFET and controller against lightning surge Soft−Start 10 ms (Built−in) 15 ms (Built−in) Protections OLP OVP TSD OLP OVP OSP AOCP TSD with Hysteresis Power Balance Long TCLD Very Short TCLD Longer soft−start time Enhanced protections and high reliability The difference of input power between the low and high input voltage is quite small www.onsemi.com 6 FSGM0465R 1.20 1.20 1.15 1.15 1.10 1.10 Normalized Normalized TYPICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) 1.05 1.00 0.95 1.05 1.00 0.95 0.90 0.90 0.85 0.85 0.80 −40°C 0.80 −25°C 0°C 25°C 50°C 75°C 100°C 125°C −40°C −25°C 0°C Temperature [°C] 1.40 1.20 1.30 1.15 1.20 1.10 Normalized Normalized 75°C 100°C 125°C Figure 6. Operating Switching Current (IOPS) vs. TA 1.10 1.00 0.90 1.05 1.00 0.95 0.80 0.90 0.70 0.85 0.60 0.80 −25°C 0°C 25°C 50°C 75°C 100°C 125°C −40°C −25°C 0°C Temperature [°C] 25°C 50°C 75°C 100°C 125°C Temperature [°C] Figure 7. Startup Charging Current (ICH) vs. TA Figure 8. Peak Drain Current Limit (ILIM) vs. TA 1.20 1.20 1.15 1.15 1.10 1.10 Normalized Normalized 50°C Temperature [°C] Figure 5. Operating Supply Current (IOP) vs. TA −40°C 25°C 1.05 1.00 0.95 1.05 1.00 0.95 0.90 0.90 0.85 0.85 0.80 0.80 −40°C −25°C 0°C 25°C 50°C 75°C 100°C 125°C −40°C Temperature [°C] −25°C 0°C 25°C 50°C 75°C 100°C 125°C Temperature [°C] Figure 9. Feedback Source Current (IFB) vs. TA Figure 10. Shutdown Delay Current (IDELAY) vs. TA www.onsemi.com 7 FSGM0465R 1.20 1.20 1.15 1.15 1.10 1.10 Normalized Normalized TYPICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) 1.05 1.00 0.95 1.05 1.00 0.95 0.90 0.90 0.85 0.85 0.80 −40°C 0.80 −25°C 0°C 25°C 50°C 75°C 100°C 125°C −40°C −25°C 0°C Temperature [°C] 1.15 1.10 1.10 Normalized Normalized 1.20 1.15 1.05 1.00 0.95 100°C 125°C 1.05 1.00 0.95 0.90 0.90 0.85 0.85 0.80 0.80 −25°C 0°C 25°C 50°C 75°C 100°C 125°C −40°C −25°C 0°C Temperature [°C] 25°C 50°C 75°C 100°C 125°C Temperature [°C] Figure 13. Shutdown Feedback Voltage (VSD) vs. TA Figure 14. Over−Voltage Protection (VOVP) vs. TA 1.20 1.20 1.15 1.15 1.10 1.10 Normalized Normalized 75°C Figure 12. UVLO Threshold Voltage (VSTOP) vs. TA 1.20 1.05 1.00 0.95 1.05 1.00 0.95 0.90 0.90 0.85 0.85 0.80 −40°C 50°C Temperature [°C] Figure 11. UVLO Threshold Voltage (VSTART) vs. TA −40°C 25°C 0.80 −25°C 0°C 25°C 50°C 75°C 100°C 125°C −40°C Temperature [°C] −25°C 0°C 25°C 50°C 75°C 100°C 125°C Temperature [°C] Figure 15. Switching Frequency (fS) vs. TA Figure 16. Maximum Duty Ratio (DMAX) vs. TA www.onsemi.com 8 FSGM0465R FUNCTIONAL DESCRIPTION the required output voltage. This helps prevent transformer saturation and reduces stress on the secondary diode during startup. Startup At startup, an internal high−voltage current source supplies the internal bias and charges the external capacitor (CVcc) connected to the VCC pin, as illustrated in Figure 17. When VCC reaches 12 V, the FSGM0465R begins switching and the internal high−voltage current source is disabled. The FSGM0465R continues normal switching operation and the power is supplied from the auxiliary transformer winding unless VCC goes below the stop voltage of 7.5 V. Feedback Control This device employs current−mode control, as shown in Figure 18. An opto−coupler (such as the FOD817) and shunt regulator (such as the KA431) are typically used to implement the feedback network. Comparing the feedback voltage with the voltage across the RSENSE resistor makes it possible to control the switching duty cycle. When the reference pin voltage of the shunt regulator exceeds the internal reference voltage of 2.5 V, the opto−coupler LED current increases, pulling down the feedback voltage and reducing drain current. This typically occurs when the input voltage is increased or the output load is decreased. VDC CVcc VCC 3 6 Pulse−by−Pulse Current Limit Because current− mode control is employed, the peak current through the SENSEFET is limited by the inverting input of PWM comparator (VFB*), as shown in Figure 18. Assuming that the 210 mA current source flows only through the internal resistor (3R + R = 11.6 kW), the cathode voltage of diode D2 is about 2.4 V. Since D1 is blocked when the feedback voltage (VFB) exceeds 2.4 V, the maximum voltage of the cathode of D2 is clamped at this voltage. Therefore, the peak value of the current through the SENSEFET is limited. VSTR ICH 7.5 V / 12 V Vref VCC good Internal Bias Figure 17. Startup Block Leading−Edge Blanking (LEB) At the instant the internal SENSEFET is turned on, a high−current spike usually occurs through the SENSEFET, caused by primary−side capacitance and secondary−side rectifier reverse recovery. Excessive voltage across the RSENSE resistor leads to incorrect feedback operation in the current mode PWM control. To counter this effect, the FSGM0465R employs a leading−edge blanking (LEB) circuit. This circuit inhibits the PWM comparator for tLEB (300 ns) after the SENSEFET is turned on. Soft−Start The FSGM0465R has an internal soft−start circuit that increases PWM comparator inverting input voltage, together with the SENSEFET current, slowly after it starts. The typical soft−start time is 15 ms. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is progressively increased to smoothly establish Drain 1 Vref VCC VOUT VFB FOD817 IDELAY IFB D1 D2 FB OSC 3R 4 CFB PWM VFB* R Gate Driver LEB (300 ns) KA431 OSP VOSP AOCP OLP VSD Figure 18. Pulse Width Modulation Circuit www.onsemi.com 9 RSENSE VAOCP GND 2 FSGM0465R Protection Circuits current, thus increasing the feedback voltage (VFB). If VFB exceeds 2.4 V, D1 is blocked and the 3.3 mA current source starts to charge CFB slowly up. In this condition, VFB continues increasing until it reaches 6.0 V, when the switching operation is terminated, as shown in Figure 20. The delay time for shutdown is the time required to charge CFB from 2.4 V to 6.0 V with 3.3 mA. A 25 ~ 50 ms delay is typical for most applications. This protection is implemented in auto−restart mode. The FSGM0465R has several self−protective functions, such as Overload Protection (OLP), Abnormal Over−Current Protection (AOCP), Output−Short Protection (OSP), Over−Voltage Protection (OVP), and Thermal Shutdown (TSD). All the protections are implemented as auto−restart. Once the fault condition is detected, switching is terminated and the SENSEFET remains off. This causes VCC to fall. When VCC falls to the Under−Voltage Lockout (UVLO) stop voltage of 7.5 V, the protection is reset and the startup circuit charges the VCC capacitor. When VCC reaches the start voltage of 12.0 V, the FSGM0465R resumes normal operation. If the fault condition is not removed, the SENSEFET remains off and VCC drops to stop voltage again. In this manner, the auto−restart can alternately enable and disable the switching of the power SENSEFET until the fault condition is eliminated. Because these protection circuits are fully integrated into the IC without external components, the reliability is improved without increasing cost. VDS Power on Fault occurs VFB 6.0 V 2.4 V t12 = CFB x (6.0 − 2.4) / Idelay t1 Fault removed t Abnormal Over−Current Protection (AOCP) When the secondary rectifier diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow through the SENSEFET during the minimum turn−on time. Even though the FSGM0465R has overload protection, it is not enough to protect the FSGM0465R in that abnormal case; since severe current stress is imposed on the SENSEFET until OLP is triggered. The FSGM0465R internal AOCP circuit is shown in Figure 21. When the gate turn−on signal is applied to the power SENSEFET, the AOCP block is enabled and monitors the current through the sensing resistor. The voltage across the resistor is compared with a preset AOCP level. If the sensing resistor voltage is greater than the AOCP level, the set signal is applied to the S−R latch, resulting in the shutdown of the SMPS. 12.0 V 7.5 V t Fault situation t2 Figure 20. Overload Protection VCC Normal operation Overload Protection Normal operation Figure 19. Auto−Restart Protection Waveforms Overload Protection (OLP) Overload is defined as the load current exceeding its normal level due to an unexpected abnormal event. In this situation, the protection circuit should trigger to protect the SMPS. However, even when the SMPS is in normal operation, the overload protection circuit can be triggered during the load transition. To avoid this undesired operation, the overload protection circuit is designed to trigger only after a specified time to determine whether it is a transient situation or a true overload situation. Because of the pulse−by−pulse current limit capability, the maximum peak current through the SENSEFET is limited and, therefore, the maximum input power is restricted with a given input voltage. If the output consumes more than this maximum power, the output voltage (VOUT) decreases below the set voltage. This reduces the current through the opto−coupler LED, which also reduces the opto−coupler transistor Drain 1 OSC 3R VFB* PWM Gate Driver R LEB (300 ns) R SENSE Q S Q R VAOCP VCC good GND 2 Figure 21. Abnormal Over−Current Protection www.onsemi.com 10 FSGM0465R Output−Short Protection (OSP) If the output is shorted, steep current with extremely high di/dt can flow through the SENSEFET during the minimum turn−on time. Such a steep current brings high−voltage stress on the drain of the SENSEFET when turned off. To protect the device from this abnormal condition, OSP is included. It is comprised of detecting VFB and SENSEFET turn−on time. When the VFB is higher than 2 V and the SENSEFET turn−on time is lower than 1.2 ms, the FSGM0465R recognizes this condition as an abnormal error and shuts down PWM switching until VCC reaches VSTART again. An abnormal condition output short is shown in Figure 22. VFB* MOSFET Drain Current Rectifier Diode Current Thermal Shutdown (TSD) The SENSEFET and the control IC on a die in one package makes it easier for the control IC to detect the over temperature of the SENSEFET. If the temperature exceeds ~140°C, the thermal shutdown is triggered and the FSGM0465R stops operation. The FSGM0465R operates in auto−restart mode until the temperature decreases to around 110°C, when normal operation resumes. Soft Burst−Mode Operation To minimize power dissipation in standby mode, the FSGM0465R enters burst−mode operation. As the load decreases, the feedback voltage decreases. As shown in Figure 23, the device automatically enters burst mode when the feedback voltage drops below VBURL (500 mV). At this point, switching stops and the output voltages start to drop at a rate dependent on standby current load. This causes the feedback voltage to rise. Once it passes VBURH (700 mV), switching resumes. At this point, the drain current peak increases gradually. This soft burst−mode can reduce audible noise during burst−mode operation. The feedback voltage then falls and the process repeats. Burst−mode operation alternately enables and disables switching of the SENSEFET, thereby reducing switching loss in standby mode. ILIM VFB * = 0.5 V  VFB * = 2.0 V ILm 0 t OFF t ON 1.2 ms 1.2 ms t output short occurs VOUT I OUT 0 OSP t VO OSP triggered 0 t t VFB Figure 22. Output−Short Protection Over−Voltage Protection (OVP) If the secondary−side feedback circuit malfunctions or a solder defect causes an opening in the feedback path, the current through the opto−coupler transistor becomes almost zero. Then VFB climbs up in a similar manner to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the overload protection is triggered. Because more energy than required is provided to the output, the output voltage may exceed the rated voltage before the overload protection is triggered, resulting in the breakdown of the devices in the secondary side. To prevent this situation, an OVP circuit is employed. In general, the VCC is proportional to the output voltage and the FSGM0465R uses VCC instead of directly monitoring the output voltage. If VCC exceeds 24.5 V, an OVP circuit is triggered, resulting in the termination of the switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed to be below 24.5 V. 0.70 V 0.50 V t IDS Soft Burst t VDS t Switching t1 disabled Switching t2 t3 disabled t4 Figure 23. Burst−Mode Operation www.onsemi.com 11 FSGM0465R TYPICAL APPLICATION CIRCUIT Table 2. TYPICAL APPLICATION CIRCUIT Application Input Voltage Rated Output Rated Power LCD TV, Monitor Power Supply 85 ~ 265 VAC 5.0 V (2 A) 14.0 V (2.4 A) 43.6 W 2. The SMD−type capacitor (C106) must be placed as close as possible to the VCC pin to avoid malfunction by abrupt pulsating noises and to improve ESD and surge immunity. Capacitance between 100 nF and 220 nF is recommended. Key Design Notes: 1. The delay time for overload protection is designed to be about 30 ms with C105 (27 nF). OLP time between 25 ms (22 nF) and 50 ms (43 nF) is recommended. Schematic T101 EER3016 BD101 G2SBA60 2 C104 3.3nF 630V R103 43k Ω 1W R102 75k Ω D101 1N 4007 C103 100μF 400V 6 3 VSTR Drain 10 2 6, 9 4 4 C105 27nF 100V C102 150nF 275VAC FB VCC GND L201 5μH 14V, 2.4A C201 1000μF 25V C202 1000μF 25V C206 100nF SMD 3 C301 4.7nF Y2 1 R104 62Ω 0.5W 5 N.C. NTC101 5D−9 1 FSGM0465R 1 D201 MBR20150CT C106 220nF SMD C107 47μF 50V D202 FYPF2006DN 3 D102 UF 4004 2 4 L202 5μH 5V, 2A 7, 8 C207 100nF SMD C204 1000μF 16V C203 2200μF 10V 6, 9 5 ZD101 1N4749A LF101 15mH R201 330Ω R101 1.5MΩ 1W C101 220nF 275VAC R202 1.2k Ω IC301 FOD817B F101 FUSE 250V 3.15A IC201 KA431LZ R203 18k Ω C205 47nF R204 8k Ω R205 8k Ω Figure 24. Schematic of Demonstration Board Transformer 1 EER3019 10 N p /2 2 9 N p /2 3 8 Na 4 7 5 6 Barrier tape N 14V N 5V N p /2 2 1 Na 4 5 N 5V 7 6 N 14V 10 8 N 5V 8 9 N p /2 3 2 BOT Figure 25. Schematic of Transformer www.onsemi.com 12 TOP FSGM0465R Winding Specification Table 3. WINDING SPECIFICATION Barrier Tape BOT Ts Solenoid Winding 3.0 mm 1 5 Solenoid Winding 2.0 mm 1 3 Solenoid Winding 3.0 mm 1 6 Solenoid Winding 4.0 mm 1 22 Solenoid Winding 2.0 mm 1 Pin (S  F) Wire Turns Winding Method 3→2 0.3 φ x 1 23 Solenoid Winding 3 Np/2 TOP Insulation: Polyester Tape t = 0.025 mm, 2 Layers N5V 8→9 0.4 φ x 2 (TIW) Insulation: Polyester Tape t = 0.025 mm, 2 Layers N14V 10 → 8 0.4 φ x 2 (TIW) Insulation: Polyester Tape t = 0.025 mm, 2 Layers N5V 7→6 0.4 φ x 2 (TIW) Insulation: Polyester Tape t = 0.025 mm, 2 Layers Na 4→5 0.2 φ x 1 3.0 mm Insulation: Polyester Tape t = 0.025 mm, 2 Layers Np/2 2→1 0.3 φ x 1 Insulation: Polyester Tape t = 0.025 mm, 2 Layers Electrical Characteristics Table 4. ELECTRICAL CHARACTERISTICS Pin Specification Remark Inductance 1−3 830 μH ±7% 67 kHz, 1 V Leakage 1−3 15 mH Maximum Short All Other Pins Core & Bobbin • Core: EER3019 (Ae = 134.0 mm2) • Bobbin: EER3019 www.onsemi.com 13 FSGM0465R Bill of Materials Table 5. Bill of Materials Part # F101 Part # Value Note Note Capacitor Fuse C101 220 nF / 275 V Box (Pilkor) 250 V 3.15 A C102 150 nF / 275 V Box (Pilkor) C103 100 mF / 400 V Electrolytic (SamYoung) C104 3.3 nF / 630 V Film (Sehwa) C105 27 nF / 100 V Film (Sehwa) C106 220 nF SMD (2012) C107 47 mF / 50 V Electrolytic (SamYoung) NTC NTC101 Value 5D−9 DSC Resistor R101 1.5 MW, J 1W R102 75 kW, J 1/2 W R103 43 kW, J 1W R104 62 W, J 1/2 W C201 1000 mF / 25 V Electrolytic (SamYoung) R201 330 W, F 1/4 W, 1% C202 1000 mF / 25 V Electrolytic (SamYoung) R202 1.2 kW, F 1/4 W, 1% C203 2200 mF / 10 V Electrolytic (SamYoung) R203 18 kW, F 1/4 W, 1% C204 1000 mF / 16 V Electrolytic (SamYoung) R204 8 kW, F 1/4 W, 1% C205 47 nF / 100 V Film (Sehwa) R205 8 kW, F 1/4 W, 1% C206 100 nF SMD (2012) C207 100 nF SMD (2012) C301 4.7 nF / Y2 Y−cap (Samhwa) IC FSGM0465R FSGM0465R ON Semiconductor IC201 KA431LZ ON Semiconductor IC301 FOD817B ON Semiconductor Inductor LF101 15 mH Line filter 0.5Ø L201 5 mH 5A Rating L202 5 mH 5A Rating Diode D101 1N4007 Vishay D102 UF4004 Vishay ZD101 1N4749 Vishay D201 MBR20150CT ON Semiconductor D202 FYPF2006DN ON Semiconductor BD101 G2SBA60 Vishay Jumper J101 Transformer T101 830 mH SENSEFET is registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 14 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220−6LD LF CASE 340BG ISSUE A DOCUMENT NUMBER: DESCRIPTION: 98AON13840G TO−220−6LD LF DATE 01 SEP 2021 Electronic versions are uncontrolled except when accessed directly from the Document Repository. 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