FSL336LRN

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This literature is subject to all applicable copyright laws and is not for resale in any manner. FSL336LR Green Mode Fairchild Buck Switch Features Description    Built-in Avalanche-Rugged SenseFET: 650 V         No Need for Auxiliary Bias Winding  The FSL336LR integrated Pulse Width Modulator (PWM) and SenseFET is specifically designed for highperformance offline buck, buck-boost, and non-isolation flyback Switched Mode Power Supplies (SMPS) with minimal external components. This device integrates a high-voltage power regulator that enables operation without auxiliary bias winding. An internal transconductance amplifier reduces external components for the feedback compensation circuit. Fixed Operating Frequency: 50 kHz No-Load Power Consumption: 3 V (10) V ns 60 °C 40 ms 650 ms Transconductance Amplifier Section Gm Transconductance of Error Amplifier 380 480 580 µmho VREF Voltage Feedback Reference 2.45 2.50 2.55 V IEA.SR Output Sourcing Current VFB = VREF - 0.025 V -12 µA IEA.SK Output Sink Current VFB = VREF + 0.025 V 12 µA Continued on the following page… © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 www.fairchildsemi.com 5 FSL336LR — Green Mode Fairchild Buck Switch Electrical Characteristics TA = 25C unless otherwise specified. Symbol Parameter Conditions Min. Typ. Max. Unit 9 10 11 V High-Voltage Regulator Section VHVREG HV Regulator Voltage VCOMP = 0 V, VDRAIN = 40 V Total Device Section IOP1 Operating Supply Current (Control Part Only, without Switching) 0 V < VCOMP < VBURL 0.25 0.35 mA IOP2 Operating Supply Current (While Switching) VBURL < VCOMP < VOLP 0.8 1.3 mA ICH Startup Charging Current VCC = 0 V, VDRAIN > 40 V ISTART Startup Current VCC = Before VSTART, VCOMP = 0 V 120 VDRAIN Minimum Drain Supply Voltage VCC = VCOMP = 0 V, VDRAIN Increase 35 6 mA 155 µA V Note: 10. Though guaranteed by design; not 100% tested in production. © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 www.fairchildsemi.com 6 FSL336LR — Green Mode Fairchild Buck Switch Electrical Characteristics HV Regulator Voltage (VHVREG) 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Switching Frequency (fOSC) 1.15 1.00 0.95 0.90 1.00 0.95 0.90 0.85 0.85 -40 -20 0 25 50 75 100 125 -40 -20 Temperature (℃) 25 50 75 100 125 Temperature (℃) Figure 5. Operating Frequency vs. Temperature Figure 6. HV Regulator Voltage vs. Temperature Start Threshold Voltage (VSTART) Stop Threshold Voltage (VSTOP) 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized 0 1.00 0.95 0.90 1.00 0.95 0.90 0.85 0.85 -40 -20 0 25 50 75 100 125 -40 -20 Temperature (℃) 0 25 50 75 100 125 Temperature (℃) Figure 8. Stop Threshold Voltage vs. Temperature Burst Mode High Voltage (VBURH) Burst Mode Low Voltage (VBURL) 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Figure 7. Start Threshold Voltage vs. Temperature 1.00 0.95 0.90 1.00 0.95 0.90 0.85 0.85 -40 -20 0 25 50 75 100 125 -40 Temperature (℃) 0 25 50 75 100 125 Temperature (℃) Figure 9. Burst Mode High Voltage vs. Temperature © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 -20 Figure 10. Burst Mode Low Voltage vs. Temperature www.fairchildsemi.com 7 FSL336LR — Green Mode Fairchild Buck Switch Typical Performance Characteristics Feedback Voltage Reference (VREF) 1.15 1.10 1.10 1.05 1.05 Normalized Normalized Operating Supply Current (IOP1) 1.15 1.00 0.95 1.00 0.95 0.90 0.90 0.85 0.85 -40 -20 0 25 50 75 100 -40 125 -20 0 Temperature (℃) Figure 11. Operating Supply Current 1 vs. Temperature 75 100 125 FB Open Loop Protection (VFB_OLP) 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized 50 Figure 12. Feedback Voltage Reference vs. Temperature Transconductance of gm amp (Gm) 1.00 0.95 0.90 1.00 0.95 0.90 0.85 0.85 -40'C -20'C 0'C 25'C 50'C 75'C 100'C 120'C -40 -20 0 25 50 75 100 125 Temperature (℃) Temperature (℃) Figure 13. Transconductance of gm Amplifier vs. Temperature Figure 14. FB Open-Loop Protection Voltage vs. Temperature Overload Protection (VOLP) Over-Voltage Protection (VOVP) 1.15 1.15 1.10 1.10 1.05 1.05 Normalized Normalized 25 Temperature (℃) 1.00 0.95 1.00 0.95 0.90 0.90 0.85 0.85 -40 -20 0 25 50 75 100 -40 125 0 25 50 75 100 125 Temperature (℃) Temperature (℃) Figure 15. Overload Protection vs. Temperature © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 -20 Figure 16. Over-Voltage Protection vs. Temperature www.fairchildsemi.com 8 FSL336LR — Green Mode Fairchild Buck Switch Typical Performance Characteristics (Continued) 1. Startup and High-Voltage Regulator 3. Feedback Control During startup, an internal high-voltage current source (ICH) of the high-voltage regulator supplies the internal bias current (ISTART) and charges the external capacitor (CA) connected to the VCC pin, as illustrated in Figure 17. This internal high-voltage current source is enabled until VCC reaches 10 V. During steady-state operation, this internal high-voltage regulator (HVREG) maintains the VCC with 10 V and provides operating current (IOP) for all internal circuits. Therefore, no external bias circuit is necessary. The high-voltage regulator is disabled when the external bias is higher than 10 V. The FSL336LR employs current-mode control with a transconductance amplifier for feedback control, as shown in Figure 19. Two resistors are typically used on the VFB pin to sense output voltage. An external compensation circuit is recommended on the VCOMP pin to control output voltage. A built-in transconductance amplifier accurately controls output voltage without external components, such as Zener diode and transistor. Drain 6,7 VOUT VDC.link GreenMode Controller VBIAS Transconductance Amplifier VFB IPK 3R 4 Drain VREF OSC D1 D2 PWM LEB R Gate Driver 6, 7 VCC ICH VCOMP 10V HVREG 3 RSENSE 5 CC1 ISTART (during startup) Iop (during steady-state operation) CA VBIAS CC2 RC1 Figure 19. Pulse Width Modulation (PWM) Circuit UVLO 3.1 Transconductance Amplifier (gm Amplifier) The output of the transconductance amplifier sources and sinks the current, respectively, to and from the compensation circuit connected on the VCOMP pin (see Figure 20). This compensated VCOMP pin voltage controls the switching duty cycle by comparing with the voltage across the RSENSE. When the feedback pin voltage exceeds the internal reference voltage (VREF) of 2.5 V; the transconductance amplifier sinks the current from the compensation circuit, VCOMP is pulled down, and the duty cycle is reduced. This typically occurs when input voltage is increased or output load is decreased. A two-pole and one-zero compensation network is recommended for optimal output voltage control and AC dynamics. Typically 220 nF, 75 k, and 220 pF are used for CC1, RC1, and CC2; respectively. Figure 17. Startup and HVREG Block 2. Oscillator Block The oscillator frequency is set internally with a random frequency fluctuation function. Fluctuation of the switching frequency can reduce Electro-Magnetic Induction (EMI) by spreading the energy over a wider frequency range than the bandwidth measured by the EMI test equipment. The amount of EMI reduction is directly related to the range of the frequency variation. The range of frequency variation is fixed internally; however, its selection is randomly chosen by the combination of an external feedback voltage and an internal free-running oscillator. This randomly chosen switching frequency effectively spreads the EMI noise near switching frequency and allows the use of a costeffective inductor instead of an AC input line filter to satisfy world-wide EMI requirements. IEA [A] Sinking current 12µA at 2.525V +24µA IDS several mseconds -24µA tSW=1/fSW Sourcing current 12µA at 2.475V tSW Dt fSW t Gm [µmho] 960µmho MAX fSW+1/2DfSW 480µmho no repetition several miliseconds MAX fSW 1/2DfSW - VFB 2.45V VREF (2.5V) 2.55V VFB Figure 20. Characteristics of gm Amplifier t Figure 18. Frequency Fluctuation Waveform © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 www.fairchildsemi.com 9 FSL336LR — Green Mode Fairchild Buck Switch Functional Description OSC 3R 3.3 Leading Edge Blanking (LEB) At the instant the internal SenseFET is turned on, a high-current spike through the SenseFET is typically caused by: primary-side capacitance and secondaryside rectifier diode reverse recovery of flyback application, the freewheeling diode reverse recovery, and other parasitic capacitance of buck application. Excessive voltage across the sensing resistor (RSENSE) leads to incorrect feedback operation in the currentmode control. To counter this effect, the FSL336LR has a Leading-Edge Blanking (LEB) circuit (see Figure 19). This circuit inhibits the PWM comparator for a short time (tLEB) after the SenseFET is turned on. OLP PWM LEB R S Q R Q Gate Driver VCOMP 5 RSENSE 40ms Delay OLP VOLP Figure 21. Overload Protection Internal Circuit VCC HVREG VSTART VSTOP 20ms IDS 40ms 650ms SS 40ms 650ms Normal with SS 4. Protection Circuits The protective functions include Overload Protection (OLP), Over-Voltage Protection (OVP), Under-Voltage Lockout (UVLO), Feedback Open-Loop Protection (FB_OLP), and Thermal Shutdown (TSD). All of the protections operate in Auto-Restart Mode. Since these protection circuits are fully integrated within the IC without external components, reliability is improved without increasing cost or PCB space. If a fault condition occurs, switching is terminated and the SenseFET remains off. At the same time, internal protection timing control is activated to decrease power consumption and stress on passive and active components during AutoRestart Mode. When internal protection timing control is activated, VCC is regulated with 10 V through the internal high-voltage regulator until switching is terminated. This internal protection timing control continues until the restart time (650 ms) expires. After 650 ms, the internal high-voltage regulator is disabled and VCC is decreased. When VCC reaches the UVLO stop voltage VSTOP (7 V), the protection is reset and the internal high-voltage current source charges the VCC capacitor via the drain pin again. When VCC reaches the UVLO start voltage, VSTART (8 V), normal operation resumes. In this manner, Auto-Restart Mode can alternately enable and disable the switching of the power SenseFET until the fault condition is eliminated. Power on Overloading Stops Overloading Stops Figure 22. Overload Protection (OLP) Waveform 4.2 Thermal Shutdown (TSD) The SenseFET and control IC integrated on the same package makes it easier to detect the temperature of the SenseFET. When the junction temperature exceeds 135°C, thermal shutdown is activated. The FSL336LR is restarted after the temperature decreases to 60°C. 4.3 Over-Voltage Protection (OVP) If any feedback loop components fail due to a soldering defect, VCOMP climbs up in manner similar to the overload situation, forcing the preset maximum current to be supplied to the SMPS until the OLP is triggered. In this case, excessive energy is provided to the output and the output voltage may exceed the rated voltage before the OLP is activated. To prevent this situation, an Over-Voltage Protection (OVP) circuit is employed. In general, output voltage can be monitored through VCC and, when VCC exceeds 24.5 V, OVP is triggered, resulting in termination of switching operation. To avoid undesired activation of OVP during normal operation, VCC should be designed below 24.5 V (see Figure 23). OSC 4.1 Overload Protection (OLP) Overload is defined as the load current exceeding a preset level due to an unexpected event. In this situation, the protection circuit should be activated to protect the SMPS. However, when the SMPS operates normally, the OLP circuit can be enabled during load transition or startup. To avoid this undesired operation, an internal fixed delay (40 ms) circuit determines whether it is a transient situation or a true overload situation (see Figure 21). The current-mode feedback path limits the maximum power current and, when the output © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 Overloading Overloading 3R PWM LEB R 2 VCC OVP S Q R Q Gate driver RSENSE OVP VOVP Figure 23. Over-Voltage Protection Circuit www.fairchildsemi.com 10 FSL336LR — Green Mode Fairchild Buck Switch consumes more than this maximum power, the output voltage (VO) decreases below its rated voltage. This reduces feedback pin voltage, which increases the output current of the internal transconductance amplifier. Eventually VCOMP is increased. When VCOMP reaches 3 V, the internal fixed OLP delay (40 ms) is activated. After this delay, the switching operation is terminated, as shown in Figure 22. 3.2 Pulse-by-Pulse Current Limit Because current-mode control is employed, the peak current flowing through the SenseFET is limited by the inverting input of PWM comparator, as shown in Figure 19. Assuming that 50 µA current source flows only through the internal resistors (3R + R = 46 kΩ), the cathode voltage of diode D2 is about 2.4 V. Since D1 is blocked when VCOMP exceeds 2.4 V, the maximum voltage of the cathode of D2 is clamped at this voltage. Therefore, the peak value of the current of the SenseFET is limited. Voset VCOMP VBURH VBURL IDS VDS OSC 3R VOUT PWM R RH LEB FB_OLP S Q R Q Gate Driver time t1 VFB FB_OLP RL t2 t3 Switching disabled t4 Figure 26. Burst Mode Operation RSENSE 4 Switching disabled 7. Green Mode Operation VFB_OLP As output load condition is reduced, the switching loss becomes the largest power loss factor. FSL306LR uses the VCOMP pin voltage to monitor output load condition. As output load decreases, VCOMP decreases and switching frequency declines, as shown in Figure 27. Once VCOMP falls to 0.8 V, the switching frequency varies between 21 kHz and 23 kHz before Burst Mode operation. At Burst Mode operation, random frequency fluctuation still functions. Figure 24. Feedback Open-Loop Protection Circuit 5. Soft-Start The internal soft-start circuit slowly increases the SenseFET current after it starts. The typical soft-start time is 10 ms, as shown in Figure 25, where progressive increments of the SenseFET current are allowed during startup. The pulse width to the power switching device is progressively increased to establish the correct working conditions for transformers, inductors, and capacitors. The voltage on the output capacitors is gradually increased to smoothly establish the required output voltage. Soft-start also helps to prevent transformer saturation and reduces stress on the secondary diode. Random Frequency modulation range Switching frequency 53 kHz 47 kHz 1.25ms ILIM 23 kHz 21 kHz 1.9V VBURL VBURH 0.8V Soft-start envelope VCOMP Figure 27. Green Mode Operation 8. Adjusting Current Limit As shown in Figure 28, a combined 46 kΩ internal resistance (3R + R) is connected to the inverting lead on the PWM comparator. An external resistance of Rx on the ILIMIT pin forms a parallel resistance with the 46 kΩ when the internal diodes are biased by the main current source of 50 µA. For example, FSL336LR has a typical SenseFET peak current limit of 1.8 A. Current limit can be adjusted to 1.2 A by inserting RX between the ILIMIT pin and the ground. The value of the RX can be estimated by the following equation: 1.8 A : 1.2 A = (46 kΩ + RX) : RX (1) 0.2ILIM Drain Current 8-Steps Figure 25. Internal Soft-Start t 6. Burst Mode Operation To minimize power dissipation in Standby Mode, the FSL336LR enters Burst Mode. As the load decreases, the COMP pin voltage (VCOMP) decreases. As shown in Figure 26, the device automatically enters Burst Mode when the feedback voltage drops below VBURL. At this point, switching stops and the output voltages start to drop at a rate dependent on the standby current load. This causes VCOMP to rise. Once it passes VBURH, switching resumes. VCOMP then falls and the process repeats. Burst Mode alternately enables and disables switching of the SenseFET and reduces switching loss in Standby Mode. VFB Transconductance Amplifier 4 VBIAS VREF VCOMP IPK 3R 5 PWM R ILIMIT 3 VSENSE RX Figure 28. Current Limit Adjustment © 2013 Fairchild Semiconductor Corporation FSL336LR • Rev.1.1 www.fairchildsemi.com 11 FSL336LR — Green Mode Fairchild Buck Switch VO 4.4 Feedback Open Loop Protection (FB_OLP) In the event of a feedback loop failure, especially a shorted lower-side resistor of the feedback pin; not only does VCOMP rise in a similar manner to the overload situation, but VFB starts to drop to IC ground level. Although OLP and OVP also can protect the SMPS in this situation, FB_OLP can reduce stress on SenseFET. If there is no FB_OLP, output voltage is much higher than the rated voltage before OLP or OVP triggers. When VFB drops below 0.5 V, FB_OLP is activated, switching off. To avoid undesired activation during startup, this function is disabled during soft-start time. 7 10.00 9.10 0.56 0.36 5 A 7.62 2.54 B 6.60 9.90 6.20 9.30 1 0.56 6.70 4 1.09 0.94 0.10 M C B A 1.62 1.47 0.56 0.36 0.10 M C B A 10.70 0.10 MIN LAND PATTERN RECOMMENDATION 7.62 A 3.70 MAX C 0.10 C 2.54 7.62 FRONT VIEW 9° 0.25 SEATING PLANE 1.252 1.784 TOP VIEW 3.60 3.20 2.00 3° DETAIL A SCALE 2:1 0.35 0.20 SIDE VIEW NOTES: UNLESS OTHERWISE SPECIFIED A. NO INDUSTRY STANDARD APPLIES TO THIS PACKAGE R0.20 B. ALL DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS ARE EXCLUSIVE OF BURRS, R0.20 MOLD FLASH, AND TIE BAR EXTRUSIONS D. DIMENSIONS AND TOLERANCES PER GAGE PLANE ASME Y14.5M-2009 8° E. DRAWING FILENAME: MKT-MLSOP07Arev2 0° 1.12 0.72 1.60 REF 9.779 9.525 A 7 5 B 6.477 6.223 PIN #1 4 1 (0.787) TOP VIEW 12° 2.54 12° 3.937 3.683 3.429 3.175 0.508 MIN SEATING PLANE 7.874 7.620 3.556 3.048 1.651 1.397 0.381 0.203 C 7.53 0.508 0.406 0.10 M C FRONT VIEW NOTES: A. REFERENCE JEDEC MS-001, VARIATION BA EXCEPT FOR NUMBER OF LEADS. B. DIMENSIONS ARE IN MILLIMETERS C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009 D. DIMENSIONS ARE EXCLUSIVE OF BURRS, MOLD FLASH AND TIE BAR EXTRUSIONS. E. DRAWING FILENAME: MKT-NA07Drev2 9.398 7.874 SIDE VIEW ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. 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