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Features
Description
! Optimized for Quasi-Resonant Converters (QRC)
A Quasi-Resonant Converter (QRC) generally shows
lower EMI and higher power conversion efficiency than a
conventional hard-switched converter with a fixed
switching frequency. The FSQ-series is an integrated
Pulse-Width Modulation (PWM) controller and
SenseFET specifically designed for quasi-resonant
operation and Alternating Valley Switching (AVS). The
PWM controller includes an integrated fixed-frequency
oscillator, Under-Voltage Lockout (UVLO), LeadingEdge Blanking (LEB), optimized gate driver, internal softstart, temperature-compensated precise current sources
for a loop compensation, and self-protection circuitry.
Compared with a discrete MOSFET and PWM controller
solution, the FSQ-series can reduce total cost,
component count, size, and weight; while simultaneously
increasing efficiency, productivity, and system reliability.
This device provides a basic platform for cost-effective
designs of quasi-resonant switching flyback converters.
! Low EMI through Variable Frequency Control and AVS
(Alternating Valley Switching)
! High-Efficiency through Minimum Voltage Switching
! Narrow Frequency Variation Range over Wide Load
and Input Voltage Variation
! Advanced Burst-Mode Operation for Low Standby
Power Consumption
! Simple Scheme for Sync Voltage Detection
! Pulse-by-Pulse Current Limit
! Various Protection Functions: Overload Protection
!
!
!
!
(OLP), Over-Voltage Protection (OVP), Internal
Thermal Shutdown (TSD) with Hysteresis,
Output Short Protection (OSP)
Under-Voltage Lockout (UVLO) with Hysteresis
Internal Startup Circuit
Internal High-Voltage Sense FET (650V)
Built-in Soft-Start (17.5ms)
Applications
! Power Supply for LCD TV and Monitor, VCR, SVR,
STB, and DVD & DVD Recorder
! Adapter
© 2008 Semiconductor Components Industries, LLC.
October-2017, Rev. 3
Publication Order Number:
FSQ0565RS/D
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
FSQ0565RS/RQ
Green-Mode Power Switch
for Quasi-Resonant Operation - Low EMI and High Efficiency
Maximum Output Power(1)
Product
Number
PKG.(5)
FSQ0565RSWDTU
TO-220F6L
FSQ0565RQWDTU
Operating
Temp.
-25 to +85°C
FSQ0565RSLDTU
TO-220F6L
-25 to +85°C
FSQ0565RQLDTU (L-Forming)
Current RDS(ON)
Max.
Limit
2.25A
3.0A
230VAC±15%(2)
85-265VAC
Adapter(3)
Adapter(3)
Open
Frame(4)
2.2Ω
70W
80W
41W
60W
FSCM0565R
FSDM0565RE
2.2Ω
70W
80W
41W
60W
FSCM0565R
FSDM0565RE
2.25A
3.0A
Replaces
Devices
Open
Frame(4)
Notes:
1. The junction temperature can limit the maximum output power.
2. 230VAC or 100/115VAC with doubler.
3. Typical continuous power in a non-ventilated enclosed adapter measured at 50°C ambient temperature.
4. Maximum practical continuous power in an open-frame design at 50°C ambient.
5. Eco Status, RoHS
Application Diagram
VO
AC
IN
VSTR
Drain
PWM
Sync
GND
VFB
VCC
FSQ0565RS Rev. 00
Figure 1. Typical Flyback Application
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2
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Ordering Information
Sync
5
AVS
VCC
FB
4
VCC
Drain
6
3
1
OSC
Vref
0.35/0.55
VBurst
Vref
Idelay
Vstr
VCC good
8V/12V
IFB
PWM
3R
R
S Q
SoftStart
LEB
250ns
Gate
driver
R Q
tON < tOSP
after SS
LPF
VOSP
AOCP
VSD
S
TSD
VCC
2
Q
VOCP
(1.1V)
GND
R Q
LPF
VOVP
VCC good
FSQ0565RS Rev.00
Figure 2. Internal Block Diagram of FSQ0565RS
Sync
5
AVS
VCC
Idelay
FB
4
VCC
Drain
6
3
1
OSC
Vref
0.35/0.55
VBurst
Vref
Vstr
VCC good
8V/12V
IFB
PWM
3R
R
S Q
SoftStart
LEB
250ns
Gate
driver
R Q
tON < tOSP
after SS
VOSP
LPF
AOCP
VSD
S
TSD
Q
2
VOCP
(1.1V)
R Q
LPF
VOVP
VCC good
FSQ0565RQ Rev.00
Figure 3. Internal Block Diagram of FSQ0565RQ
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3
GND
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Block Diagrams
6. VSTR
5. Sync
4. FB
3. VCC
2. GND
1. Drain
FSQ0565 Rev.00
Figure 4. Pin Configuration (Top View)
Pin Definitions
Pin #
Name
1
Drain
SenseFET Drain. High-voltage power SenseFET drain connection.
2
GND
Ground. This pin is the control ground and the SenseFET source.
3
VCC
Power Supply. This pin is the positive supply input, providing internal operating current for
both startup and steady-state operation.
4
FB
Feedback. This pin is internally connected to the inverting input of the PWM comparator. The
collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should
be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload
protection triggers, which shuts down the power switch.
5
Sync
Sync. This pin is internally connected to the sync-detect comparator for quasi-resonant switching. In normal quasi-resonant operation, the threshold of the sync comparator is 1.2V/1.0V.
Vstr
Startup. This pin is connected directly, or through a resistor, to the high-voltage DC link. At
startup, the internal high-voltage current source supplies internal bias and charges the external capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is
disabled. It is not recommended to connect Vstr and Drain together.
6
Description
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4
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Pin Configuration
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The
absolute maximum ratings are stress ratings only. TA = 25°C, unless otherwise specified.
Symbol
Parameter
Min.
Max.
Unit
Vstr
Vstr Pin Voltage
500
V
VDS
Drain Pin Voltage
650
V
VCC
Supply Voltage
VFB
Feedback Voltage Range
Sync Pin Voltage
VSync
IDM
ID
20
V
-0.3
13.0
V
-0.3
13.0
V
11
A
Drain Current Pulsed
Continuous Drain Current(6)
TC = 25°C
2.8
TC = 100°C
1.7
A
EAS
Single Pulsed Avalanche Energy(7)
190
mJ
PD
Total Power Dissipation (TC=25°C)
45
W
TJ
Operating Junction Temperature
Internally limited
°C
TA
Operating Ambient Temperature
-25
+85
°C
Storage Temperature
-55
+150
°C
TSTG
ESD
Electrostatic Discharge Capability, Human Body Model
2.0
Electrostatic Discharge Capability, Charged Device Model
2.0
kV
Notes:
6. Repetitive rating: pulse-width limited by maximum junction temperature.
7. L=14mH, starting TJ=25°C.
Thermal Impedance
TA = 25°C unless otherwise specified.
Symbol
θJA
θJC
Parameter
Junction-to-Ambient Thermal
Junction-to-Case Thermal
Package
Resistance(8)
Resistance(9)
Notes:
8. Free standing with no heat-sink under natural convection.
9. Infinite cooling condition - refer to the SEMI G30-88.
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5
TO-220F-6L
Value
Unit
50
°C/W
2.8
°C/W
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Absolute Maximum Ratings
TA = 25°C unless otherwise specified.
Symbol
Parameter
Condition
Min. Typ. Max. Unit
SENSEFET SECTION
BVDSS
Drain Source Breakdown Voltage
VCC = 0V, ID = 100µA
IDSS
Zero-Gate-Voltage Drain Current
VDS = 560V
Drain-Source On-State Resistance
TJ = 25°C, ID = 0.5A
COSS
Output Capacitance
VGS = 0V, VDS = 25V, f = 1MHz
78
pF
td(on)
Turn-On Delay Time
VDD = 350V, ID = 25mA
22
ns
Rise Time
VDD = 350V, ID = 25mA
52
ns
Turn-Off Delay Time
VDD = 350V, ID = 25mA
95
ns
Fall Time
VDD = 350V, ID = 25mA
50
ns
RDS(ON)
tr
td(off)
tf
650
V
1.76
300
µA
2.20
Ω
CONTROL SECTION
Maximum On Time
TJ = 25°C
8.8
10.0
11.2
µs
tB
Blanking Time
TJ = 25°C, Vsync = 5V
13.5
15.0
16.5
µs
tW
Detection Time Window
TJ = 25°C, Vsync = 0V
fS
Initial Switching Frequency
tON.MAX
ΔfS
tAVS
Switching Frequency Variation(11)
On Time
6.0
59.6
66.7
75.8
kHz
-25°C < TJ < 85°C
±5
±10
%
at VIN = 240VDC, Lm = 360μH
(AVS triggered when VAVS > spec.
and tAVS < spec.)
4.0
µs
1.2
V
VAVS
AVS Triggering
Threshold(11)
tSW
Switching Time Variance by AVS(11)
Sync = 500kHz sine input
VFB = 1.2V, tON = 4.0µs
13.5
IFB
Feedback Source Current
VFB = 0V
700
Minimum Duty Cycle
VFB = 0V
DMIN
VSTART
VSTOP
tS/S
VOVP
VOVP
tOVP
Feedback
Voltage
UVLO Threshold Voltage
After turn-on
Internal Soft-Start Time
Over-Voltage Protection (FSQ0565RS)
Over-Voltage Protection
(FSQ0565RQ)
20.5
µs
900
1100
µA
0
%
11
12
13
V
7
8
9
V
With free-running frequency
Threshold
Voltage
µs
VCC = 15V, VFB = 2V
Blanking
Time(11)
17.5
ms
18
19
20
V
7.4
8
9.6
V
1.0
1.7
2.4
0.45
0.55
0.65
V
0.25
0.35
0.45
V
µs
BURST-MODE SECTION
VBURH
VBURL
Burst-Mode Voltages
TJ = 25°C, tPD =
Hysteresis
200ns(10)
200
mV
Continued on the following page...
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6
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Electrical Characteristics
TA = 25°C unless otherwise specified.
Symbol
Parameter
Condition
Min. Typ. Max. Unit
PROTECTION SECTION
ILIMIT
FSQ0565RS
TJ = 25°C, di/dt = 370mA/µs
2.00
2.25
2.50
A
FSQ0565RQ
TJ = 25°C, di/dt = 370mA/µs
2.64
3.0
3.36
A
Shutdown Feedback Voltage
VCC = 15V
5.5
6.0
6.5
V
Shutdown Delay Current
VFB = 5V
4
5
6
µA
1.4
µs
ILIMIT
Peak Current
Limit
VSD
IDELAY
tLEB
Leading-Edge Blanking
Hys
1.2
ns
TJ = 25°C
OSP triggered when tON < tOSP,
VFB > VOSP and lasts longer than
t
Feedback Blanking Time OSP_FB
2.0
2.5
3.0
Shutdown Temperature
125
140
155
Output Short Threshold Feedback
Protection(11) Voltage
tOSP_FB
TSD
250
Threshold Time
tOSP
VOSP
Time(11)
Thermal
Shutdown(11) Hysteresis
1.8
2.0
V
60
µs
°C
SYNC SECTION
VSH1
VSL1
tsync
VSH2
VSL2
VCLAMP
Sync Threshold Voltage 1
VCC = 15V, VFB = 2V
1.0
1.2
1.4
0.8
1.0
1.2
Sync Delay Time(11, 12)
230
Sync Threshold Voltage 2
VCC = 15V, VFB = 2V
Low Clamp Voltage
ISYNC_MAX = 800µA,
ISYNC_MIN = 50µA
V
ns
4.3
4.7
5.1
4.0
4.4
4.8
0.0
0.4
0.8
V
V
TOTAL DEVICE SECTION
IOP
ISTART
ICH
VSTR
Operating Supply Current
VCC = 13V
1
3
5
mA
Start Current
VCC = 10V
(before VCC reaches VSTART)
350
450
550
µA
Startup Charging Current
VCC = 0V, VSTR = minimum 50V
0.65
0.85
1.00
mA
Minimum VSTR Supply Voltage
26
Notes:
10. Propagation delay in the control IC.
11. Guaranteed by design; not tested in production.
12. Includes gate turn-on time.
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7
V
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Electrical Characteristics (Continued)
Function
Operation Method
EMI Reduction
FSDM0x65RE
Constant
Frequency PWM
Quasi-Resonant
Operation
Frequency
Modulation
Reduced
EMI Noise
FSQ-Series Advantages
! Improved efficiency by valley switching
! Reduced EMI noise
! Reduced components to detect valley point
! Valley Switching
! Inherent Frequency Modulation
! Alternate Valley Switching
CCM or AVS
Based on Load ! Improves efficiency by introducing hybrid control
and Input Condition
Hybrid Control
Burst-Mode
Operation
FSQ-Series
Burst-Mode
Operation
Advanced
Burst-Mode
Operation
! Improved standby power by advanced burst-mode
Strong Protections
OLP, OVP
OLP, OVP, OSP
! Improved reliability through precise OSP
TSD
145°C without
Hysteresis
140°C with 60°C
Hysteresis
! Stable and reliable TSD operation
! Converter temperature range
Differences Between FSQ0565RS and FSQ0565RQ
Function
FSQ0565RS
FSQ0565RQ
Remark
! Lower current peak is suitable to reduce conduc-
ILIM
2.25A
3.0A
tion loss
! Higher current peak is suitable for handling higher
power
Over Voltage
Protection
VCC OVP
(triggered by VCC
voltage)
Sync OVP
! Sync OVP is suitable when VCC voltage is pre regulated.
(triggered by Sync
voltage)
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8
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Comparison Between FSDM0x65RNB and FSQ-Series
1.2
Normalized
Normalized
These characteristic graphs are normalized at TA= 25°C.
1.0
0.8
1.2
1.0
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0.0
-25
0
25
50
75
100
0.0
-25
125
0
Temperature [°C]
1.2
1.0
0.8
0.4
0.2
0.2
75
100
0.0
-25
125
0
Normalized
Normalized
1.2
1.0
0.8
100
125
1.0
0.8
0.6
0.4
0.4
0.2
0.2
50
75
1.2
0.6
25
50
Figure 8. Startup Charging Current (ICH) vs. TA
Figure 7. UVLO Stop Threshold Voltage
(VSTOP) vs. TA
0
25
Temperature [°C]
Temperature [°C]
0.0
-25
125
0.8
0.4
50
100
1.0
0.6
25
75
1.2
0.6
0
50
Figure 6. UVLO Start Threshold Voltage
(VSTART) vs. TA
Normalized
Normalized
Figure 5. Operating Supply Current (IOP) vs. TA
0.0
-25
25
Temperature [°C]
75
100
125
0.0
-25
Figure 9. Initial Switching Frequency (fS) vs. TA
0
25
50
75
100
125
Temperature [°C]
Temperature [°C]
Figure 10. Maximum On Time (tON.MAX) vs. TA
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9
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Typical Performance Characteristics
1.2
Normalized
Normalized
These characteristic graphs are normalized at TA= 25°C.
1.0
0.8
1.2
1.0
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0.0
-25
0
25
50
75
100
0.0
-25
125
0
1.2
1.0
0.8
0.4
0.2
0.2
75
100
0.0
-25
125
0
1.2
1.0
0.8
100
125
1.0
0.8
0.6
0.4
0.4
0.2
0.2
50
75
1.2
0.6
25
50
Figure 14. Burst-Mode High Threshold Voltage
(Vburh) vs. TA
Normalized
Normalized
Figure 13. Shutdown Delay Current (IDELAY) vs. TA
0
25
Temperature [°C]
Temperature [°C]
0.0
-25
125
0.8
0.4
50
100
1.0
0.6
25
75
1.2
0.6
0
50
Figure 12. Feedback Source Current (IFB) vs. TA
Normalized
Normalized
Figure 11. Blanking Time (tB) vs. TA
0.0
-25
25
Temperature [°C]
Temperature [°C]
75
100
125
Temperature [°C]
Figure 15. Burst-Mode Low Threshold Voltage
(Vburl) vs. TA
0.0
-25
0
25
50
75
100
125
Temperature [°C]
Figure 16. Peak Current Limit (ILIM) vs. TA
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10
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Typical Performance Characteristics (Continued)
1.2
Normalized
Normalized
These characteristic graphs are normalized at TA= 25°C.
1.0
0.8
1.2
1.0
0.8
0.6
0.6
0.4
0.4
0.2
0.2
0.0
-25
0
25
50
75
100
0.0
-25
125
0
1.2
1.0
0.8
0.4
0.2
0.2
75
100
0.0
-25
125
0
1.2
1.0
0.8
100
125
1.0
0.8
0.6
0.4
0.4
0.2
0.2
50
75
1.2
0.6
25
50
Figure 20. Over-Voltage Protection (VOV) vs. TA
Normalized
Normalized
Figure 19. Shutdown Feedback Voltage (VSD) vs. TA
0
25
Temperature [°C]
Temperature [°C]
0.0
-25
125
0.8
0.4
50
100
1.0
0.6
25
75
1.2
0.6
0
50
Figure 18. Sync Low Threshold Voltage 1
(VSL1) vs. TA
Normalized
Normalized
Figure 17. Sync High Threshold Voltage 1
(VSH1) vs. TA
0.0
-25
25
Temperature [°C]
Temperature [°C]
75
100
Temperature [°C]
Figure 21. Sync High Threshold Voltage 2
(VSH2) vs. TA
125
0.0
-25
0
25
50
75
100
125
Temperature [°C]
Figure 22. Sync Low Threshold Voltage 2
(VSL2) vs. TA
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11
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Typical Performance Characteristics (Continued)
1. Startup: At startup, an internal high-voltage current
source supplies the internal bias and charges the
external capacitor (Ca) connected to the VCC pin, as
illustrated in Figure 23. When VCC reaches 12V, the
power switch begins switching and the internal
high-voltage current source is disabled. The power
switch continues its normal switching operation and
the power is supplied from the auxiliary transformer
winding unless VCC goes below the stop voltage of 8V.
2.1 Pulse-by-Pulse Current Limit: Because currentmode control is employed, the peak current through the
SenseFET is limited by the inverting input of PWM
comparator (VFB*), as shown in Figure 24. Assuming
that the 0.9mA current source flows only through the
internal resistor (3R + R = 2.8k), the cathode voltage of
diode D2 is about 2.5V. Since D1 is blocked when the
feedback voltage (VFB) exceeds 2.5V, the maximum
voltage of the cathode of D2 is clamped at this voltage,
clamping VFB*. Therefore, the peak value of the current
through the SenseFET is limited.
VDC
2.2 Leading-Edge Blanking (LEB): At the instant the
internal SenseFET is turned on, a high-current spike
usually occurs through the SenseFET, caused by
primary-side capacitance and secondary-side rectifier
reverse recovery. Excessive voltage across the Rsense
resistor would lead to incorrect feedback operation in the
current-mode PWM control. To counter this effect, the
power switch employs a leading-edge blanking (LEB)
circuit. This circuit inhibits the PWM comparator for a
short time (tLEB) after the SenseFET is turned on.
CVCC
VCC
3
VSTR
6
Istart
VREF
8V/12V
Vcc good
Internal
Bias
FSQ0565 Rev.00
Figure 23. Startup Circuit
2.Feedback Control: power switch employs current-mode
control, as shown in Figure 24. An opto-coupler (such as
the FOD817A) and shunt regulator (such as the KA431)
are typically used to implement the feedback network.
Comparing the feedback voltage with the voltage across
the Rsense resistor makes it possible to control the
switching duty cycle. When the reference pin voltage of
the shunt regulator exceeds the internal reference
voltage of 2.5V, the opto-coupler LED current increases,
pulling down the feedback voltage and reducing the duty
cycle. This typically happens when the input voltage is
increased or the output load is decreased.
VCC
VFB
D2
+
VFB*
KA431
VRO
V DC
TF
Vsync
V ovp (8V)
1.2V
1.0V
SenseFET
OSC
D1
CB
V RO
IFB
4
H11A817A
Vds
VREF
Idelay
VO
3. Synchronization: The FSQ-series employs a quasiresonant switching technique to minimize the switching
noise and loss. The basic waveforms of the quasiresonant converter are shown in Figure 25. To minimize
the MOSFET's switching loss, the MOSFET should be
turned on when the drain voltage reaches its minimum
value, which is indirectly detected by monitoring the VCC
winding voltage, as shown in Figure 25.
230ns Delay
3R
Gate
driver
R
MOSFET Gate
-
ON
VSD
OLP
Rsense
FSQ0565 Rev.00
ON
FSQ0565 Rev.00
Figure 25. Quasi-Resonant Switching Waveforms
Figure 24. Pulse-Width-Modulation (PWM) Circuit
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12
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Functional Description
ID S
I DS
V DS
ingnore
4.4V
V sync
1.2V
1.0V
FS Q 0565 R ev.00
tX
t B =15µs
tX
t B =15us
internal delay
Figure 28. After Vsync Finds First Valley
I DS
I DS
V DS
4.4V
V sync
1.2V
1.0V
FSQ 0565 Rev.00
internal delay
Figure 26. Vsync > 4.4V at tX
tX
tB=15us
IDS
IDS
4. Protection Circuits: The FSQ-series has several
self-protective functions, such as Overload Protection
(OLP), Over-Voltage Protection (OVP), and Thermal
Shutdown (TSD). All the protections are implemented as
auto-restart mode. Once the fault condition is detected,
switching is terminated and the SenseFET remains off.
This causes VCC to fall. When VCC falls down to the
Under-Voltage Lockout (UVLO) stop voltage of 8V, the
protection is reset and the startup circuit charges the
VCC capacitor. When the VCC reaches the start voltage
of 12V, normal operation resumes. If the fault condition is
not removed, the SenseFET remains off and VCC drops
to stop voltage again. In this manner, the auto-restart can
alternately enable and disable the switching of the power
SenseFET until the fault condition is eliminated.
Because these protection circuits are fully integrated into
the IC without external components, reliability is
improved without increasing cost.
V DS
Power
on
Fault
occurs
Fault
rem oved
VDS
V CC
4.4V
Vsync
1.2V
1.0V
12V
8V
FSQ0565 Rev.00
t
internal delay
Figure 27. Vsync < 4.4V at tX
FSQ0565 Rev.00
Norm al
operation
Fault
situation
Norm al
operation
Figure 29. Auto Restart Protection Waveforms
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13
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
The switching frequency is the combination of blank time
(tB) and detection time window (tW). In case of a heavy
load, the sync voltage remains flat after tB and waits for
valley detection during tW. This leads to a low switching
frequency not suitable for heavy loads. To correct this
drawback, additional timing is used. The timing
conditions are described in Figures 26, 27, and 28. When
the Vsync remains flat higher than 4.4V at the end of tB,
which is instant tX, the next switching cycle starts after
internal delay time from tX. In the second case, the next
switching occurs on the valley when the Vsync goes below
4.4V within tB. Once Vsync detects the first valley in tB, the
other switching cycle follows classical QRC operation.
3R
OSC
PWM
LEB
250ns
Q
Gate
driver
R sense
+
AOCP
-
FSQ0765R Rev.00
2
GND
VOCP
Figure 31. Abnormal Over-Current Protection
4.3 Output-Short Protection (OSP): If the output is
shorted, steep current with extremely high di/dt can flow
through the SenseFET during the LEB time. Such a
steep current brings high voltage stress on the drain of
SenseFET when turned off. To protect the device from
such an abnormal condition, OSP is included in the FSQseries. It is comprised of detecting VFB and SenseFET
turn-on time. When the VFB is higher than 2V and the
SenseFET turn-on time is lower than 1.2µs, the power
switch recognizes this condition as an abnormal error and
shuts down PWM switching until VCC reaches Vstart again.
An abnormal condition output short is shown in Figure 32.
Rectifier
Diode
Current
MOSFET
Drain
Current
O ve rlo a d p ro te c tio n
6 .0 V
Q
R
R
F S Q 0 5 6 5 R e v .0 0
V FB
S
Turn-off delay
ILIM
VFB
0
2 .5 V
Minimum turn-on time
Vo
D
1.2µs
output short occurs
t 1 2 = C fb *(6 .0 -2 .5 )/I d e la y
0
T1
T2
t
Io
Figure 30. Overload Protection
FSQ0565 Rev. 00
0
4.2 Abnormal Over-Current Protection (AOCP): When
the secondary rectifier diodes or the transformer pins are
shorted, a steep current with extremely high di/dt can
flow through the SenseFET during the LEB time. Even
though the FSQ-series has overload protection, it is not
enough to protect the FSQ-series in that abnormal case,
since severe current stress is imposed on the SenseFET
until OLP triggers. The FSQ-series has an internal
AOCP circuit, shown in Figure 31. When the gate turnon signal is applied to the power SenseFET, the AOCP
block is enabled and monitors the current through the
sensing resistor. The voltage across the resistor is
compared with a preset AOCP level. If the sensing
resistor voltage is greater than the AOCP level, the set
signal is applied to the latch, resulting in the shutdown of
the SMPS.
Figure 32. Output Short Waveforms
4.4.1 VCC Over-Voltage Protection (OVP) of
FSQ0565RS: If the secondary-side feedback circuit
malfunctions or a solder defect causes an opening in the
feedback path, the current through the opto-coupler
transistor becomes almost zero. In this case, Vfb climbs
up in a similar manner to the overload situation, forcing
the preset maximum current to be supplied to the SMPS
until overload protection is activated. Because more
energy than required is provided to the output, the output
voltage may exceed the rated voltage before overload
protection is activated, resulting in the breakdown of the
devices in the secondary side. To prevent this situation,
an over-voltage protection (OVP) circuit is employed. In
general, VCC is proportional to the output voltage and the
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14
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
4.1 Overload Protection (OLP): Overload is defined as
the load current exceeding its normal level due to an
unexpected abnormal event. In this situation, the
protection circuit should trigger to protect the SMPS.
However, even when the SMPS is in the normal
operation, the overload protection circuit can be
triggered during the load transition. To avoid this
undesired operation, the overload protection circuit is
designed to trigger only after a specified time to
determine whether it is a transient situation or a true
overload situation. Because of the pulse-by-pulse
current limit capability, the maximum peak current
through the SenseFET is limited, and therefore the
maximum input power is restricted with a given input
voltage. If the output consumes more than this maximum
power, the output voltage (VO) decreases below the set
voltage. This reduces the current through the optocoupler LED, which also reduces the opto-coupler
transistor current, thus increasing the feedback voltage
(VFB). If VFB exceeds 2.5V, D1 is blocked and the 5µA
current source starts to charge CB slowly up to VCC. In
this condition, VFB continues increasing until it reaches
6V, when the switching operation is terminated, as
shown in Figure 30. The delay time for shutdown is the
time required to charge CFB from 2.5V to 6V with 5µA. A
20 ~ 50ms delay time is typical for most applications.
4.4.2 Sync Over-Voltage Protection (OVP) of
FSQ0565RQ: If the secondary-side feedback circuit
malfunctions or a solder defect causes an opening in the
feedback path, the current through the opto-coupler
transistor becomes almost zero. VFB climbs up in a
similar manner to the overload situation, forcing the
preset maximum current to be supplied to the SMPS
until the overload protection triggers. Because more
energy than required is provided to the output, the output
voltage may exceed the rated voltage before the
overload protection triggers, resulting in the breakdown
of the devices in the secondary side. To prevent this
situation, an OVP circuit is employed. In general, the
peak voltage of the sync signal is proportional to the
output voltage and the FSQ-series uses a sync signal
instead of directly monitoring the output voltage. If the
sync signal exceeds 8V, an OVP is triggered, shutting
down the SMPS. To avoid undesired triggering of OVP
during normal operation, two points are considered, as
depicted in Figure 33. The peak voltage of the sync
signal should be designed below 6V and the spike of the
SYNC pin must be as low as possible to avoid getting
longer than tOVP by decreasing the leakage inductance
shown at VCC winding coil.
VVcc_coil &VCC
FSQ0565RQ Rev.00
Absolue max VCC (20V)
VCC
exceeds approximately 140°C, the thermal shutdown
triggers IC shutdown. The IC resumes operation when
the junction temperature decreases 60°C from TSD
temperature and VCC reaches startup voltage (Vstart).
5. Soft-Start: The power switch has an internal soft-start
circuit that increases PWM comparator inverting input
voltage with the SenseFET current slowly after it starts. The
typical soft-start time is 17.5ms. The pulse width to the
power switching device is progressively increased to
establish the correct working conditions for transformers,
inductors, and capacitors. The voltage on the output
capacitors is progressively increased with the intention of
smoothly establishing the required output voltage. This
mode helps prevent transformer saturation and reduces
stress on the secondary diode during startup.
6. Burst Operation: To minimize power dissipation in standby mode, the power switch enters burst-mode operation.
As the load decreases, the feedback voltage decreases.
As shown in Figure 34, the device automatically enters
burst-mode when the feedback voltage drops below
VBURL (350mV). At this point, switching stops and the
output voltages start to drop at a rate dependent on
standby current load. This causes the feedback voltage
to rise. Once it passes VBURH (550mV), switching
resumes. The feedback voltage then falls and the
process repeats. Burst-mode operation alternately
enables and disables switching of the power SenseFET,
thereby reducing switching loss in standby mode.
VO
Voset
VVcc_coil
VFB
0.55V
VDC
Npri
0.35V
NVcc
IDS
Improper OVP triggering
Vsync
VOVP (8V)
tOVP
VSH2 (4.8V)
tOVP
VDS
VCLAMP
Figure 33. OVP Triggering of FSQ0565RQ
time
FSQ0565 Rev. 00
4.5 Thermal Shutdown with Hysteresis (TSD): The
SenseFET and the control IC are built in one package.
This enables the control IC to detect the abnormally high
temperature of the SenseFET. If the temperature
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15
t1
Switching
disabled
t2
t3
Switching
disabled
t4
Figure 34. Waveforms of Burst Operation
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
FSQ-series uses VCC instead of directly monitoring the
output voltage. If VCC exceeds 19V, an OVP circuit is
activated, resulting in the termination of the switching
operation. To avoid undesired activation of OVP during
normal operation, VCC should be designed below 19V.
8. AVS (Alternating Valley Switching): Due to the
quasi-resonant operation with limited frequency, the
switching frequency varies depending on input voltage,
load transition, and so on. At high input voltage, the
switching on time is relatively small compared to low
input voltage. The input voltage variance is small and the
switching frequency modulation width becomes small. To
improve the EMI performance, AVS is enabled when
input voltage is high and the switching on time is small.
tsmax=21μs
IDS
IDS
A
VDS
tB=15μs
ts
IDS
Internally, quasi-resonant operation is divided into two
categories; one is first-valley switching and the other is
second-valley switching after blanking time. In AVS, two
successive occurrences of first-valley switching and the
other two successive occurrences of second-valley
switching is alternatively selected to maximize frequency
modulation. As depicted in Figure 36, the switching
frequency hops when the input voltage is high. The
internal timing diagram of AVS is described in Figure 37.
IDS
B
tB=15μs
VDS
ts
IDS
To overcome these problems, FSQ-series employs a
frequency-limit function, as shown in Figures 35 and 36.
Once the SenseFET is turned on, the next turn-on is
prohibited during the blanking time (tB). After the
blanking time, the controller finds the valley within the
detection time window (tW) and turns on the MOSFET, as
shown in Figures 35 and Figure 36 (Cases A, B, and C).
If no valley is found during tW, the internal SenseFET is
forced to turn on at the end of tW (Case D). Therefore,
the devices have a minimum switching frequency of
48kHz and a maximum switching frequency of 67kHz.
IDS
fs
C
VDS
1
15μs
1
17 μs
Assume the resonant period is 2 us
67kHz
tB=15μs
59kHz
53kHz
48kHz
ts
1
19 μs
AVS trigger point
Constant
frequency
CCM
IDS
IDS
Variable frequency within limited range
DCM
1
21μs
AVS region
VDS
tB=15μs
tW=6μs
D
D
C
B
A
FSQ0565 Rev.00
μs
tsmax=21
FSQ0565 Rev. 00
Figure 35. QRC Operation with Limited Frequency
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16
Figure 36. Switching Frequency Range
VIN
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
7. Switching Frequency Limit: To minimize switching
loss and Electromagnetic Interference (EMI), the
MOSFET turns on when the drain voltage reaches its
minimum value in quasi-resonant operation. However,
this causes switching frequency to increases at light load
conditions. As the load decreases or input voltage
increases, the peak drain current diminishes and the
switching frequency increases. This results in severe
switching losses at light-load condition, as well as
intermittent switching and audible noise. These problems
create limitations for the quasi-resonant converter
topology in a wide range of applications.
AVS
VDS
Synchronize
One-shot
Synchronize
GateX2
fixed
Vgate continued 2 pulses
1st or 2nd is depend on GateX2
tB
2nd valley switching
fixed
fixed
triggering
Vgate continued 2 pulses
Vgate continued another 2 pulses
1st valley switching
1st valley switching
fixed
de-triggering triggering
tB
fixed
1st or 2nd is dependent on GateX2
tB
GateX2: Counting Vgate every 2 pulses independent on other signals .
fixed
tB
tB
tB
1st valley- 2nd valley frequency modulation.
Modulation frequency is approximately 17kHz.
FSQ0565 Rev. 00
Figure 37. Alternating Valley Switching (AVS)
PCB Layout Guide
Due to the combined scheme, power switch shows better
noise immunity than conventional PWM controller and
MOSFET discrete solutions. Furthermore, internal drain
current sense eliminates noise generation caused by a
sensing resistor. There are some recommendations for
PCB layout to enhance noise immunity and suppress the
noise inevitable in power-handling components.
There are typically two grounds in the conventional
SMPS: power ground and signal ground. The power
ground is the ground for primary input voltage and
power, while the signal ground is ground for PWM
controller. In power switch, those two grounds share the
same pin, GND. Normally the separate grounds do not
share the same trace and meet only at one point, the GND
pin. More, wider patterns for both grounds are good for
large currents by decreasing resistance.
Capacitors at the VCC and FB pins should be as close as
possible to the corresponding pins to avoid noise from
the switching device. Sometimes Mylar® or ceramic
capacitors with electrolytic for VCC is better for smooth
operation. The ground of these capacitors needs to
connect to the signal ground (not power ground).
The cathode of the snubber diode should be close to the
Drain pin to minimize stray inductance. The Y-capacitor
between primary and secondary should be directly
connected to the power ground of DC link to maximize
surge immunity.
Figure 38. Recommended PCB Layout
Because the voltage range of feedback and sync line is
small, it is affected by the noise of the drain pin. Those
traces should not draw across or close to the drain line.
When the heat sink is connected to the ground, it should
be connected to the power ground. If possible, avoid
using jumper wires for power ground and drain.
Mylar® is a registered trademark of DuPont Teijin Films.
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17
FSQ0565RS/RQ — Green-Mode Power Switch for Quasi-Resonant Operation
Vgate
Application
Device
Input Voltage
Range
Rated Output Power
Output Voltage
(Maximum Current)
LCD Monitor
Power Supply
FSQ0565RS
85-265VAC
50W
5.0V (2.0A)
14V (2.8A)
Features
! Average efficiency of 25%, 50%, 75%, and 100% load conditions is higher than 80% at universal input
! Low standby mode power consumption (
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