LB11620GP-TE-L-H

LB11620GP Three-Phase Direct PWM Brushless Motor Driver Overview The LB11620GP is a direct PWM drive pre-driver IC that is optimal for three-phase power brushless motors. A motor driver circuit with the desired output capability (voltage and current) can be implemented by adding discrete transistors or other power devices to the outputs of this IC. Since the LB11620GP is provided in a miniature package, it is also appropriate for use with miniature motors as well. Features • Three-phase bipolar drive • Direct PWM drive (input of either a control voltage or a variable-duty PWM signal) • Built-in forward/reverse switching circuit • 5V regulator output (VREG pin) • Built-in current limiter circuit (0.25V (typical) reference voltage) • Built-in under voltage protection circuit • Built-in automatic recovery type constraint protection circuit (ON: OFF=1: 18) with protection operating state discrimination output (RD pin) • Hall signal pulse outputs Typical Applications • Server • Home appliance www.onsemi.com VCT24 (3.5×3.5) GENERIC MARKING DIAGRAM* XXXXXX YMDDD XXXXX = Specific Device Code Y = Year M = Month DDD = Additional Traceability Data ORDERING INFORMATION Ordering Code: LB11620GP-TE-L-H Package VCT24 (Pb-Free / Halogen Free) Shipping (Qty / packing) 2000 / Tape & Reel † For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF © Semiconductor Components Industries, LLC, 2016 April 2016- Rev. 0 1 Publication Order Number: LB11620GP/D LB11620GP Specifications MAXIMUM RATINGS / Ta = 25C Parameter (Note 1) Symbol Conditions Ratings Unit Supply voltage 1 VCC max VCC pin 18 V Output current IO max UL, VL, WL, UH, VH, WH pins 30 mA Allowable power dissipation Pd max *Mounted on a circuit board. 1.0 W Operating temperature Topr -30 to +100 C Storage temperature Tstg -55 to +150 C 1. Stresses exceeding those listed in the Absolute Maximum Rating table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 2. Mounted on a circuit board: 40.0mm50.0mm0.8mm, glass epoxy board. RECOMMENDED OPERATING RANGES at Ta = 25C (Note 3) Parameter Symbol Conditions Ratings Unit Supply voltage range 1-1 VCC1-1 VCC pin Supply voltage range 1-2 VCC1-2 VCC pin, with VCC shorted to VREG 8 to 17 Output current IO UL, VL, WL, UH, VH, WH pins 5 V constant voltage output current IREG HP pin voltage VHP 0 to 17 V HP pin output current IHP 0 to 15 mA 4.5 to 5.5 V V 25 mA -30 mA RD pin voltage VRD 0 to 17 V RD pin output current IRD 0 to 15 mA 3. Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. ELECTRICAL CHARACTERISTICS at Ta  25C, VCC = 12V (Note 4) Ratings Parameter Symbol Conditions Unit min Supply voltage 1 ICC1 typ max 12 16 mA 5V constant voltage output (VREG pin) Output voltage VREG 5.0 5.3 V Line regulation VREG1 VCC = 8 to 17V 4.7 40 100 mV Load regulation VREG2 IO = -5 to -20mA 10 30 Temperature coefficient VREG3 Design target 0 mV mV/C Low-voltage protection circuit (VREG pin) Operating voltage VSDL 3.5 3.7 3.9 V Clear voltage VSDH 3.95 4.15 4.35 V Hysteresis VSD 0.3 0.45 0.6 V 0.2 0.5 V 0.9 1.2 V 10 A Output Block Output voltage 1-1 VOUT1-1 Low level IO = 400A Output voltage 1-2 VOUT1-2 Low level IO = 10mA Output voltage 2 VOUT2 High level IO = -20mA Output leakage current IOleak VCC-1.1 VCC-0.9 V Continued on next page www.onsemi.com 2 LB11620GP Continued from preceding page. Ratings Parameter Symbol Conditions Unit min typ max Hall Amplifier Block Input bias current IHB (HA) Common-mode input voltage range 1 VICM1 When a Hall effect sensor is used -2 Common-mode input voltage range 2 VICM2 For single-sided input bias A -0.5 0.5 VCC-2.0 V 0 VCC V (Hall IC application) Hall input sensitivity 80 mVp-p Hysteresis VIN (HA) 15 24 40 mV Input voltage low  high VSLH (HA) 5 12 20 mV Input voltage high  low VSHL (HA) -20 -12 -5 mV 2.75 3.0 3.25 1.2 1.35 1.5 V -120 -90 -65 A PWM Oscillator (PWM pin) High-level output voltage VOH (PWM) Low-level output voltage VOL (PWM) External capacitor charge current ICHG VPWM = 2.1V Oscillator frequency f (PWM) C = 2000pF Amplitude V (PWM) 1.4 IB (CTL) -1 22 1.6 V kHz 1.9 Vp-p EI+ pin Input bias current Common-mode input voltage range VICM Input voltage 1 VCTL1 1 0 Output duty 100% VREG-1.7 3.0 A V V Input voltage 2 VCTL2 Output duty 0% 1.35 V Input voltage 1L VCTL1L Design target value. 2.82 V Input voltage 2L VCTL2L 1.29 V 3.18 V 1.44 V When VREG = 4.7V, 100% Design target value. When VREG = 4.7V, 0% Input voltage 1H VCTL1H Design target value. When VREG = 5.3V, 100% Input voltage 2H VCTL2H Design target value. When VREG = 5.3V, 0% HP pin Output saturation voltage VHPL IO = 10mA Output leakage current IHPleak VO = 18V 0.2 0.5 V 10 A 3.3 V CSD oscillator (CSD pin) High-level output voltage VOH (CSD) 2.7 3.0 Low-level output voltage VOL (CSD) 0.7 1.0 1.3 V External capacitor charge current ICHG1 VCSD = 2V -3.15 -2.5 -1.85 A External capacitor discharge current ICHG2 VCSD = 2V 0.1 0.14 0.18 Charge/discharge current ratio RCSD Charge current /discharge current 15 18 21 0.2 0.5 V 10 A 0.275 V A Times RD pin Low-level output voltage VRDL IO = 10mA Output leakage current IL (RD) VO = 18V VRF RF-GND Current limiter circuit (RF pin) Limiter voltage 0.225 0.25 PWMIN pin Input frequency f (PI) High-level input voltage VIH (PI) 2.0 VREG 60 kHz V Low-level input voltage VIL (PI) 0 1.0 V Input open voltage VIO (PI) VREG-0.5 VREG V Hysteresis VIS (PI) 0.2 0.25 0.4 V High-level input current IIH (PI) VPWMIN = VREG -10 0 10 A Low-level input current IIL (PI) VPWMIN = 0V -130 -90 A Continued on next page www.onsemi.com 3 LB11620GP Continued from preceding page. Ratings Parameter Symbol Conditions Unit min typ max F/R pin High-level input voltage VIH (FR) 2.0 VREG V Low-level input voltage VIL (FR) 0 1.0 V Input open voltage VIO (FR) VREG-0.5 Hysteresis VIS (FR) 0.2 High-level input current IIH (FR) Low-level input current IIL (FR) VREG V 0.25 0.4 V -10 0 10 A -130 -90 A N1 pin High-level input voltage VIH (N1) 2.0 VREG V Low-level input voltage VIL (N1) 0 1.0 V Input open voltage VIO (N1) VREG-0.5 VREG V High-level input current IIH (N1) VN1 = VREG 10 A Low-level input current IIL (N1) VN1 = 0V -10 0 -130 -100 A 4. Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 4 LB11620GP Package Dimensions unit : mm (typ) VCT24 3.5x3.5, 0.5P CASE 601AD ISSUE A SOLDERING FOOTPRINT* 3.20 3.20 (Unit: mm) 0.70 0.20 0.30 0.50 NOTE: The measurements are not to guarantee but for reference only. www.onsemi.com 5 LB11620GP Pd max Allowable power dissipation, Pd max - W 1.2 Ta Specified circuit board : 40.0×50.0×0.8mm3 glass epoxy board 1.0 0.8 0.6 0.40 0.4 0.2 0 -30 0 30 60 90 120 Ambient temperature, Ta - C Pin Assignment WH RF GND 18 17 16 VCC VREG 15 14 EI+ 13 WL 19 12 N1 VH 20 11 HP VL 21 10 F/R LB11620GP UH 22 9 PWMIN UL 23 8 CSD IN1- 24 7 RD 1 2 3 4 5 6 IN1+ IN2- IN2+ IN3- IN3+ PWM www.onsemi.com 6 LB11620GP • Three-Phase Logic Truth Table (IN = “H” indicates the state where IN+ > IN-) F/R = “L” F/R=“H” IN1 Output IN1 IN2 IN3 IN2 IN3 PWM 1 H L H L H L VH UL 2 H L L L H H WH UL 3 H H L L L H WH VL 4 L H L H L H UH VL 5 L H H H L L UH WL 6 L L H H H L VH WL • PWMIN pin Input state State High or open Output off Low Output on If the PWM pin is not used, the input must be held at the low level. • N1 pin Input state HP output High or open Three Hall sensor synthesized output Low Single Hall sensor output Explanation of Pin Functions Pin No. 3, 2 Pin IN1+, IN1IN2+, IN2- Hall sensor inputs from each motor phase. The logic high state indicates that IN+ > IN-. 5, 4 IN3+, IN3- If inputs are provided by a Hall effect sensor IC, the common-mode input range is expanded by biasing either the + or - 6 PWM 1, 24 Description input. Functions as both the PWM oscillator frequency setting pin and the initial reset pulse setting pin. Connect a capacitor between this pin and ground. 7 RD Lock (motor constrained) detection state output. This output is turned on when the motor is turning and off when the lock protection function detects that the motor has been stopped. This is an open collector output. 8 CSD Sets the operating time for the lock protection circuit. Connect a capacitor between this pin and ground. Connect this pin to ground if the lock protection function is not used. 9 PWMIN PWM pulse signal input. The output goes to the drive state when this pin is low and to the off state when this pin is high or open. To use this pin for control, a CTL amplifier input such that the TOC pin voltage goes to the 100% duty state must be provided. 10 F/R Forward/reverse control input 11 HP Hall signal output (HP output). This provides either a single Hall sensor output or a synthesized 3-sensor output. 12 N1 Hall signal output (HP output) selection 13 EI+ CTL amplifier + (no inverting) input. The PWMIN pin must be held at the low level to use this input for motor control 14 VREG 5V regulator output (Used as the control circuit power supply. A low-voltage protection circuit is built in.) Connect a capacitor between this pin and ground for stabilization. 15 VCC Power supply. Connect a capacitor between this pin and ground to prevent noise and other disturbances from affecting this IC. 16 GND 17 RF Ground Output current detection. The current detection resistor (Rf) voltage is sensed by the RF pin to implement current detection. The maximum output current is set by RF to be IOUT = 0.25/Rf. 22 UH Outputs (PWM outputs). 20 VH These are push-pull outputs. 18 WH 23 UL Outputs 21 VL These are push-pull outputs. 19 WL www.onsemi.com 7 LB11620GP Hall Sensor Signal Input/Output Timing Chart F/R = " L " IN1 IN2 IN3 UH VH WH UL VL WL F/R = " H " IN1 IN2 IN3 UH VH WH UL VL WL Sections shown in gray are PWM output periods. www.onsemi.com 8 CTL HP VREG PWMIN PWM EI+ PWM IN PWM OSC + - F/R F/R www.onsemi.com 9 IN1 N1 COMP VCC IN1+ IN1- HP LOGIC RD RD VREG LVSD IN2+ IN2- IN3+ IN3- HALL HYS AMP HALL LOGIC CONTROL LOGIC CSD OSC CSD + GND CURR LIM PRI DRIVER VREG RF WL WH VL VH UL UH VCC VREG + 5V + VM LB11620GP Block Diagram and Application Example 1 Bipolar transistor drive (high side PWM) Using a 5V power supply HP VREG PWMIN PWM EI+ PWM IN PWM OSC + - F/R F/R www.onsemi.com 10 IN1 N1 COMP VCC IN1+ IN1- HP LOGIC RD RD VREG LVSD IN2+ IN2- IN3+ IN3- HALL HYS AMP HALL LOGIC CONTROL LOGIC CSD OSC CSD + GND CURR LIM PRI DRIVER VREG RF WH WL VH VL UH UL VCC VREG Tr Tr Tr + VM(12V) LB11620GP Application Example 2 54 MOS transistor drive (low side PWM) Using a 12V single-voltage power supply HP VREG PWMIN PWM EI+ PWM IN PWM OSC + - F/R F/R www.onsemi.com 11 IN1 N1 COMP VCC IN1+ IN1- HP LOGIC RD RD VREG LVSD IN2+ IN2- IN3+ IN3- HALL HYS AMP HALL LOGIC CONTROL LOGIC CSD OSC CSD + GND CURR LIM PRI DRIVER VREG RF WH WL VH VL UH UL VCC VREG + VCC(12V) + VM(24V) LB11620GP Application Example 3 MOS transistor drive (low side PWM) Using a VCC = 12V, VM = 24V power supply system HP VREG PWMIN PWM EI+ PWM IN PWM OSC + - F/R F/R www.onsemi.com 12 IN1 N1 COMP VCC IN1+ IN1- HP LOGIC RD RD VREG LVSD IN2+ IN2- IN3+ IN3- HALL HYS AMP HALL LOGIC CONTROL LOGIC CSD OSC CSD + GND CURR LIM PRI DRIVER VREG RF WH WL VH VL UH UL VCC VREG + VM(24V) LB11620GP Application Example 4 MOS transistor drive (low side PWM) Using a 24V single-voltage power supply LB11620GP Pin Functions PIN No. PIN name 24 IN1- Hall input pin. Function Equivalent circuit 1 IN1+ IN+ > IN- to “H”, IN+  IN- to “L”. 2 IN2- Connect the capacitor between IN+ and IN- 3 IN2+ when the noise of the hall signal becomes a 4 IN3- problem. 5 IN3+ 6 PWM VCC 1 3 Functions as both the PWM oscillator 24 5 2 4 VREG frequency setting pin and the initial reset pulse setting pin. Connect a capacitor between this pin and ground. It is possible to set it to about 22kHz with C=2000pF. 6 7 RD Lock (motor constrained) detection state VREG output. This output is turned on when the motor is turning and off when the lock 7 11 protection function detects that the motor has been stopped. 11 HP Hall signal output pin. Two kinds of outputs can be selected by setting the N1 pin. 8 CSD Sets the operating time for the lock protection VREG circuit. Connect a capacitor between this pin and ground. Connect this pin to ground if the lock protection function is not used. 9 PWMIN 8 PWM pulse signal input. The output goes to VREG the drive state when this pin is low and to the off state when this pin is high or open. To use this pin for control, a CTL amplifier input such that the TOC pin voltage goes to the 100% 9 10 duty state must be provided. 10 F/R Forward/reverse control input. Continued on next page www.onsemi.com 13 LB11620GP Continued from preceding page. PIN No. PIN name 10 F/R Forward/reverse control input. Function Equivalent circuit 12 N1 Hall signal output (HP output) selection. VREG 12 13 EI+ CTL amplifier + (no inverting) input. The PWMIN pin must be held at the low level to VCC use this input for motor control. 13 14 VREG Stabilizing supply output pin. (5V output) Connect a capacitor between this pin and VCC ground for stabilization. (about 0.1F level) 14 15 VCC Power supply. Connect a capacitor between this pin and ground to prevent noise and other disturbances from affecting this IC. 16 GND 17 RF Ground Output current sensing pin. VREG The low resistance is connected between RF and GND. It sets it by output maximum current IOUT=0.25/Rf. 17 18 WH Output pin. (Driving external TR output) 19 WL The duty is controlled on UH, VH, and WH 20 VH side. 21 VL 22 UH 23 UL VCC 18 19 20 21 22 23 www.onsemi.com 14 LB11620GP ON Semiconductor and the ON logo are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf . SCILLC reserves the right to make changes without further notice to any products herein. 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