LC75844M
1/4-Duty General-Purpose
LCD Driver
Overview
The LC75844M is a 1/4 duty general-purpose LCD driver that can be
used for frequency display in electronic tuners under the control of a
microcontroller. The LC75844M can drive an LCD with up to 88
segments directly. The LC75844M can also control up to 4 generalpurpose output ports. Since the LC75844M uses separate power supply
systems for the LCD drive block and the logic block, the LCD driver
block power-supply voltage can be set to any voltage in the range 2.7 to
6.0 volts, regardless of the logic block power-supply voltage.
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Application
Car, Home frequency display
SOIC36 W / MFP36SDJ (375 mil)
Features
Support for 1/4 duty 1/2 bias or 1/4 duty 1/3 bias drive of up to 88
segments under serial data control.
Serial data input supports CCB format communication with the system
controller.
Serial data control of the power-saving mode based backup function
and all the segments forced off function
Serial data control of switching between the segment output port and
the general-purpose output port functions
High generality, since display data is displayed directly without decoder
intervention.
Independent VLCD for the LCD driver block (VLCD can be set to any
voltage in the range 2.7 to 6.0 volts, regardless of the logic block
power-supply voltage.)
The INH pin can force the display to the off state.
RC oscillator circuit
* Computer Control Bus (CCB) is an ON Semiconductor’s original bus format and
the bus addresses are controlled by ON Semiconductor.
ORDERING INFORMATION
See detailed ordering and shipping information on page 16 of this data sheet.
© Semiconductor Components Industries, LLC, 2017
July 2017 - Rev. 1
1
Publication Order Number :
LC75844M/D
LC75844M
Specifications
Absolute Maximum Ratings at Ta = 25C, VSS = 0 V
Parameter
Maximum supply voltage
Input voltage
Output voltage
Symbol
Conditions
Ratings
Unit
VDD max
VDD
0.3 to +7.0
VLCD max
VLCD
0.3 to +7.0
VIN1
VIN2
CE, CL, DI, INH
OSC
0.3 to VDD+0.3
VIN3
VLCD1, VLCD2
0.3 to VLCD+0.3
VOUT1
VOUT2
OSC
0.3 to VDD+0.3
0.3 to VLCD+0.3
V
300
A
V
0.3 to +7.0
S1 to S22, COM1 to COM4, P1 to P4
IOUT1
IOUT2
COM1 to COM4
3
IOUT3
P1 to P4
5
Allowable power dissipation
Pd max
Ta = 85C
Operating temperature
Topr
40 to +85
C
Storage temperature
Tstg
55 to +125
C
Output current
S1 to S22
V
100
mA
mW
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed,
damage may occur and reliability may be affected.
Allowable Operating Ranges at Ta = 40 to +85C, VSS = 0 V
Parameter
Symbol
Ratings
Conditions
min
typ
max
Unit
VDD
VDD
2.7
6.0
VLCD
VLCD
2.7
6.0
VLCD1
VLCD1
2/3VLCD
VLCD
VLCD2
VLCD2
1/3VLCD
VLCD
VIH
VIL
CE, CL, DI, INH
0.8VDD
Input low-level voltage
CE, CL, DI, INH
0
Recommended external resistor
Rosc
OSC
Recommended external
capacitor
Oscillation guaranteed range
Cosc
OSC
fosc
OSC
Data setup time
tds
CL, DI
[Figure 2]
160
ns
Data hold time
tdh
CL, DI
[Figure 2]
160
ns
CE wait time
tcp
CE, CL
[Figure 2]
160
ns
CE setup time
tcs
CE, CL
[Figure 2]
160
ns
CE hold time
tch
CE, CL
[Figure 2]
160
ns
High-level clock pulse width
tH
CL
[Figure 2]
160
ns
Low-level clock pulse width
tL
CL
[Figure 2]
160
Rise time
tr
CE, CL, DI
[Figure 2]
160
ns
Fall time
tf
CE, CL, DI
[Figure 2]
160
ns
INH switching time
tc
INH, CE
[Figure 3]
Supply voltage
Input voltage
Input high-level voltage
25
10
6.0
0.2VDD
V
V
V
V
43
kΩ
680
pF
50
100
kHz
ns
s
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended
Operating Ranges limits may affect device reliability.
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2
LC75844M
Electrical Characteristics at Allowable Operating Ranges
Parameter
Symbol
Pin
Conditions
Ratings
min
typ
Unit
max
Hysteresis width
VH
CE, CL, DI, INH
Input high-level
current
Input low-level
current
Output high-level
voltage
IIH
CE, CL, DI, INH
VI = 6.0 V
IIL
CE, CL, DI, INH
VI = 0 V
VOH1
S1 to S22
IO = 20 A
VLCD0.9
VOH2
COM1 to COM4
VLCD0.9
VOH3
P1 to P4
IO = 100 A
IO = 1 mA
VOL1
S1 to S22
IO = 20 A
0.9
VOL2
COM1 to COM4
0.9
VOL3
P1 to P4
IO = 100 A
IO = 1 mA
VMID1
COM1 to COM4
1/2 bias, IO = ±100 A
VMID2
S1 to S22
1/3 bias, IO = ±20 A
VMID3
S1 to S22
1/3 bias, IO = ±20 A
VMID4
COM1 to COM4
1/3 bias, IO = ±100 A
VMID5
COM1 to COM4
1/3 bias, IO = ±100 A
fOSC
OSC
IDD1
VDD
Rosc = 43 kΩ
Cosc = 680 pF
Power saving mode
IDD2
VDD
ILCD1
VLCD
ILCD2
VLCD
ILCD3
VLCD
Output low-level
voltage
Output middlelevel voltage
*1
Oscillator
frequency
Supply current
0.1VDD
V
5.0
5.0
A
A
V
VLCD0.9
V
0.9
1/2VLCD
0.9
2/3VLCD
0.9
1/3VLCD
0.9
2/3VLCD
0.9
1/3VLCD
0.9
40
VDD = 6.0 V, output open,
fosc = 50 kHz
Power saving mode
VLCD = 6.0 V, output open,
1/2 bias, fosc = 50 kHz
VLCD = 6.0 V, output open,
1/3 bias, fosc = 50 kHz
1/2VLCD
+0.9
2/3VLCD
+0.9
1/3VLCD
+0.9
2/3VLCD
+0.9
1/3VLCD
+0.9
50
60
V
kHz
5
230
460
5
100
200
60
120
A
Note: *1 Excluding the bias voltage generation divider resistors built into VLCD1, VLCD2. (See Figure 1.)
VLCD
VLCD1
To the common segment driver
VLCD2
Except these resistors
VSS
Figure 1
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be
indicated by the Electrical Characteristics if operated under different conditions.
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3
LC75844M
1. When CL is stopped at the low level
VIH
VIL
CE
tf
tcp
tch
tcs
DI
tr
CL
tL
tH
VIH
50%
VIL
VIH
VIL
tdh
tds
2. When CL is stopped at the high level
VIH
VIL
CE
tf
tr
tcp
VIH
VIL
DI
tds
VIH
50%
VIL
tch
tcs
CL
tH
tL
tdh
Figure 2
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4
LC75844M
Package Dimensions
unit : mm
SOIC36 W / MFP36SDJ (375 mil)
CASE 751CM
ISSUE A
15.55 MAX
0 to 10
0.8
0.3
0.25
0.15
0.10
0.10.1
(2.25)
2.45 MAX
(0.8)
0.650.2
7.90.1
1 2
10.50.3
15.20.1
36
(Unit: mm)
1.15
SOLDERING FOOTPRINT*
GENERIC
MARKING DIAGRAM*
9.75
XXXXXXXXXX
YMDDD
0.80
XXXXX = Specific Device Code
Y = Year
M = Month
DDD = Additional Traceability Data
0.45
NOTE: The measurements are not to guarantee but for reference only.
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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5
*This information is generic.
LC75844M
DI
CL
CE
INH
OSC
VSS
VLCD2
VLCD1
VLCD
VDD
COM4
COM3
COM2
COM1
S22
S21
S20
S19
Pin Assignment
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
P1/S1
P2/S2
P3/S3
P4/S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
S16
S17
S18
LC75844M
Top view
COMMON
DRIVER
SEGMENT DRIVER & LATCH
CLOCK
GENERATOR
SHIFT REGISTER
INH
OSC
VDD
VLCD
VLCD1
ADDRESS
DETECTOR
VLCD2
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6
CE
CL
DI
VSS
S1/P1
S2/P2
S3/P3
S4/P4
S5
S21
S22
COM1
COM2
COM3
COM4
Block Diagram
LC75844M
Pin Functions
Handling
Symbol
Pin No.
Function
Active
I/O
when
unused
S1/P1 to S4/P4
1 to 4
S5 to S22
5 to 22
COM1 to COM4
23 to 26
OSC
32
CE
34
CL
35
DI
36
Segment outputs for displaying the display data transferred by serial data
input. The S1/P1 to S4/P4 pins can be used as general-purpose output ports
-
O
OPEN
-
O
OPEN
-
I/O
VDD
H
I
under serial data control.
Common driver outputs
The frame frequency (fo) is given by: fo=(fosc/512) Hz.
Oscillator pin, which, together with externally connected resistor and
capacitor, makes up an oscillator circuit.
Serial data transfer input pin to be connected to the controller.
CE: Chip enable
I
CL: Synchronization clock
DI: Transfer data
GND
-
I
L
I
GND
-
I
OPEN
-
I
OPEN
Display off input pin
• INH=”L” (VSS) ... OFF
S1/P1 to S4/P4=”L” (VSS)
(Fixed to “L” after forced selection
INH
33
of segment output port.)
S5 to S22=”L” (VSS)
COM1 to COM4=”L” (VSS)
• INH=”H” (VDD) ... ON
Note that the serial data can be transferred when OFF.
VLCD1
29
VLCD2
30
Used for applying the LCD driver 2/3 bias voltage externally.
Must be connected to VLCD2 when a 1/2 bias scheme is used.
Used for applying the LCD driver 1/3 bias voltage externally.
Must be connected to VLCD1 when a 1/2 bias scheme is used.
VDD
27
Logic block power supply pin to provide a voltage between 2.7 V to 6.0 V.
-
-
-
VLCD
28
LCD driver power supply pin to provide a voltage between 2.7 V to 6.0 V.
-
-
-
VSS
31
Power supply pin to connect to ground.
-
-
-
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LC75844M
Serial Data Transfer Form
(1) When CL is stopped at the low level
CL
0
0
1
0
0
0
1
0
D1 D2 D3
D37 D38 D39 D40 D41 D42 D43 D44 0
0
0
0
0 P0 P1 P2 DR SC BU 0
B0 B1 B2 B3 A0 A1 A2 A3
Display data
44-bits
Control data
11-bit
DD
1-bits
CCB address
8-bits
0
0
1
0
0
0
1
0
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0
0
0
0
0
0
0
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8-bits
Fixed data
11-bit
Display data
44-bits
DI
CE
DD
1-bits
Note) DD Direction data
(2) When CL is stopped at the low level
CL
0
0
1
0
0
0
1
0
D1 D2 D3
D37 D38 D39 D40 D41 D42 D43 D44 0
0
0
0
0 P0 P1 P2 DR SC BU 0
B0 B1 B2 B3 A0 A1 A2 A3
Display data
44-bits
Control data
11-bit
DD
1-bits
CCB address
8-bits
0
0
1
0
0
0
1
0
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0
0
0
0
0
0
0
B0 B1 B2 B3 A0 A1 A2 A3
CCB address
8-bits
Display data
44-bits
Fixed data
11-bit
Note) DD Direction data
CCB address ·· “44H”
D1 to D88 ····· Display data
P0 to P2 ······· Segment output port / general-purpose output port switching control data
DR ············· 1/2 bias driver / 1/3 bias driver switching control data
SC ·············· Segment ON, OFF control data
BU ············· Normal mode, power save mode control data
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8
0
0
0
0
1
DI
CE
DD
1-bits
LC75844M
Example of Serial Data Transfer
When used with 45 segments or more
Serial data must be transferred all 112-bit.
8-bit
0
0
1
0
0
56-bit
0
1
0
D1 D2 D3
D37 D38 D39 D40 D41 D42 D43 D44 0
0
0
0
0 P0 P1 P2 DR SC BU 0
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0
0
0
0
0
B0 B1 B2 B3 A0 A1 A2 A3
0
0
1
0
0
0
1
0
0
0
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 A3
When fewer than 45 segments are used, only 56-bits of serial data need to be sent. However, the display data
D1 to D44 and the control data must be sent.
8-bit
0
0
1
0
0
56-bit
0
1
0
D37 D38 D39 D40 D41 D42 D43 D44 0
D1 D2 D3
0
0
0
0 P0 P1 P2 DR SC BU 0
B0 B1 B2 B3 A0 A1 A2 A3
Note) When fewer than 45 segments are used, transfers such as that shown in the figure below cannot be used.
8-bit
0
0
1
0
0
56-bit
0
1
0
D45 D46 D47
D81 D82 D83 D84 D85 D86 D87 D88 0
0
0
0
0
0
0
0
0
0
0
1
B0 B1 B2 B3 A0 A1 A2 A3
Control Data Description
(1) P0 to P2 Segment output port/General-purpose output port switching control data
This control data switching output S1/P1 to S4/P4 segment output port and general-purpose output port.
Control data
Output pin state
P0
P1
P2
S1/P1
S2/P2
S3/P3
S4/P4
0
0
0
S1
S2
S3
S4
0
0
1
P1
S2
S3
S4
0
1
0
P1
P2
S3
S4
0
1
1
P1
P2
P3
S4
1
0
0
P1
P2
P3
P4
Note) Sn (n=1 to 4): Segment output port
Pn (n=1 to 4): General-purpose output port
The following shows the correspondence between output pins and display data when the general-purpose output port
is selected.
Output pin
Correspondence display data
S1/P1
D1
S2/P2
D5
S3/P3
D9
S4/P4
D13
For example, if output pin S4/P4 is for the general-purpose output port, output pin S4/P4 outputs high and low-level
when display data D13=“1” and D13= “0”, respectively.
(2) DR 1/2 bias drive, 1/3 bias driver switching control data
This control data switching LCD 1/2 bias driver and 1/3 bias driver.
DR
Driver method
0
1/3 bias driver
1
1/2 bias driver
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LC75844M
(3) SC Segment ON, OFF control data
This control data controls segment ON and OFF.
SC
Display state
0
ON
1
OFF
Note: that the OFF state with SC=[1] corresponds to the OFF state due to output of the display OFF waveform from
the segment output pin.
(4) BU Normal mode, Power save mode control data
This control data controls normal mode and power save mode.
BU
Mode
Normal mode
0
Power save mode (oscillation on the OSC pin stops and the common, segment output pins go low, However, output pins
1
S1/P1 to S4/P4 can be used as the general-purpose output port by the use of control data P0 to P2.)
Display data and output pin correspondence
Output pin
COM1
COM2
COM3
COM4
Output pin
COM1
COM2
COM3
COM4
S1/P1
D1
D2
D3
D4
S12
D45
D46
D47
D48
S2/P2
D5
D6
D7
D8
S13
D49
D50
D51
D52
D56
S3/P3
D9
D10
D11
D12
S14
D53
D54
D55
S4/P4
D13
D14
D15
D16
S15
D57
D58
D59
D60
S5
D17
D18
D19
D20
S16
D61
D62
D63
D64
S6
D21
D22
D23
D24
S17
D65
D66
D67
D68
S7
D25
D26
D27
D28
S18
D69
D70
D71
D72
S8
D29
D30
D31
D32
S19
D73
D74
D75
D76
S9
D33
D34
D35
D36
S20
D77
D78
D79
D80
S10
D37
D38
D39
D40
S21
D81
D82
D83
D84
S11
D41
D42
D43
D44
S22
D85
D86
D87
D88
Note: Output pins S1/P1 to S4/P4 are for segment output port selection.
For example, the data to output pin correspondence for the output pin S11 is as follows.
Display data
Output pin (S11) state
D41
D42
D43
D44
0
0
0
0
LCD segments for COM1, COM2, COM3 and COM4 OFF
0
0
0
1
LCD segment for COM4 ON
0
0
1
0
LCD segment for COM3 ON
0
0
1
1
LCD segments for COM3 and COM4 ON
0
1
0
0
LCD segment for COM2 ON
0
1
0
1
LCD segments for COM2 and COM4 ON
0
1
1
0
LCD segments for COM2 and COM3 ON
0
1
1
1
LCD segments for COM2, COM3 and 4 ON
1
0
0
0
LCD segment for COM1 ON
1
0
0
1
LCD segments for COM1 and COM4 ON
1
0
1
0
LCD segments for COM1 and COM3 ON
1
0
1
1
LCD segments for COM1, 3 and COM4 ON
1
1
0
0
LCD segments for COM1 and COM2 ON
1
1
0
1
LCD segments for COM1, COM2 and COM4 ON
1
1
1
0
LCD segments for COM1, COM2 and COM3 ON
1
1
1
1
LCD segments for COM1, COM2, COM3 and COM4 ON
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LC75844M
Output Waveforms (1/4-Duty 1/2-Bias ON System)
fosc
512
[Hz]
COM1
VLCD
VLCD1, VLCD2
0V
COM2
VLCD
VLCD1, VLCD2
0V
COM3
VLCD
VLCD1, VLCD2
0V
COM4
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM1, COM2, COM3 and COM4 are off.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD segment for
COM1 is on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD segment for
COM2 is on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM1 and COM2 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD segment for
COM3 is on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM1 and COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM2 and COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM1, COM2 and COM3 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when only LCD segment for
COM4 is on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM2 and COM4 are on.
VLCD
VLCD1, VLCD2
0V
LCD driver output when LCD segments for
COM1, COM2, COM3 and COM4 are on.
VLCD
VLCD1, VLCD2
0V
1/4 duty, 1/2 bias waveform
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LC75844M
Output Waveforms (1/4-Duty 1/3-Bias ON System)
fosc
512
[Hz]
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
VLCD
VLCD1
VLCD2
0V
COM1
COM2
COM3
COM4
LCD driver output when LCD segments for
COM1, COM2, COM3 and COM4 are off.
LCD driver output when only LCD segment for
COM1 is on.
LCD driver output when only LCD segment for
COM2 is on.
LCD driver output when LCD segments for
COM1 and COM2 are on.
LCD driver output when only LCD segment for
COM3 is on.
LCD driver output when LCD segments for
COM1 and COM3 are on.
LCD driver output when LCD segments for
COM2 and COM3 are on.
LCD driver output when LCD segments for
COM1, COM2 and COM3 are on.
LCD driver output when only LCD segment for
COM4 is on.
LCD driver output when LCD segments for
COM2 and COM4 are on.
LCD driver output when LCD segments for
COM1, COM2, COM3 and COM4 are on.
1/4 duty, 1/3 bias waveform
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LC75844M
INH and Display Control
Since the IC internal data (D1 to D88, control data) is undefined immediately after applying power, hold INH low at
same time as applying power to turn off the display (S1/P1 to S4/P4, S5 to S22, COM1 to COM4 VSS level), and
serial transfer data from the microprocessor during the period that INH is low.
When the data transfer is complete, set INH high.
This procedure will avoid displaying meaningless patterns at startup. (See Figure 3)
Power Sequence
Be sure to observe the following sequence for power ON/OFF (See Figure 3)
Power ON:
Logic block power (VDD) ON → LCD driver power (VLCD) ON
Power OFF:
LCD driver power (VLCD) OFF → Logic block power (VDD) OFF
When the logic block power (VDD) and LCD driver power (VLCD) are common, both power supplies can be turned
ON/OFF simultaneously.
t2
t1
t3
VDD
VLCD
INH
VIL
CE
Internal data
D1 to D44
P0 to P2
DR, SC, BU
Internal data (D45 to D88)
VIL
Display data, control data transfer
tc
Indefinite
Decision
Indefinite
Indefinite
Decision
Indefinite
Figure 3
Note: t10
t20
t30 (t2t3)
tc 10s min
Note on Controller-used Display Data Transfer
Since the LC75844M is such that display data (D1 to D88) is transferred in 4 times, it is recommended to transfer
display data within 30 [ms] in terms of display quality.
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13
LC75844M
Sample Application Circuit 1
1/2 Bias (For normal panel)
(P1)
(P2)
*2
VDD
+3V
OSC
VSS
VLCD
+5V
VLCD1
C0.047F
C
(P4)
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P3/S3
P4/S4
S5
Used for control of
back-light
LCD panel
(Max.88
segment)
VLCD2
INH
CE
CL
DI
From controller
(P3)
(General-purpose output port)
S20
S21
S22
*2 If a capacitor other than the external capacitor Cosc = 680 [pF] recommended is to be used, it is recommended to
used a capacitor of 220 to 2200 [pF].
Sample Application Circuit 2
1/2 bias (For large panel)
(P1)
(P2)
*2
+3V
VDD
OSC
VSS
VLCD
+5V
Number 10kR
Number k
C0.047F
From controller
C
R
VLCD1
R
VLCD2
INH
CE
CL
DI
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P3/S3
P4/S4
S5
(P3)
(P4)
(General-purpose output port)
Used for control of
back-light
LCD panel
(Max.88
segment)
S20
S21
S22
*2 If a capacitor other than the external capacitor Cosc = 680 [pF] recommended is to be used, it is recommended to
used a capacitor of 220 to 2200 [pF].
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LC75844M
Sample Application Circuit 3
1/3 bias (For normal panel)
(P1)
(P2)
(P3)
*2
+3V
OSC
VDD
VSS
+5V
VLCD
VLCD1
C0.047F
C
(P4)
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P3/S3
P4/S4
S5
(General-purpose output port)
Used for control of
back-light
LCD panel
(Max.88
segment)
VLCD2
C
INH
CE
CL
DI
From controller
S20
S21
S22
*2 If a capacitor other than the external capacitor Cosc = 680 [pF] recommended is to be used, it is recommended to
used a capacitor of 220 to 2200 [pF].
Sample Application Circuit 4
1/3 bias (For large panel)
(P1)
(General-purpose output port)
(P2)
*2
VDD
+3V
OSC
VSS
+5V
R
Number 10kR
Number k
C0.047F
From controller
R
C
C
R
VLCD
VLCD1
COM1
COM2
COM3
COM4
P1/S1
P2/S2
P3/S3
P4/S4
S5
(P3)
(P4)
Used for control of
back-light
LCD panel
(Max.88
segment)
VLCD2
INH
CE
CL
DI
S20
S21
S22
*2 If a capacitor other than the external capacitor Cosc = 680 [pF] recommended is to be used, it is recommended to
used a capacitor of 220 to 2200 [pF].
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15
LC75844M
ORDERING INFORMATION
Device
Package
Shipping (Qty / Packing)
LC75844M-E
SOIC36 W / MFP36SDJ (375 mil)
(Pb-Free)
25 / Fan-Fold
LC75844M-TLM-E
SOIC36 W / MFP36SDJ (375 mil)
(Pb-Free)
1000 / Tape & Reel
LC75844MHS-MPB-E
SOIC36 W / MFP36SDJ (375 mil)
(Pb-Free)
25 / Fan-Fold
LC75844MHS-TLM-E
SOIC36 W / MFP36SDJ (375 mil)
(Pb-Free)
1000 / Tape & Reel
† For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel
Packaging Specifications Brochure, BRD8011/D. http://www.onsemi.com/pub_link/Collateral/BRD8011-D.PDF
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16