MC74VHC1GT66
SPST (NO) Normally Open
Analog Switch
Features
•
•
•
•
•
•
•
High Speed: tPD = 20 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 1.0 mA (Max) at TA = 25°C
Diode Protection Provided on Inputs and Outputs
Improved Linearity and Lower ON Resistance over Input Voltage
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MARKING
DIAGRAMS
5
SC−88A
DF SUFFIX
CASE 419A
5
1
M
The MC74VHC1GT66 is a Single Pole Single Throw (SPST)
analog switch. It achieves high speed propagation delays and low ON
resistances while maintaining low power dissipation. This bilateral
switch controls analog and digital voltages that may vary across the
full power−supply range (from VCC to GND).
The MC74VHC1GT66 is compatible in function to a single gate of
the High Speed CMOS MC74VHCT4066 and the metal−gate CMOS
MC14066. The device has been designed so that the ON resistances
(RON) are much lower and more linear over input voltage than RON of
the metal−gate CMOS or High Speed CMOS analog switches.
The ON/OFF Control input is compatible with TTL−type input
thresholds allowing the device to be used as a logic−level translator
from 3 V CMOS logic to 5 V CMOS logic or from 1.8 V CMOS logic
to 3 V CMOS logic while operating at the high−voltage power supply.
The input protection circuitry on this device allows overvoltage
tolerance on the input, which provides protection when voltages of up
to 7 V are applied, regardless of the supply voltage. This allows the
MC74VHC1GT66 to be used to interface 5 V circuits to 3 V circuits.
VE MG
G
1
TSOP−5
DT SUFFIX
CASE 483
5
1
5
VE MG
G
1
VE
= Device Code
M
= Date Code*
W
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
On/Off Control Input Has OVT
Chip Complexity: FETs = 11; Equivalent Gates = 3
Pb−Free Packages are Available
PIN ASSIGNMENT
1
IN/OUT XA
2
OUT/IN YA
3
GND
4
ON/OFF CONTROL
5
VCC
FUNCTION TABLE
On/Off Control Input
State of Analog Switch
L
H
Off
On
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
August, 2011 − Rev. 15
1
Publication Order Number:
MC74VHC1GT66/D
MC74VHC1GT66
IN/OUT XA
1
OUT/IN YA
2
GND
3
5
VCC
4
ON/OFF
CONTROL
(SC−88A, TSOP−5)
Figure 1. Pinout Diagram
ON/OFF CONTROL
X1
1
1
U
U
IN/OUT XA
OUT/IN YA
Figure 2. Logic Symbol
MAXIMUM RATINGS
Symbol
Characteristics
Value
Unit
VCC
DC Supply Voltage
−0.5 to +7.0
V
VIN
DC Input Voltage
−0.5 to +7.0
V
VIS
Analog Output Voltage
−0.5 to 7.0
V
IIK
Input Diode Current
−20
mA
ICC
DC Supply Current, VCC and GND
+25
mA
*65 to )150
°C
260
°C
TSTG
Storage Temperature Range
TL
Lead Temperature, 1 mm from Case for 10 Seconds
TJ
Junction Temperature Under Bias
qJA
Thermal Resistance
PD
Power Dissipation in Still Air at 85°C
MSL
Moisture Sensitivity
FR
Flammability Rating
VESD
ILatchup
ESD Withstand Voltage
Latchup Performance
)150
°C
SC70−5 (Note 1)
SOT23−5
350
230
°C/W
SC70−5
SOT23−5
150
200
mW
Level 1
Oxygen Index: 28 to 34
UL 94 V−0 @ 0.125 in
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
u2000
u200
N/A
V
Above VCC and Below GND at 125°C (Note 5)
$500
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow.
2. Tested to EIA/JESD22−A114−A.
3. Tested to EIA/JESD22−A115−A.
4. Tested to JESD22−C101−A.
5. Tested to EIA/JESD78.
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2
MC74VHC1GT66
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
Max
Unit
VCC
DC Supply Voltage
2.0
5.5
V
VIN
Digital Input Voltage
GND
5.5
V
VIS
Analog Input Voltage
GND
VCC
V
TA
Operating Temperature Range
−55
+125
°C
0
0
100
20
ns/V
tr , tf
Input Rise and Fall Time
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
90
419,300
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80 ° C
117.8
TJ = 90 ° C
1,032,200
TJ =100° C
80
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ =110 ° C
Time, Years
TJ =120° C
Time, Hours
TJ = 130 ° C
Junction
Temperature °C
NORMALIZED FAILURE RATE
Device Junction Temperature versus
Time to 0.1% Bond Failures
1
1
10
100
1000
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction Temperature
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3
MC74VHC1GT66
DC ELECTRICAL CHARACTERISTICS
Symbol
Parameter
Test Conditions
VIH
Minimum High−Level
Input Voltage
ON/OFF Control Input
RON = Per Spec
VIL
Maximum Low−Level
Input Voltage
ON/OFF Control Input
RON = Per Spec
IIN
Maximum Input
Leakage Current
ON/OFF Control Input
ICC
TA = 25°C
VCC
(V)
Min
3.0
4.5
5.5
1.2
2.0
2.0
TA ≤ 85°C
Max
Min
Max
1.2
2.0
2.0
−55°C ≤ TA ≤ 125°C
Min
Max
Unit
V
1.2
2.0
2.0
V
3.0
4.5
5.5
0.53
0.8
0.8
0.53
0.8
0.8
0.53
0.8
0.8
VIN = VCC or GND
0 to
5.5
±0.1
±1.0
±1.0
mA
Maximum Quiescent
Supply Current
VIN = VCC or GND
VIO = 0 V
5.5
1.0
20
40
mA
ICCT
Quiescent
Supply Current
ON/OFF Control at
3.4 V
5.5
1.35
1.5
1.65
mA
RON
Maximum ”ON”
Resistance
VIN = VIH
VIS = VCC or GND
|IIS| ≤ 10 mA (Figure 4)
3.0
4.5
5.5
60
45
40
70
50
45
100
60
55
W
IOFF
Maximum Off−Channel
Leakage Current
VIN = VIL
VIS = VCC or GND
Switch Off (Figure 5)
5.5
0.1
0.5
1.0
mA
AC ELECTRICAL CHARACTERISTICS Cload = 50 pF, Input tr/tf = 3.0 ns
Symbol
Parameter
VCC
(V)
TA = 25°C
Typ
Max
Max
Unit
1
0.6
0.6
0.6
5
2
1
1
6
3
1
1
7
4
2
1
ns
2.0
3.0
4.5
5.5
32
28
24
20
40
35
30
25
45
40
35
30
50
45
40
35
ns
2.0
3.0
4.5
5.5
32
28
24
20
40
35
30
25
45
40
35
30
50
45
40
35
ns
ON/OFF Control Input
0.0
3
10
10
10
pF
Control Input = GND
Analog I/O
Feedthrough
5.0
4
4
10
10
10
10
10
10
Maximum Propagation
Delay, Input X to Y
YA = Open
tPLZ,
tPHZ
Maximum Propagation
Delay, ON/OFF Control
to Analog Output
RL = 1000 W
tPZL,
tPZH
Maximum Propagation
Delay, ON/OFF Control
to Analog Output
RL = 1000 W
CIN
Maximum Input
Capacitance
(Figures 7, 14)
(Figures 8, 15)
(Figures 8, 15)
Min
Max
−55°C ≤ TA ≤ 125°C
2.0
3.0
4.5
5.5
Test Conditions
tPLH,
tPHL
Min
TA ≤ 85°C
Min
Typical @ 25°C, VCC = 5.0 V
CPD
18
Power Dissipation Capacitance (Note 6)
pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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4
MC74VHC1GT66
ADDITIONAL APPLICATION CHARACTERISTICS (Voltages Referenced to GND Unless Noted)
Symbol
Parameter
Test Conditions
VCC
Limit 25°C
Unit
BW
Maximum On−Channel Bandwidth
or Minimum Frequency Response
(Figure 10)
fin = 1 MHz Sine Wave
Adjust fin voltage to obtain 0 dBm at VOS
Increase fin = frequency until dB meter reads −3 dB
RL = 50 W
3.0
4.5
5.5
150
175
180
MHz
ISOoff
Off−Channel Feedthrough Isolation
(Figure 11)
fin = Sine Wave
Adjust fin voltage to obtain 0 dBm at VIS
fin = 10 kHz, RL = 600 W
3.0
4.5
5.5
−80
−80
−80
dB
Feedthrough Noise Control to
Switch
(Figure 12)
Vin ≤ 1 MHz Square Wave (tr = tf = 2ns)
3.0
4.5
5.5
45
60
130
mVPP
Total Harmonic Distortion
(Figure 13)
fin = 1 kHz, RL = 10 kW
THD = THDMeasured − THDSource
VIS = 3.0 VPP sine wave
VIS = 5.0 VPP sine wave
NOISEfeed
THD
RL = 600 W
%
3.3
5.5
0.30
0.15
PLOTTER
POWER
SUPPLY
−
COMPUTER
DC PARAMETER
ANALYZER
+
VCC
1
VCC
VCC
5
1
2
5
VIH
2
3
VCC
4
VIL
A
3
Figure 4. On Resistance Test Set−Up
VCC
4
Figure 5. Maximum Off−Channel Leakage Current
Test Set−Up
VCC
A
N/C
1
5
2
3
VCC
1
TEST
POINT
VIH
4
2
3
Figure 6. Maximum On−Channel Leakage Current
Test Set−Up
5
VIH
4
Figure 7. Propagation Delay Test Set−Up
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5
MC74VHC1GT66
Switch to Position 2 when testing tPLZ and tPZL
Switch to Position 1 when testing tPHZ and tPZH
TEST POINT
VCC
VCC
VCC
1
1
RL
2
2
1
VCC
A
5
CL *
3
N/C
1
N/C
2
4
5
3
2
4
*Includes all probe and jig capacitance.
Figure 8. Propagation Delay Output Enable/Disable
Test Set−Up
Figure 9. Power Dissipation Capacitance
Test Set−Up
VOS
VIS
VCC
0.1 mF
fin
1
VOS
VCC
0.1 mF
fin
5
1
2
dB
Meter
2
3
dB
Meter
4
RL
3
*Includes all probe and jig capacitance.
Figure 11. Off−Channel Feedthrough Isolation
Test Set−Up
To Distortion
Meter
(VCC)/2
(VCC)/2
RL
IS
VIS
VCC
RL
1
4
*Includes all probe and jig capacitance.
Figure 10. Maximum On−Channel Bandwidth
Test Set−Up
VOS
5
5
V
IN
RL
v 1 MHz
fin
1
5
VOS
2
t r + t + 2 ns
3
VIH
2
f
4
VCC
0.1 mF
3
GND
*Includes all probe and jig capacitance.
VIH
4
*Includes all probe and jig capacitance.
Figure 12. Feedthrough Noise, ON/OFF Control to
Analog Out, Test Set−Up
Figure 13. Total Harmonic Distortion Test Set−Up
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6
MC74VHC1GT66
XA
VCC
1.5 V
1.5 V
tPLH
YA
tPHL
VOH
50% VCC
VOL
Figure 14. Propagation Delay, Analog In to Analog Out Waveforms
tr
tf
90%
Control
10%
1.5 V
VIH
tPLZ
tPZL
50% VCC
10%
Analog Out
90%
50% VCC
tPHZ
tPZH
High
Impedance
VOL
VOH
High
Impedance
Figure 15. Propagation Delay, ON/OFF Control
ORDERING INFORMATION
Device
Package
M74VHC1GT66DFT1G
SC−88A
(Pb−Free)
MC74VHC1GT66DFT2
SC−88A
M74VHC1GT66DFT2G
SC−88A
(Pb−Free)
MC74VHC1GT66DTT1
TSOP−5
M74VHC1GT66DTT1G
TSOP−5
(Pb−Free)
Shipping†
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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7
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−88A (SC−70−5/SOT−353)
CASE 419A−02
ISSUE L
SCALE 2:1
A
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
G
5
4
−B−
S
1
2
DATE 17 JAN 2013
DIM
A
B
C
D
G
H
J
K
N
S
3
D 5 PL
0.2 (0.008)
B
M
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
J
GENERIC MARKING
DIAGRAM*
C
K
H
XXXMG
G
SOLDER FOOTPRINT
0.50
0.0197
XXX = Specific Device Code
M
= Date Code
G
= Pb−Free Package
0.65
0.025
0.65
0.025
0.40
0.0157
1.9
0.0748
SCALE 20:1
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
mm Ǔ
ǒinches
STYLE 1:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 2:
PIN 1. ANODE
2. EMITTER
3. BASE
4. COLLECTOR
5. CATHODE
STYLE 3:
PIN 1. ANODE 1
2. N/C
3. ANODE 2
4. CATHODE 2
5. CATHODE 1
STYLE 4:
PIN 1. SOURCE 1
2. DRAIN 1/2
3. SOURCE 1
4. GATE 1
5. GATE 2
STYLE 6:
PIN 1. EMITTER 2
2. BASE 2
3. EMITTER 1
4. COLLECTOR
5. COLLECTOR 2/BASE 1
STYLE 7:
PIN 1. BASE
2. EMITTER
3. BASE
4. COLLECTOR
5. COLLECTOR
STYLE 8:
PIN 1. CATHODE
2. COLLECTOR
3. N/C
4. BASE
5. EMITTER
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. ANODE
5. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42984B
STYLE 5:
PIN 1. CATHODE
2. COMMON ANODE
3. CATHODE 2
4. CATHODE 3
5. CATHODE 4
Note: Please refer to datasheet for
style callout. If style type is not called
out in the datasheet refer to the device
datasheet pinout or pin assignment.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
SC−88A (SC−70−5/SOT−353)
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
TSOP−5
CASE 483
ISSUE N
5
1
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE
MINIMUM THICKNESS OF BASE MATERIAL.
4. DIMENSIONS A AND B DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR GATE BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT
EXCEED 0.15 PER SIDE. DIMENSION A.
5. OPTIONAL CONSTRUCTION: AN ADDITIONAL
TRIMMED LEAD IS ALLOWED IN THIS LOCATION.
TRIMMED LEAD NOT TO EXTEND MORE THAN 0.2
FROM BODY.
D 5X
NOTE 5
2X
DATE 12 AUG 2020
0.20 C A B
0.10 T
M
2X
0.20 T
5
B
1
4
2
B
S
3
K
DETAIL Z
G
A
A
TOP VIEW
DIM
A
B
C
D
G
H
J
K
M
S
DETAIL Z
J
C
0.05
H
C
SIDE VIEW
SEATING
PLANE
END VIEW
GENERIC
MARKING DIAGRAM*
SOLDERING FOOTPRINT*
0.95
0.037
MILLIMETERS
MIN
MAX
2.85
3.15
1.35
1.65
0.90
1.10
0.25
0.50
0.95 BSC
0.01
0.10
0.10
0.26
0.20
0.60
0_
10 _
2.50
3.00
1.9
0.074
5
5
XXXAYWG
G
1
1
Analog
2.4
0.094
XXX = Specific Device Code
A
= Assembly Location
Y
= Year
W = Work Week
G
= Pb−Free Package
1.0
0.039
XXX MG
G
Discrete/Logic
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
0.7
0.028
SCALE 10:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98ARB18753C
TSOP−5
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2018
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products
and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information
provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may
vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license
under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems
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