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MC74VHCT541A

MC74VHCT541A

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    MC74VHCT541A - Octal Bus Buffer - ON Semiconductor

  • 数据手册
  • 价格&库存
MC74VHCT541A 数据手册
MC74VHCT541A Octal Bus Buffer The MC74VHCT541A is an advanced high speed CMOS octal bus buffer fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The MC74VHCT541A is a noninverting, 3−state, buffer/line driver/line receiver. When either OE1 or OE2 is high, the terminal outputs are in the high impedance state. The VHCT inputs are compatible with TTL levels. This device can be used as a level converter for interfacing 3.3 V to 5.0 V, because it has full 5.0 V CMOS level output swings. The VHCT541A input and output (when disabled) structures provide protection when voltages between 0 V and 5.5 V are applied, regardless of the supply voltage. These input and output structures help prevent device destruction caused by supply voltage−input/output voltage mismatch, battery backup, hot insertion, etc. Features http://onsemi.com MARKING DIAGRAMS 20 VHCT541A AWLYYWWG 1 1 SOIC−20WB SUFFIX DW CASE 751D • • • • • • • • • • • • High Speed: tPD = 5.4 ns (Typ) at VCC = 5.0 V Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Designed for 4.5 V to 5.5 V Operating Range Low Noise: VOLP = 1.6 V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300 mA ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V Chip Complexity: 134 FETs or 33.5 Equivalent Gates Pb−Free Packages are Available* 20 VHCT 541A ALYWG G 1 1 TSSOP−20 SUFFIX DT CASE 948E 20 SOEIAJ−20 SUFFIX M CASE 967 74VHCT541 AWLYWWG 1 1 A = Assembly Location WL, L = Wafer Lot YY, Y = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) FUNCTION TABLE Inputs Output Y OE1 L L H X OE2 L L X H A L H X X L H Z Z *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2006 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 4 of this data sheet. 1 January, 2006 − Rev. 4 Publication Order Number: MC74VHCT541A/D MC74VHCT541A A1 A2 A3 DATA INPUTS A4 A5 A6 A7 A8 OUTPUT ENABLES OE1 OE2 2 3 4 5 6 7 8 9 1 18 17 16 15 14 13 12 11 Y1 Y2 OE1 Y3 Y4 Y5 Y6 Y7 Y8 NONINVERTING OUTPUTS A1 A2 A3 A4 A5 A6 A7 A8 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE2 Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8 Figure 2. Pin Assignment 19 Figure 1. Logic Diagram ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎ Î Î ÎÎ Î Î ÎÎ Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎ ÎÎ Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Symbol VCC Vin Parameter Value Unit V V V DC Supply Voltage DC Input Voltage – 0.5 to + 7.0 – 0.5 to + 7.0 Vout IIK DC Output Voltage Outputs in 3−State High or Low State – 0.5 to + 7.0 – 0.5 to VCC + 0.5 − 20 ± 20 ± 25 ± 75 500 450 Input Diode Current mA mA mA mA IOK Iout Output Diode Current (VOUT < GND; VOUT > VCC) DC Output Current, per Pin ICC PD DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Storage Temperature SOIC Package† TSSOP Package† mW _C Tstg – 65 to + 150 Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. †Derating − SOIC Packages: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C MAXIMUM RATINGS This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open. RECOMMENDED OPERATING CONDITIONS Symbol VCC Vin Parameter Min 4.5 0 0 0 Max 5.5 5.5 Unit V V V DC Supply Voltage DC Input Voltage Vout TA DC Output Voltage Outputs in 3−State High or Low State 5.5 VCC Operating Temperature − 40 0 + 85 20 _C tr, tf Input Rise and Fall Time VCC =5.0V ±0.5V ns/V http://onsemi.com 2 1. Parameter guaranteed by design. tOSLH = |tPLHm − tPLHn|, tOSHL = |tPHLm − tPHLn|. 2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 8 (per bit). CPD is used to determine the no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC. ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎ Î Î Î ÎÎ Î ÎÎ Î Î Î ÎÎ Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎ Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î ÎÎ Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î Î Î ÎÎ Î Î Î ÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î ÎÎ Î Î ÎÎ Î Î Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎÎ Î Î Î Î ÎÎ Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎ Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎÎ Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î ÎÎ Î Î Î ÎÎ Î Î ÎÎÎ Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î ÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎÎ ÎÎ Î Î ÎÎÎÎ ÎÎ Î ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎ ÎÎ Î Î Î ÎÎ Î Î ÎÎÎÎ Î Î Î ÎÎ Î Î Î ÎÎ Î Î Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎ Î ÎÎ Î Î Î Î Î Î ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ Î ÎÎÎÎÎ Î Î Î Î ÎÎ Î Î Î Î Î ÎÎ Î Î Î Î ÎÎ Î ÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) DC ELECTRICAL CHARACTERISTICS Symbol Symbol tOSLH, tOSHL tPLH, tPHL tPLZ, tPHZ tPZL, tPZH IOPD ICCT VOH Cout CPD VOL VIH ICC IOZ Cin VIL Iin Power Dissipation Capacitance (Note 2) Maximum 3−State Output Capacitance (Output in High Impedance State) Maximum Input Capacitance Output to Output Skew Output Disable Time, OE to Y Output Enable TIme, OE to Y Maximum Propagation Delay, A to Y Output Leakage Current Quiescent Supply Current Maximum Quiescent Supply Current Maximum 3−State Leakage Current Maximum Input Leakage Current Maximum Low−Level Output Voltage Vin = VIH or VIL Minimum High−Level Output Voltage Vin = VIH or VIL Maximum Low−Level Input Voltage Minimum High−Level Input Voltage Parameter Parameter VOUT = 5.5V Per Input: VIN = 3.4V Other Input: VCC or GND Vin = VCC or GND Vin = VIL or VIH Vout = VCC or GND Vin = 5.5 V or GND IOL = 8mA IOL = 50mA IOH = − 8mA IOH = − 50mA Test Conditions VCC = 5.0 ± 0.5V (Note 1) VCC = 5.0 ± 0.5V RL = 1kW VCC = 5.0 ± 0.5V RL = 1kW VCC = 5.0 ± 0.5V NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V) Symbol VOLP VOLV VIHD VILD Maximum Low Level Dynamic Input Voltage Minimum High Level Dynamic Input Voltage Quiet Output Minimum Dynamic VOL Quiet Output Maximum Dynamic VOL Parameter MC74VHCT541A http://onsemi.com Test Conditions CL = 50pF CL = 50pF CL = 15pF CL = 50pF CL = 15pF CL = 50pF 4.5 to 5.5 4.5 to 5.5 0 to 5.5 VCC V 5.5 5.5 5.5 4.5 4.5 4.5 4.5 0 3.94 Min Min 4.4 2.0 TA = 25°C TA = 25°C Typical @ 25°C, VCC = 5.0V Typ Typ 9.4 8.3 8.8 5.0 5.5 0.0 4.5 9 4 ± 0.25 ± 0.1 11.3 12.3 Max 1.35 0.36 Max 11.9 1.0 6.9 7.9 0.5 4.0 0.1 0.8 10 19 −1.2 Typ 1.2 TA = − 40 to 85°C TA = − 40 to 85°C TA = 25°C 3.80 Min Min 1.0 1.0 1.0 1.0 1.0 4.4 2.0 −1.6 Max 0.8 2.0 1.6 ± 2.5 ± 1.0 13.5 13.0 14.0 Max 1.50 40.0 0.44 Max 1.0 8.0 9.0 5.0 0.1 0.8 10 Unit Unit Unit mA mA mA mA mA pF pF pF ns ns ns ns V V V V V V V V 3 MC74VHCT541A ORDERING INFORMATION Device MC74VHCT541ADW MC74VHCT541ADWG MC74VHCT541ADWR2 MC74VHCT541ADWRG MC74VHCT541ADT MC74VHCT541ADTG MC74VHCT541ADTR2 MC74VHCT541ADTRG MC74VHCT541AMEL MC74VHCT541AMELG Package SOIC−20WB SOIC−20WB (Pb−Free) SOIC−20WB SOIC−20WB (Pb−Free) TSSOP−20* TSSOP−20* TSSOP−20* TSSOP−20* SOEIAJ−20 SOEIAJ−20 (Pb−Free) Shipping † 38 Units / Rail 38 Units / Rail 1000 / Tape & Reel 1000 / Tape & Reel 75 Units / Rail 75 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 2000 / Tape & Reel 2000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. 3V 3V tPHL 1.5V GND VOH VOL Y OE1 or OE2 1.5V tPZL Y 1.5V tPZH 1.5V tPHZ tPLZ GND HIGH IMPEDANCE VOL +0.3V VOH −0.3V HIGH IMPEDANCE A tPLH Y 1.5V Figure 3. Switching Waveform Figure 4. Switching Waveform TEST POINT OUTPUT DEVICE UNDER TEST C L* DEVICE UNDER TEST TEST POINT OUTPUT 1 kW CONNECT TO VCC WHEN TESTING tPLZ AND tPZL. CONNECT TO GND WHEN TESTING tPHZ AND tPZH. C L* *Includes all probe and jig capacitance *Includes all probe and jig capacitance Figure 5. Test Circuit Figure 6. Test Circuit http://onsemi.com 4 MC74VHCT541A PACKAGE DIMENSIONS SOIC−20 WB DW SUFFIX CASE 751D−05 ISSUE G D NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A A1 B C D E e H h L q MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0_ 7_ A 11 X 45 _ q H M B M 20 10X 0.25 E 1 10 20X B 0.25 M B TA S B S A SEATING PLANE h 18X e A1 T C TSSOP−20 D5 SUFFIX CASE 948E−02 ISSUE B 20X L K REF M 0.15 (0.006) T U S 0.10 (0.004) TU S V S B L PIN 1 IDENT 1 10 J J1 −U− N 0.15 (0.006) T U S A −V− N F C D 0.100 (0.004) −T− SEATING PLANE G H DETAIL E http://onsemi.com 5 ÍÍÍÍ ÍÍÍÍ ÍÍÍÍ SECTION N−N M DETAIL E 2X L/2 20 11 K K1 0.25 (0.010) NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. MILLIMETERS MIN MAX 6.40 6.60 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.27 0.37 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.252 0.260 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.011 0.015 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ −W− DIM A B C D F G H J J1 K K1 L M MC74VHCT541A PACKAGE DIMENSIONS SOEIAJ−20 M SUFFIX CASE 967−01 ISSUE A 20 11 LE Q1 M_ L DETAIL P E HE 1 10 Z D e VIEW P A c NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). DIM A A1 b c D E e HE L LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.15 0.25 12.35 12.80 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 0.81 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.006 0.010 0.486 0.504 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.032 b 0.13 (0.005) M A1 0.10 (0.004) ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan : ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 MC74VHCT541A/D
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