MC74VHCT86ADT

MC74VHCT86A Product Preview Quad 2−Input XOR Gate / CMOS Logic Level Shifter with LSTTL−Compatible Inputs The MC74VHCT86A is an advanced high speed CMOS 2−input Exclusive−OR gate fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation. The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The device input is compatible with TTL−type input thresholds and the output has a full 5V CMOS level output swing. The input protection circuitry on this device allows overvoltage tolerance on the input, allowing the device to be used as a logic−level translator from 3.0V CMOS logic to 5.0V CMOS Logic or from 1.8V CMOS logic to 3.0V CMOS Logic while operating at the high−voltage power supply. The MC74VHCT86A input structure provides protection when voltages up to 7V are applied, regardless of the supply voltage. This allows it to be used to interface 5V circuits to 3V circuits. The output structures also provide protection when VCC = 0V. These input and output structures help prevent device destruction caused by supply voltage − input/output voltage mismatch, battery backup, hot insertion, etc. http://onsemi.com 14−LEAD SOIC D SUFFIX CASE 751A 14−LEAD TSSOP DT SUFFIX CASE 948G 14−LEAD SOIC EIAJ M SUFFIX CASE 965 PIN CONNECTION AND MARKING DIAGRAM (Top View) VCC 14 B4 13 A4 12 Y4 11 B3 10 A3 9 Y3 8 • • • • • • • • • • w High Speed: tPD = 4.8ns (Typ) at VCC = 5V Low Power Dissipation: ICC = 2μA (Max) at TA = 25°C TTL−Compatible Inputs: VIL = 0.8V; VIH = 2.0V Power Down Protection Provided on Inputs and Outputs Balanced Propagation Delays Designed for 2V to 5.5V Operating Range Low Noise: VOLP = 0.8V (Max) Pin and Function Compatible with Other Standard Logic Families Latchup Performance Exceeds 300mA ESD Performance: HBM > 2000V; Machine Model > 200V These devices are available in Pb−free package(s). Specifications herein apply to both standard and Pb−free devices. Please see our website at www.onsemi.com for specific Pb−free orderable part numbers, or contact your local ON Semiconductor sales office or representative. 1 A1 2 B1 3 Y1 4 A2 5 B2 6 Y2 7 GND For detailed package marking information, see the Marking Diagram section on page 4 of this data sheet. FUNCTION TABLE Inputs A L L H H B L H L H Output Y L H H L ORDERING INFORMATION Device MC74VHCT86AD MC74VHCT86ADT MC74VHCT86AM Package SOIC TSSOP SOIC EIAJ Shipping 55 Units/Rail 96 Units/Rail 50 Units/Rail © Semiconductor Components Industries, LLC, 2006 March, 2006 − Rev. 1 1 Publication Order Number: MC74VHCT86A/D MC74VHCT86A LOGIC DIAGRAM A1 B1 A2 B2 A3 B3 A4 B4 1 2 4 5 9 10 12 13 11 Y4 8 6 Y2 Y = A)B Y3 3 Y1 This document contains information on a product under development. ON Semiconductor reserves the right to change or discontinue this product without notice. Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎÎÎ ÎÎÎ ÎÎ Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î Î Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS* Symbol VCC Vin Vout IIK Parameter Value Unit V V V DC Supply Voltage DC Input Voltage – 0.5 to + 7.0 – 0.5 to + 7.0 DC Output Voltage VCC = 0 High or Low State – 0.5 to + 7.0 – 0.5 to VCC + 0.5 − 20 ± 20 ± 25 ± 50 500 450 Input Diode Current mA mA mA mA IOK Iout PD Output Diode Current (VOUT < GND; VOUT > VCC) DC Output Current, per Pin DC Supply Current, VCC and GND Pins Power Dissipation in Still Air, Storage Temperature ICC SOIC Packages† TSSOP Package† mW _C Tstg – 65 to + 150 * Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute−maximum−rated conditions is not implied. †Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C TSSOP Package: − 6.1 mW/_C from 65_ to 125_C This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high−impedance circuit. For proper operation, Vin and Vout should be constrained to the range GND v (Vin or Vout) v VCC. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V CC ). Unused outputs must be left open. RECOMMENDED OPERATING CONDITIONS Characteristics DC Supply Voltage DC Input Voltage DC Output Voltage VCC = 0 High or Low State VCC = 3.3V ± 0.3V VCC = 5.0V ± 0.5V Symbol VCC VIN VOUT TA tr , tf Min 2.0 0.0 0.0 0.0 −55 0 0 Max 5.5 5.5 5.5 VCC +85 100 20 Unit V V V °C ns/V Operating Temperature Range Input Rise and Fall Time NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 5.0V, Measured in SOIC Package) TA = 25°C Symbol VOLP VOLV VIHD VILD Characteristic Quiet Output Maximum Dynamic VOL Quiet Output Minimum Dynamic VOL Minimum High Level Dynamic Input Voltage Maximum Low Level Dynamic Input Voltage Typ 0.3 − 0.3 Max 0.8 − 0.8 3.5 1.5 Unit V V V V http://onsemi.com 2 MC74VHCT86A DC ELECTRICAL CHARACTERISTICS VCC Symbol VIH Parameter Minimum High−Level Input Voltage Maximum Low−Level Input Voltage Minimum High−Level Output Voltage VIN = VIH or VIL VIN = VIH or VIL IOH = −50μA VIN = VIH or VIL IOH = −4mA IOH = −8mA VIN = VIH or VIL IOL = 50μA VIN = VIH or VIL IOL = 4mA IOL = 8mA VIN = 5.5V or GND VIN = VCC or GND Input: VIN = 3.4V VOUT = 5.5V Test Conditions (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 3.0 4.5 3.0 4.5 3.0 4.5 0 to 5.5 5.5 5.5 0.0 2.9 4.4 2.58 3.94 0.0 0.0 0.1 0.1 0.36 0.36 ±0.1 2.0 1.35 0.5 3.0 4.5 Min 1.2 2.0 2.0 0.53 0.8 0.8 2.9 4.4 2.48 3.80 0.1 0.1 0.44 0.44 ±1.0 20 1.50 5.0 TA = 25°C Typ Max TA ≤ 85°C Min 1.2 2.0 2.0 0.53 0.8 0.8 2.9 4.4 2.34 3.66 0.1 0.1 0.52 0.52 ±1.0 40 1.65 10 Max TA ≤ 125°C Min 1.2 2.0 2.0 0.53 0.8 0.8 Max Unit V VIL V VOH V V VOL Maximum Low−Level Output Voltage VIN = VIH or VIL V V IIN ICC ICCT IOPD Maximum Input Leakage Current Maximum Quiescent Supply Current Quiescent Supply Current Output Leakage Current μA μA mA μA ÎÎ Î Î Î Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎ ÎÎ Î Î ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î Î ÎÎ Î Î Î Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î ÎÎ ÎÎ Î ÎÎ Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î ÎÎ ÎÎ Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î Î ÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0ns) Symbol tPLH, tPHL Parameter TA = 25°C Typ 7.0 9.5 4.8 6.3 4 TA = − 40 to 85°C Min 1.0 1.0 1.0 1.0 Max 13.0 16.5 Test Conditions Min Max Unit ns Propagation Delay, A or B to Y VCC = 3.3 ± 0.3V VCC = 5.0 ± 0.5V CL = 15pF CL = 50pF CL = 15pF CL = 50pF 11.0 14.5 6.8 8.8 10 8.0 10.0 10 Cin Input Capacitance pF Typical @ 25°C, VCC = 5.0V TEST POINT A or B 3.0V 50% GND tPLH Y 50% VCC tPHL VOH VOL *Includes all probe and jig capacitance DEVICE UNDER TEST OUTPUT CL* 18 CPD Power Dissipation Capacitance (Note 1) pF 1. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD  VCC  fin + ICC / 4 (per gate). CPD is used to determine the no−load dynamic power consumption; PD = CPD  VCC2  fin + ICC  VCC. Figure 1. Switching Waveforms Figure 2. Test Circuit http://onsemi.com 3 MC74VHCT86A MARKING DIAGRAMS (Top View) 14 13 12 11 10 9 8 14 13 12 11 10 9 8 VHCT86A AWLYWW* 1 2 3 4 5 6 7 1 2 3 VHCT 86A ALYW* 4 5 6 7 14−LEAD SOIC D SUFFIX CASE 751A 14 13 12 11 10 9 8 14−LEAD TSSOP DT SUFFIX CASE 948G VHCT86A AWLYWW* 1 2 3 4 5 6 7 14−LEAD SOIC EIAJ M SUFFIX CASE 965 *See Applications Note #AND8004/D for date code and traceability information. http://onsemi.com 4 MC74VHCT86A PACKAGE DIMENSIONS D SUFFIX PLASTIC SOIC PACKAGE CASE 751A−03 ISSUE F − A− 14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. − B− 1 7 P 7 PL 0.25 (0.010) M B M G C R X 45° F SEATING PLANE D 14 PL 0.25 (0.010) M K T B S M A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.75 8.55 4.00 3.80 1.75 1.35 0.49 0.35 1.25 0.40 1.27 BSC 0.25 0.19 0.25 0.10 7° 0° 6.20 5.80 0.50 0.25 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0° 7° 0.228 0.244 0.010 0.019 http://onsemi.com 5 MC74VHCT86A PACKAGE DIMENSIONS DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948G−01 ISSUE O 14X K REF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. DIMENSION K DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE K DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 7. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE −W−. DIM A B C D F G H J J1 K K1 L M MILLIMETERS MIN MAX 4.90 5.10 4.30 4.50 −−− 1.20 0.05 0.15 0.50 0.75 0.65 BSC 0.50 0.60 0.09 0.20 0.09 0.16 0.19 0.30 0.19 0.25 6.40 BSC 0_ 8_ INCHES MIN MAX 0.193 0.200 0.169 0.177 −−− 0.047 0.002 0.006 0.020 0.030 0.026 BSC 0.020 0.024 0.004 0.008 0.004 0.006 0.007 0.012 0.007 0.010 0.252 BSC 0_ 8_ 0.10 (0.004) 0.15 (0.006) T U S M TU S V N S 2X L/2 14 8 0.25 (0.010) M L PIN 1 IDENT. 1 7 B − U− N F DETAIL E K K1 J J1 0.15 (0.006) T U S A −V− C 0.10 (0.004) −T− SEATING PLANE D G H DETAIL E http://onsemi.com 6 ÉÉÇ ÇÇ ÉÉÇ ÇÇ SECTION N−N −W− MC74VHCT86A PACKAGE DIMENSIONS M SUFFIX PLASTIC SOIC EIAJ PACKAGE CASE 965−01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS AND ARE MEASURED AT THE PARTING LINE. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 5. THE LEAD WIDTH DIMENSION (b) DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 (0.003) TOTAL IN EXCESS OF THE LEAD WIDTH DIMENSION AT MAXIMUM MATERIAL CONDITION. DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OR THE FOOT. MINIMUM SPACE BETWEEN PROTRUSIONS AND ADJACENT LEAD TO BE 0.46 ( 0.018). 14 8 LE Q1 E HE M_ L DETAIL P 1 7 Z D e A VIEW P c b 0.13 (0.005) M A1 0.10 (0.004) DIM A A1 b c D E e HE 0.50 LE M Q1 Z MILLIMETERS MIN MAX −−− 2.05 0.05 0.20 0.35 0.50 0.18 0.27 9.90 10.50 5.10 5.45 1.27 BSC 7.40 8.20 0.50 0.85 1.10 1.50 10 _ 0_ 0.70 0.90 −−− 1.42 INCHES MIN MAX −−− 0.081 0.002 0.008 0.014 0.020 0.007 0.011 0.390 0.413 0.201 0.215 0.050 BSC 0.291 0.323 0.020 0.033 0.043 0.059 10 _ 0_ 0.028 0.035 −−− 0.056 http://onsemi.com 7 MC74VHCT86A Notes ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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