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MCR12DG

MCR12DG

  • 厂商:

    ONSEMI(安森美)

  • 封装:

    TO-220-3

  • 描述:

    SILICON CONTROLLED RECTIFIER, 12

  • 数据手册
  • 价格&库存
MCR12DG 数据手册
MCR12DG, MCR12MG, MCR12NG Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half-wave ac control applications, such as motor controls, heating controls, and power supplies; or wherever half−wave silicon gate−controlled devices are needed. www.onsemi.com SCRs 12 AMPERES RMS 400 thru 800 VOLTS Features • • • • • • • • Blocking Voltage to 800 Volts On−State Current Rating of 12 Amperes RMS at 80°C High Surge Current Capability − 100 Amperes Rugged, Economical TO−220AB Package Glass Passivated Junctions for Reliability and Uniformity Minimum and Maximum Values of IGT, VGT an IH Specified for Ease of Design High Immunity to dv/dt − 100 V/msec Minimum at 125°C These are Pb−Free Devices G A K MARKING DIAGRAM AY WW MCR12xG AKA MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) MCR12DG MCR12MG MCR12NG VDRM, VRRM On-State RMS Current (180° Conduction Angles; TC = 80°C) IT(RMS) 12 A Peak Non-repetitive Surge Current (1/2 Cycle, Sine Wave 60 Hz, TJ = 125°C) ITSM 100 A Circuit Fusing Consideration (t = 8.33 ms) I2t 41 A2sec PGM 5.0 W Forward Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) Value Unit V PG(AV) 0.5 W Average On-State Current (180° Conduction Angles; TC = 80°C) IT(AV) 7.8 A Forward Peak Gate Current (Pulse Width ≤ 1.0 ms, TC = 90°C) IGM 2.0 A Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. January, 2015 − Rev. 6 2 1 TO−220 CASE 221A−09 STYLE 3 3 400 600 800 Forward Average Gate Power (t = 8.3 ms, TC = 80°C) © Semiconductor Components Industries, LLC, 2015 1 A Y WW x G AKA = Assembly Location = Year = Work Week = D, M, or N = Pb−Free Package = Diode Polarity PIN ASSIGNMENT 1 Cathode 2 Anode 3 Gate 4 Anode ORDERING INFORMATION Package Shipping MCR12DG Device TO−220AB (Pb−Free) 50 Units / Rail MCR12MG TO−220AB (Pb−Free) 50 Units / Rail MCR12NG TO−220AB (Pb−Free) 50 Units / Rail Publication Order Number: MCR12/D MCR12DG, MCR12MG, MCR12NG THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Junction−to−Case Junction−to−Ambient Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds Symbol Value Unit RqJC RqJA 2.2 62.5 °C/W TL 260 °C ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max − − − − 0.01 2.0 Unit OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (VD = Rated VDRM and VRRM; Gate Open) IDRM, IRRM TJ = 25°C TJ = 125°C mA ON CHARACTERISTICS Peak Forward On−State Voltage (Note 2) (ITM = 24 A) VTM − − 2.2 V Gate Trigger Current (Continuous dc) (VD = 12 V; RL = 100 W) IGT 2.0 8.0 20 mA Holding Current (VD = 12 V, Gate Open, Initiating Current = 200 mA) IH 4.0 20 40 mA Latch Current (VD = 12 V, IG = 20 mA) IL 6.0 25 60 mA VGT 0.5 0.65 1.0 V Critical Rate of Rise of Off−State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125°C) dv/dt 100 250 − V/ms Repetitive Critical Rate of Rise of On−State Current IPK = 50 A, Pw = 40 msec, diG/dt = 1 A/msec, Igt = 50 mA di/dt − − 50 A/ms Gate Trigger Voltage (Continuous dc) (VD = 12 V; RL =100 W) DYNAMIC CHARACTERISTICS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 2. Indicates Pulse Test: Pulse Width v 2.0 ms, Duty Cycle v 2%. Voltage Current Characteristic of SCR Symbol Parameter VDRM Peak Repetitive Off State Forward Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Off State Reverse Voltage IRRM Peak Reverse Blocking Current VTM Peak On State Voltage IH Holding Current + Current VTM on state IH IRRM at VRRM + Voltage IDRM at VDRM Reverse Blocking Region (off state) Forward Blocking Region (off state) P(AV) , AVERAGE POWER DISSIPATION (WATTS) Reverse Avalanche Region Anode − TC , CASE TEMPERATURE (° C) 125 120 115 110 105 dc 100 95 30° 60° 90° 180° 90 0 1 Anode + 6 7 8 9 10 11 2 3 4 5 IT(RMS), RMS ON−STATE CURRENT (AMPS) 12 20 18 180° 16 14 90° 12 10 30° 8 6 4 2 0 0 Figure 1. Typical RMS Current Derating 6 7 1 2 4 5 3 8 9 10 11 12 IT(AV), AVERAGE ON−STATE CURRENT (AMPS) Figure 2. On−State Power Dissipation www.onsemi.com 2 dc 100 20 MAXIMUM @ TJ = 25°C 18 GATE TRIGGER CURRENT (mA) I T, INSTANTANEOUS ON-STATE CURRENT (AMPS) MCR12DG, MCR12MG, MCR12NG MAXIMUM @ TJ = 125°C 10 1 14 12 10 8 6 4 2 0 −40 −25 −10 0.1 0.5 1.0 1.5 2.0 2.5 3.0 5 20 35 50 65 80 95 110 125 VT, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS) TJ, JUNCTION TEMPERATURE (°C) Figure 3. Typical On−State Characteristics Figure 4. Typical Gate Trigger Current versus Junction Temperature 1.0 VGT, GATE TRIGGER VOLTAGE (VOLTS) 100 10 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 5 −40 −25 −10 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) 1 −40 −25 −10 20 35 50 65 80 95 110 125 5 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Typical Holding Current versus Junction Temperature Figure 6. Typical Gate Trigger Voltage versus Junction Temperature 100 IL , LATCHING CURRENT (mA) IH, HOLDING CURRENT (mA) 16 10 1 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) Figure 7. Typical Latching Current versus Junction Temperature www.onsemi.com 3 MCR12DG, MCR12MG, MCR12NG PACKAGE DIMENSIONS TO−220 CASE 221A−09 ISSUE AH −T− B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V J NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. G D INCHES MIN MAX 0.570 0.620 0.380 0.415 0.160 0.190 0.025 0.038 0.142 0.161 0.095 0.105 0.110 0.161 0.014 0.024 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 ----0.080 MILLIMETERS MIN MAX 14.48 15.75 9.66 10.53 4.07 4.83 0.64 0.96 3.61 4.09 2.42 2.66 2.80 4.10 0.36 0.61 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 ----2.04 N STYLE 3: PIN 1. 2. 3. 4. CATHODE ANODE GATE ANODE ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 4 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative MCR12/D
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