MCR16N

MCR16N Preferred Device Silicon Controlled Rectifiers Reverse Blocking Thyristors Designed primarily for half−wave ac control applications, such as motor controls, heating controls, and power supplies; or wherever half−wave, silicon gate−controlled devices are needed. http://onsemi.com Features • • • • • • • • SCRs 16 AMPERES RMS 800 VOLTS Blocking Voltage to 800 Volts On−State Current Rating of 16 Amperes RMS High Surge Current Capability − 160 Amperes Rugged Economical TO−220AB Package Glass Passivated Junctions for Reliability and Uniformity Minimum and Maximum Values of IGT, VGT, and IH Specified for Ease of Design High Immunity to dv/dt − 100 V/msec Minimum at 125°C Pb−Free Package is Available* G A K MARKING DIAGRAM MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Symbol Peak Repetitive Off−State Voltage (Note 1) (TJ = −40 to 125°C, Sine Wave, 50 to 60 Hz, Gate Open) MCR16N VDRM, VRRM On-State RMS Current (180° Conduction Angles; TC = 80°C) IT(RMS) 16 ITSM 160 A I2t 106 A2sec PGM 5.0 W PG(AV) 0.5 W Forward Peak Gate Current (Pulse Width ≤ 1.0 ms, TC = 80°C) IGM 2.0 A Operating Junction Temperature Range TJ −40 to +125 °C Storage Temperature Range Tstg −40 to +150 °C Peak Non-repetitive Surge Current (1/2 Cycle, Sine Wave 60 Hz, TJ = 125°C) Circuit Fusing Consideration (t = 8.3 ms) Forward Peak Gate Power (Pulse Width ≤ 1.0 ms, TC = 80°C) Forward Average Gate Power (t = 8.3 ms, TC = 80°C) Value Unit 800 A Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. VDRM and VRRM for all types can be applied on a continuous basis. Ratings apply for zero or negative gate voltage; positive gate voltage shall not be applied concurrent with negative potential on the anode. Blocking voltages shall not be tested with a constant current source such that the voltage ratings of the devices are exceeded. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2005 December, 2005 − Rev. 4 AY WW MCR16NG AKA V 1 1 2 TO−220AB CASE 221A−09 STYLE 3 3 A Y WW G AKA = Assembly Location = Year = Work Week = Pb−Free Package = Diode Polarity PIN ASSIGNMENT 1 Cathode 2 Anode 3 Gate 4 Anode ORDERING INFORMATION Device Package Shipping MCR16N TO−220AB 50 Units / Rail MCR16NG TO−220AB (Pb−Free) 50 Units / Rail Preferred devices are recommended choices for future use and best overall value. Publication Order Number: MCR16/D MCR16N THERMAL CHARACTERISTICS Characteristic Thermal Resistance, Symbol Value Unit RqJC RqJA 1.5 62.5 °C/W TL 260 °C Junction−to−Case Junction−to−Ambient Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 10 Seconds ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Characteristic Symbol Min Typ Max Unit IDRM, IRRM − − − − 0.01 2.0 mA Peak Forward On−State Voltage (Note 2) (ITM = 32 A) VTM − − 1.7 V Gate Trigger Current (Continuous dc) (VD = 12 V, RL = 100 W) IGT 2.0 10 20 mA Gate Trigger Voltage (Continuous dc) (VD = 12 V, RL = 100 W) VGT 0.5 0.65 1.0 V Hold Current (Anode Voltage = 12 V, Initiating Current = 200 mA, Gate Open) IH 4.0 25 40 mA Latch Current (VD = 12 V, Ig = 200 mA) IL − 30 60 mA Critical Rate of Rise of Off−State Voltage (VD = Rated VDRM, Exponential Waveform, Gate Open, TJ = 125°C) dv/dt 100 300 − V/ms Critical Rate of Rise of On−State Current (IPK = 50 A, Pw = 30 ms, diG/dt = 1 A/msec, Igt = 50 mA) di/dt − − 50 A/ms OFF CHARACTERISTICS Peak Repetitive Forward or Reverse Blocking Current (VAK = Rated VDRM or VRRM, Gate Open) TJ = 25°C TJ = 125°C ON CHARACTERISTICS DYNAMIC CHARACTERISTICS 2. Indicates Pulse Test: Pulse Width v 2.0 ms, Duty Cycle v 2%. Voltage Current Characteristic of SCR + Current Anode + VTM Symbol Parameter VDRM Peak Repetitive Off State Forward Voltage IDRM Peak Forward Blocking Current VRRM Peak Repetitive Off State Reverse Voltage IRRM Peak Reverse Blocking Current VTM Peak On State Voltage IH Holding Current on state IRRM at VRRM Reverse Blocking Region (off state) Reverse Avalanche Region Anode − http://onsemi.com 2 IH + Voltage IDRM at VDRM Forward Blocking Region (off state) P(AV), AVERAGE POWER DISSIPATION (WATTS) MCR16N TC, CASE TEMPERATURE (° C) 130 α 120 α = CONDUCTION ANGLE 110 100 90 dc 80 0 2 4 α = 30° 60° 90° 6 8 10 180° 12 14 180° α 24 α = CONDUCTION ANGLE 90° 60° dc α = 30° 16 8 0 0 16 2 4 6 8 10 12 14 IT(RMS), ITRMS ON−STATE CURRENT (AMPS) IT(AV), AVERAGE ON−STATE CURRENT (AMPS) Figure 1. Typical RMS Current Derating Figure 2. On State Power Dissipation R(t) TRANSIENT THERMAL R (NORMALIZED) 100 Typical @ TJ = 25°C Maximum @ TJ = 125°C 10 16 1 ZqJC(t) = RqJC(t) ⋅ r(t) 0.1 0.01 0.1 1 10 100 1⋅104 1000 t, TIME (ms) Maximum @ TJ = 25°C Figure 4. Transient Thermal Response 100 1 IH, HOLDING CURRENT (mA) I T , INSTANTANEOUS ON−STATE CURRENT (AMPS) 32 10 1 0.1 0.5 1.3 1.7 2.1 0.9 VT, INSTANTANEOUS ON−STATE VOLTAGE (VOLTS) −40 −25 −10 2.5 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) Figure 5. Typical Holding Current versus Junction Temperature Figure 3. Typical On−State Characteristics http://onsemi.com 3 MCR16N 30 GATE TRIGGER CURRENT (mA) IL , LATCHING CURRENT (mA) 100 10 1 20 15 10 5 0 −40 −25 −10 5 20 35 50 65 80 95 110 125 −40 −25 −10 5 20 35 50 65 80 95 110 125 TJ, JUNCTION TEMPERATURE (°C) TJ, JUNCTION TEMPERATURE (°C) Figure 6. Typical Latching Current versus Junction Temperature Figure 7. Typical Gate Trigger Current versus Junction Temperature 160 I TSM , PEAK SURGE CURRENT (AMP) 1.0 V GT, GATE TRIGGER VOLTAGE (VOLTS) 25 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 −40 −25 −10 5 20 35 50 65 80 95 1 Cycle 150 140 130 120 110 TJ = 125°C f = 60 Hz 100 90 110 125 1 2 3 4 5 6 7 8 TJ, JUNCTION TEMPERATURE (°C) NUMBER OF CYCLES Figure 8. Typical Gate Trigger Voltage versus Junction Temperature Figure 9. Maximum Non−Repetitive Surge Current http://onsemi.com 4 9 10 MCR16N PACKAGE DIMENSIONS TO−220AB CASE 221A−09 ISSUE AA −T− B SEATING PLANE C F T S 4 DIM A B C D F G H J K L N Q R S T U V Z A Q 1 2 3 U H K Z L R V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND LEAD IRREGULARITIES ARE ALLOWED. J G D N INCHES MIN MAX 0.570 0.620 0.380 0.405 0.160 0.190 0.025 0.035 0.142 0.147 0.095 0.105 0.110 0.155 0.018 0.025 0.500 0.562 0.045 0.060 0.190 0.210 0.100 0.120 0.080 0.110 0.045 0.055 0.235 0.255 0.000 0.050 0.045 −−− −−− 0.080 STYLE 3: PIN 1. 2. 3. 4. MILLIMETERS MIN MAX 14.48 15.75 9.66 10.28 4.07 4.82 0.64 0.88 3.61 3.73 2.42 2.66 2.80 3.93 0.46 0.64 12.70 14.27 1.15 1.52 4.83 5.33 2.54 3.04 2.04 2.79 1.15 1.39 5.97 6.47 0.00 1.27 1.15 −−− −−− 2.04 CATHODE ANODE GATE ANODE ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: N. American Technical Support: 800−282−9855 Toll Free Literature Distribution Center for ON Semiconductor USA/Canada P.O. Box 61312, Phoenix, Arizona 85082−1312 USA Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Fax: 480−829−7709 or 800−344−3867 Toll Free USA/Canada Phone: 81−3−5773−3850 Email: orderlit@onsemi.com http://onsemi.com 5 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. MCR16/D