DATA SHEET
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Integrated Relay,
Inductive Load Driver
Relay, Inductive Load Driver
MARKING DIAGRAMS
MDC3105
This device is intended to replace an array of three to six discrete
components with an integrated SMT part. It is available in a SOT−23
package. It can be used to switch 3 to 6 Vdc inductive loads such as
relays, solenoids, incandescent lamps, and small DC motors without
the need of a free−wheeling diode.
SOT−23
CASE 318
STYLE 6
1
JW M G
G
1
Features
• Provides a Robust Driver Interface between DC Relay Coil and
•
•
•
•
•
•
•
•
•
•
Sensitive Logic Circuits
Optimized to Switch Relays from a 3.0 V to 5.0 V Rail
Capable of Driving Relay Coils Rated up to 2.5 W at 5.0 V
Features Low Input Drive Current and Good Back−to−Front Transient
Isolation
Internal Zener Eliminates Need for Free−Wheeling Diode
Internal Zener Clamp Routes Induced Current to Ground for Quieter
System Operation
Guaranteed Off State with No Input Connection
Supports Large Systems with Minimal Off−State Leakage
ESD Resistant in Accordance with the Class 1C Human Body Model
Low Sat Voltage Reduces System Current Drain by Allowing Use of
Higher Resistance Relay Coils
These Devices are Pb−Free and Halide Free
6
1
JW
M
G
SC−74
CASE 318F
STYLE 8
JW M G
G
1
= Specific Device Code
= Date Code*
= Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or overbar may
vary depending upon manufacturing location.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Applications
• Telecom: Line Cards, Modems, Answering Machines, FAX
Machines, Feature Phone Electronic Hook Switch
• Computer and Office: Photocopiers, Printers, Desktop Computers
• Consumer: TVs and VCRs, Stereo Receivers, CD Players, Cassette
•
•
Recorders, TV Set Top Boxes
Industrial: Small Appliances, White Goods, Security Systems,
Automated Test Equipment, Garage Door Openers
Automotive: 5.0 V Driven Relays, Motor Controls, Power Latches,
Lamp Drivers
© Semiconductor Components Industries, LLC, 2003
March, 2022 − Rev. 9
1
Publication Order Number:
MDC3105/D
MDC3105
INTERNAL CIRCUIT DIAGRAMS
Vout
Vin
(3)
1.0 k
6.6 V
(1)
33 k
GND
(2)
CASE 318
Vout
Vin
(6)
Vout
(3)
1.0 k
1.0 k
Vin
6.6 V 6.6 V
(5)
33 k
33 k
GND
(1)
GND
(2)
(4)
CASE 318F
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Power Supply Voltage
Symbol
Value
Unit
VCC
6.0
Vdc
Input Voltage
Vin(fwd)
6.0
Vdc
Reverse Input Voltage
Vin(rev)
−0.5
Vdc
Ezpk
50
mJ
IO
500
mA
Repetitive Pulse Zener Energy Limit (Duty Cycle ≤ 0.01%)
SOT−23
Output Sink Current − Continuous
Junction Temperature
TJ
150
°C
Operating Ambient Temperature Range
TA
−40 to +85
°C
Storage Temperature Range
Tstg
−65 to +150
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
THERMAL CHARACTERISTICS
Symbol
Value
Unit
Total Device Power Dissipation (Note 1)
Derate above 25°C
Rating
SOT−23
PD
225
1.8
mW
mW/°C
Total Device Power Dissipation (Note 1)
Derate above 25°C
SC−74
PD
380
1.5
mW
mW/°C
SOT−23
SC−74
RqJA
556
329
°C/W
Thermal Resistance Junction−to−Ambient
1. FR−5 PCB of 1″ x 0.75″ x 0.062″, TA = 25°C.
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2
MDC3105
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
V(BRout)
V(−BRout)
6.2
−
6.6
−0.7
7.0
−
V
V
−
−
−
−
0.1
30
−
−
0.4
−
0.8
1.6
−
0.12
0.16
250
400
−
OFF CHARACTERISTICS
Output Zener Breakdown Voltage
(@ IT = 10 mA Pulse)
Output Leakage Current @ 0 Input Voltage
(VO = 5.5 Vdc, Vin = O.C., TA = 25°C)
(VO = 5.5 Vdc, Vin = O.C., TA = 85°C)
IOO
Vin(off)
Guaranteed “OFF” State Input Voltage (IO ≤ 100 mA)
mA
V
ON CHARACTERISTICS
Input Bias Current (HFE Limited)
(IO = 250 mA, VO = 0.25 Vdc)
Iin
Output Saturation Voltage
(IO = 250 mA, Iin = 1.5 mA)
VO(sat)
Output Sink Current − Continuous
(VCE = 0.25 Vdc, Iin = 1.5 mA)
IO(on)
mAdc
Vdc
mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
TYPICAL APPLICATION−DEPENDENT SWITCHING PERFORMANCE
SWITCHING CHARACTERISTICS
Characteristic
Symbol
Min
Typ
Max
tPHL
tPLH
−
−
55
430
−
−
High to Low Propagation Delay; Figures 1, 13 (3.0 V 74HC04)
Low to High Propagation Delay; Figures 1, 13 (3.0 V 74HC04)
tPHL
tPLH
−
−
85
315
−
−
High to Low Propagation Delay; Figures 1, 14 (5.0 V 74LS04)
Low to High Propagation Delay; Figures 1, 14 (5.0 V 74LS04)
tPHL
tPLH
−
−
55
2.4
−
−
tf
tr
−
−
45
160
−
−
Fall Time; Figures 1, 13 (3.0 V 74HC04)
Rise Time; Figures 1, 13 (3.0 V 74HC04)
tf
tr
−
−
70
195
−
−
Fall Time; Figures 1, 14 (5.0 V 74LS04)
Rise Time; Figures 1, 14 (5.0 V 74LS04)
tf
tr
−
−
45
2.4
−
−
Propagation Delay Times:
High to Low Propagation Delay; Figure 1 (5.0 V 74HC04)
Low to High Propagation Delay; Figure 1 (5.0 V 74HC04)
Transition Times:
Fall Time; Figure 1 (5.0 V 74HC04)
Rise Time; Figure 1 (5.0 V 74HC04)
VCC
Vin
50%
GND
tPLH
tPHL
VCC
90%
50%
10%
Vout
VZ
GND
tr
tf
Figure 1. Switching Waveforms
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3
Units
nS
mS
nS
mS
MDC3105
TYPICAL PERFORMANCE CHARACTERISTICS
(ON CHARACTERISTICS)
5.0
450
400
25°C
350
300
250
-40°C
200
150
100
100
3.5
MC74HC04
@ 3.0 Vdc
2.5
2.0
MC68HC05C8 @ 3.3 Vdc
MC14049B @ 4.5 Vdc
1.5
MC54LS04
+BAL99LT1
0
1000
0.5
TJ = 25°C
VO = 0.25 V
1.0
1.5
IO, OUTPUT SINK CURRENT (mA)
2.5
3.0
4.0
3.5
Figure 3. Input V−I Requirement Compared to
Possible Source Logic Outputs
50
500
Iin = 1.5 mA
40
Iout , OUTPUT CURRENT (mA)
45
OUTPUT CURRENT (mA)
2.0
INPUT CURRENT (mA)
Figure 2. Transistor DC Current Gain
TJ = 85°C
35
30
25°C
25
20
-40°C
15
10
1.2 mA
1.0 mA
400
0.8 mA
300
0.6 mA
200
0.4 mA
0.2 mA
100
0.1 mA
5.0
0
0
0
0.01 0.02 0.03 0.04
0.05 0.06 0.07 0.08
0.09
0.1
0
Figure 4. Threshold Effects
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
VO, OUTPUT VOLTAGE (Vdc)
INPUT CURRENT (mA)
Figure 5. Transistor Output V−I Characteristic
8.5
TJ = 25°C
VZ , ZENER CLAMP VOLTAGE (VOLTS)
Vout , OUTPUT VOLTAGE (Vdc)
MDC3105LT1
Vin vs. Iin
3.0
0.5
0
0
10
MC68HC05C8
@ 5.0 Vdc
4.0
1.0
VO = 1.0 V
VO = 0.25 V
50
1.0
MC74HC04
@ 4.5 Vdc
4.5
TJ = 85°C
INPUT VOLTAGE (VOLTS)
HFE, TRANSISTOR DC CURRENT GAIN
500
TJ = -40°C
Iout =
500 mA
10 mA
0.04
0.1
50 mA
125 mA
175 mA
350 mA
8.0
7.5
7.0
TJ = 85°C
25°C
6.5
-40°C
6.0
1.0
10
1.0
Iin, INPUT CURRENT (mA)
10
100
1000
IZ, ZENER CURRENT (mA)
Figure 6. Output Saturation Voltage versus
Iout/Iin
Figure 7. Zener Clamp Voltage versus Zener
Current
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4
MDC3105
TYPICAL PERFORMANCE CHARACTERISTICS
(OFF CHARACTERISTICS)
100 k
10,000 k
TJ = 25°C
VCC = 5.5 Vdc
100 k
Vin = 0.35 Vdc
10 k
1.0 k
100
Vin = 0 Vdc
10
1.0
-55
Vin = 0.5 Vdc
10 k
Vin = 0.5 Vdc
OUTPUT LEAKAGE CURRENT (nA)
OUTPUT LEAKAGE CURRENT (nA)
1000 k
1.0 k
100
Vin = 0.35 Vdc
10
Vin = 0 Vdc
1.0
0
-35
-15
5.0
45
25
TJ, JUNCTION TEMPERATURE (°C)
65
0
85
Figure 8. Output Leakage Current versus
Temperature
1.0
4.0
5.0
2.0
3.0
VCC, SUPPLY VOLTAGE (Vdc)
6.0
7.0
Figure 9. Output Leakage Current versus
Supply Voltage
1.0
Iout(max) = 500 mA
RCE(sat)
*24 ms
°PW = 7.0 ms
DC = 5%
°PW = 10 ms
DC = 20%
TA = 25°C
° = TRANSISTOR PC THERMAL LIMIT
* = MAX L/R FROM ZENER PULSED ENERGY LIMIT
(REFER TO FIGURE 11)
°PW = 0.1 s
DC = 50%
*34 ms
*90 ms
°CONTINUOUS DUTY
0.1
*232 ms
*375 ms
VCC(max) = +6.0 Vdc
TYPICAL
IZ vs VZ
0.01
0.1
1.0
Vout (VOLTS)
Figure 10. Safe Operating Area for MDC3105LT1
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5
10
MDC3105
100 k
TA = 25°C
Emax = 50 mJ
L/R = 2 * Emax ÷ (Vzpk * Izpk)
MAX L/R TIME CONSTANT (ms)
10 k
1.0 k
100
10
0.001
0.01
1.0
0.1
Izpk (AMPS)
Figure 11. Zener Repetitive Pulse Energy Limit
on L/R Time Constant for MDC3105LT1
r(t), TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
1.0
D = 0.5
0.2
0.1
0.1
0.05
Pd(pk)
0.02
0.01
0.01
PW
t1
t2
SINGLE PULSE
PERIOD
DUTY CYCLE = t1/t2
0.001
0.01
0.1
1.0
10
100
t1, PULSE WIDTH (ms)
1000
10,000
100,000
1,000,000
Figure 12. Transient Thermal Response for MDC3105LT1
Using TTR Designing for Pulsed Operation
of the repetitive pulse train. Thus, a continuous rating of 200
mW of dissipation is increased to 1.0 W peak for a 20% duty
cycle pulse train. However, this only holds true for pulse
widths which are short compared to the thermal time
For a repetitive pulse operating condition, time averaging
allows one to increase a device’s peak power dissipation
rating above the average rating by dividing by the duty cycle
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6
MDC3105
Also note that these calculations assume a rectangular
pulse shape for which the rise and fall times are insignificant
compared to the pulse width. If this is not the case in a
specific application, then the VO and IO waveforms should
be multiplied together and the resulting power waveform
integrated to find the total dissipation across the device. This
then would be the number that has to be less than or equal to
the Pd(pk) calculated above. A circuit simulator having a
waveform calculator may prove very useful for this purpose.
constant of the semiconductor device to which they are
applied.
For pulse widths which are significant compared to the
thermal time constant of the device, the peak operating
condition begins to look more like a continuous duty
operating condition over the time duration of the pulse. In
these cases, the peak power dissipation rating cannot be
merely time averaged by dividing the continuous power
rating by the duty cycle of the pulse train. Instead, the
average power rating can only be scaled up a reduced
amount in accordance with the device’s transient thermal
response, so that the device’s max junction temperature is
not exceeded.
Figure 12 of the MDC3105 data sheet plots its transient
thermal resistance, r(t) as a function of pulse width in ms for
various pulse train duty cycles as well as for a single pulse
and illustrates this effect. For short pulse widths near the left
side of the chart, r(t), the factor, by which the continuous
duty thermal resistance is multiplied to determine how much
the peak power rating can be increased above the average
power rating, approaches the duty cycle of the pulse train,
which is the expected value. However, as the pulse width is
increased, that factor eventually approaches 1.0 for all duty
cycles indicating that the pulse width is sufficiently long to
appear as a continuous duty condition to this device. For the
MDC3105LT1, this pulse width is about 100 seconds. At
this and larger pulse widths, the peak power dissipation
capability is the same as the continuous duty power
capability.
To use Figure 12 to determine the peak power rating for
a specific application, enter the chart with the worst case
pulse condition, that is the max pulse width and max duty
cycle and determine the worst case r(t) for your application.
Then calculate the peak power dissipation allowed by using
the equation,
Notes on SOA and Time Constant Limitations
Figure 10 is the Safe Operating Area (SOA) for the
MDC3105. Device instantaneous operation should never be
pushed beyond these limits. It shows the SOA for the
Transistor “ON” condition as well as the SOA for the Zener
during the turn−off transient. The max current is limited by
the Izpk capability of the Zener as well as the transistor in
addition to the max input current through the resistor. It
should not be exceeded at any temperature. The BJT power
dissipation limits are shown for various pulse widths and
duty cycles at an ambient temperature of 25°C. The voltage
limit is the max VCC that can be applied to the device. When
the input to the device is switched off, the BJT “ON” current
is instantaneously dumped into the Zener diode where it
begins its exponential decay. The Zener clamp voltage is a
function of that BJT current level as can be seen by the
bowing of the VZ versus IZ curve at the higher currents. In
addition to the Zener’s current limit impacting this device’s
500 mA max rating, the clamping diode also has a peak
energy limit as well. This energy limit was measured using
a rectangular pulse and then translated to an exponential
equivalent using the 2:1 relationship between the L/R time
constant of an exponential pulse and the pulse width of a
rectangular pulse having equal energy content. These L/R
time constant limits in ms appear along the VZ versus IZ
curve for the various values of IZ at which the Pd lines
intersect the VCC limit. The L/R time constant for a given
load should not exceed these limits at their respective
currents. Precise L/R limits on Zener energy at intermediate
current levels can be obtained from Figure 11.
Pd(pk) = (TJmax − TAmax) ÷ (RqJA * r(t))
Pd(pk) = (150°C − TAmax) ÷ (556°C/W * r(t))
Thus for a 20% duty cycle and a PW = 40 ms, Figure 12
yields r(t) = 0.3 and when entered in the above equation, the
max allowable Pd(pk) = 390 mW for a max TA = 85°C.
Designing with this Data Sheet
1.
2.
3.
Determine the maximum inductive load current (at
max VCC, min coil resistance and usually minimum
temperature) that the MDC3105 will have to drive
and make sure it is less than the max rated current.
For pulsed operation, use the Transient Thermal
Response of Figure 12 and the instructions with it
to determine the maximum limit on transistor power
dissipation for the desired duty cycle and
temperature range.
Use Figures 10 and 11 with the SOA notes above to
insure that instantaneous operation does not push
the device beyond the limits of the SOA plot.
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7
MDC3105
4.
5.
6.
While keeping any VO(sat) requirements in mind,
determine the max input current needed to achieve
that output current from Figures 2 and 6.
For levels of input current below 100 mA, use the
input threshold curves of Figure 4 to verify that
there will be adequate input current available to turn
on the MDC3105 at all temperatures.
For levels of input current above 100 mA, enter
Figure 3 using that max input current and determine
the input voltage required to drive the MDC3105
from the solid Vin versus Iin line. Select a suitable
drive source family from those whose dotted lines
7.
8.
9.
cross the solid input characteristic line to the right
of the Iin, Vin point.
Using the max output current calculated in step 1,
check Figure 7 to insure that the range of Zener
clamp voltage over temperature will satisfy all
system and EMI requirements.
Using Figures 8 and 9, insure that “OFF” state
leakage over temperature and voltage extremes does
not violate any system requirements.
Review circuit operation and insure none of the
device max ratings are being exceeded.
APPLICATIONS DIAGRAMS
+3.0 ≤ VDD ≤ +3.75 Vdc
+4.5 ≤ VCC ≤ +5.5 Vdc
+ +
AROMAT
TX2-L2-5 V
Vout (6)
Vout (3)
MDC3105DMT1
74HC04 OR
EQUIVALENT
Vin (5)
Vin (2)
GND (1)
GND (4)
Figure 13. A 200 mW, 5.0 V Dual Coil Latching Relay Application
with 3.0 V−HCMOS Level Translating Interface
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8
74HC04 OR
EQUIVALENT
MDC3105
Max Continuous Current Calculation
for TX2−5V Relay, R1 = 178 W Nominal @ RA = 25°C
Assuming ±10% Make Tolerance,
R1 = 178 W * 0.9 = 160 W Min @ TA = 25°C
-
-
TC for Annealed Copper Wire is 0.4%/°C
AROMAT
JS1E-5V
R1 = 160 W * [1+(0.004) * (−40°−25°)] = 118 W Min @ −40°C
IO Max = (5.5 V Max − 0.25V) /118 W = 45 mA
+4.5 TO +5.5 Vdc
AROMAT
JS1E-5V
+
+
+
+
+4.5 TO +5.5 Vdc
+
AROMAT
JS1E-5V
AROMAT
JS1E-5V
AROMAT
TX2-5V
-
-
Vout
Vout
MDC3105
MDC3105
74LS04
74HC04 OR
EQUIVALENT
BAL99LT1
Vin
GND
Figure 14. A 140 mW, 5.0 V Relay with TTL Interface
Figure 15. A Quad 5.0 V, 360 mW Coil Relay Bank
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9
MDC3105
4.5
225
3.5
175
IC (mA)
V in (VOLTS)
TYPICAL OPERATING WAVEFORMS
2.5
125
1.5
75
500
M
25
10
30
50
TIME (ms)
70
90
10
9
172
7
132
5
52
1
12
30
50
TIME (ms)
70
70
90
92
3
10
50
TIME (ms)
Figure 17. 20 Hz Square Wave Response
IZ (mA)
Vout (VOLTS)
Figure 16. 20 Hz Square Wave Input
30
90
10
Figure 18. 20 Hz Square Wave Response
30
50
TIME (ms)
70
90
Figure 19. 20 Hz Square Wave Response
MDC3105LT1G
ORDERING INFORMATION
Device
Package
MDC3105LT1G
SOT−23
(Pb−Free)
MDC3105DMT1G
SC−74
(Pb−Free)
Shipping†
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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10
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AS
DATE 30 JAN 2018
SCALE 4:1
D
0.25
3
E
1
2
T
HE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH.
MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF
THE BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
DIM
A
A1
b
c
D
E
e
L
L1
HE
T
L
3X b
L1
VIEW C
e
TOP VIEW
A
A1
SIDE VIEW
SEE VIEW C
c
MIN
0.89
0.01
0.37
0.08
2.80
1.20
1.78
0.30
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.14
0.20
2.90
3.04
1.30
1.40
1.90
2.04
0.43
0.55
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.000
0.015
0.003
0.110
0.047
0.070
0.012
0.014
0.083
0°
INCHES
NOM
0.039
0.002
0.017
0.006
0.114
0.051
0.075
0.017
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.008
0.120
0.055
0.080
0.022
0.027
0.104
10°
GENERIC
MARKING DIAGRAM*
END VIEW
RECOMMENDED
SOLDERING FOOTPRINT
XXXMG
G
1
3X
2.90
3X
XXX = Specific Device Code
M = Date Code
G
= Pb−Free Package
0.90
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
0.95
PITCH
0.80
DIMENSIONS: MILLIMETERS
STYLE 1 THRU 5:
CANCELLED
STYLE 6:
PIN 1. BASE
2. EMITTER
3. COLLECTOR
STYLE 7:
PIN 1. EMITTER
2. BASE
3. COLLECTOR
STYLE 9:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 10:
PIN 1. DRAIN
2. SOURCE
3. GATE
STYLE 11:
STYLE 12:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. CATHODE
3. CATHODE−ANODE
3. ANODE
STYLE 15:
PIN 1. GATE
2. CATHODE
3. ANODE
STYLE 16:
PIN 1. ANODE
2. CATHODE
3. CATHODE
STYLE 17:
PIN 1. NO CONNECTION
2. ANODE
3. CATHODE
STYLE 18:
STYLE 19:
STYLE 20:
PIN 1. NO CONNECTION PIN 1. CATHODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
2. ANODE
3. GATE
3. ANODE
3. CATHODE−ANODE
STYLE 21:
PIN 1. GATE
2. SOURCE
3. DRAIN
STYLE 22:
PIN 1. RETURN
2. OUTPUT
3. INPUT
STYLE 23:
PIN 1. ANODE
2. ANODE
3. CATHODE
STYLE 24:
PIN 1. GATE
2. DRAIN
3. SOURCE
STYLE 27:
PIN 1. CATHODE
2. CATHODE
3. CATHODE
STYLE 28:
PIN 1. ANODE
2. ANODE
3. ANODE
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42226B
SOT−23 (TO−236)
STYLE 8:
PIN 1. ANODE
2. NO CONNECTION
3. CATHODE
STYLE 13:
PIN 1. SOURCE
2. DRAIN
3. GATE
STYLE 25:
PIN 1. ANODE
2. CATHODE
3. GATE
STYLE 14:
PIN 1. CATHODE
2. GATE
3. ANODE
STYLE 26:
PIN 1. CATHODE
2. ANODE
3. NO CONNECTION
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
SC−74
CASE 318F
ISSUE P
6
1
SCALE 2:1
DATE 07 OCT 2021
GENERIC
MARKING DIAGRAM*
XXX MG
G
XXX
M
G
= Specific Device Code
= Date Code
= Pb−Free Package
(Note: Microdot may be in either location)
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “G”, may
or may not be present. Some products may
not follow the Generic Marking.
STYLE 1:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. ANODE
6. CATHODE
STYLE 2:
PIN 1. NO CONNECTION
2. COLLECTOR
3. EMITTER
4. NO CONNECTION
5. COLLECTOR
6. BASE
STYLE 3:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
STYLE 4:
PIN 1. COLLECTOR 2
2. EMITTER 1/EMITTER 2
3. COLLECTOR 1
4. EMITTER 3
5. BASE 1/BASE 2/COLLECTOR 3
6. BASE 3
STYLE 5:
PIN 1. CHANNEL 1
2. ANODE
3. CHANNEL 2
4. CHANNEL 3
5. CATHODE
6. CHANNEL 4
STYLE 7:
PIN 1. SOURCE 1
2. GATE 1
3. DRAIN 2
4. SOURCE 2
5. GATE 2
6. DRAIN 1
STYLE 8:
PIN 1. EMITTER 1
2. BASE 2
3. COLLECTOR 2
4. EMITTER 2
5. BASE 1
6. COLLECTOR 1
STYLE 9:
PIN 1. EMITTER 2
2. BASE 2
3. COLLECTOR 1
4. EMITTER 1
5. BASE 1
6. COLLECTOR 2
STYLE 10:
PIN 1. ANODE/CATHODE
2. BASE
3. EMITTER
4. COLLECTOR
5. ANODE
6. CATHODE
STYLE 11:
PIN 1. EMITTER
2. BASE
3. ANODE/CATHODE
4. ANODE
5. CATHODE
6. COLLECTOR
DOCUMENT NUMBER:
DESCRIPTION:
98ASB42973B
SC−74
STYLE 6:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. CATHODE
5. CATHODE
6. CATHODE
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
onsemi and
are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves
the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation
special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others.
© Semiconductor Components Industries, LLC, 2019
www.onsemi.com
onsemi,
, and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates
and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property.
A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any
products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the
information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use
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