MJ11032G

MJ11028, MJ11030, MJ11032 (NPN) MJ11029, MJ11033 (PNP) High-Current Complementary Silicon Power Transistors http://onsemi.com High−Current Complementary Silicon Power Transistors are for use as output devices in complementary general purpose amplifier applications. Features • High DC Current Gain − hFE = 1000 (Min) @ IC = 25 Adc • • • • • hFE = 400 (Min) @ IC = 50 Adc Curves to 100 A (Pulsed) Diode Protection to Rated IC Monolithic Construction with Built−In Base−Emitter Shunt Resistor Junction Temperature to + 200_C Pb−Free Packages are Available* MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Collector−Emitter Voltage MJ11028/29 MJ11030 MJ11032/33 VCEO 60 90 120 Vdc Collector−Base Voltage MJ11028/29 MJ11030 MJ11032/33 VCBO 60 90 120 Vdc VEBO 5.0 Vdc IC 50 100 Adc Base Current − Continuous IB 2.0 Adc Total Power Dissipation @ TC = 25°C Derate Above 25°C @ TC = 100_C PD 300 1.71 W W/°C TJ, Tstg −    55 to +200 °C Rating Emitter−Base Voltage Collector Current − Continuous − Peak (Note 1) Operating and Storage Junction Temperature Range THERMAL CHARACTERISTICS ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ Characteristic Symbol Max Unit Maximum Lead Temperature for Soldering Purposes for v 10 seconds TL 275 _C Thermal Resistance, Junction−to−Case RqJC 0.58 °C/W Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Pulse Test: Pulse Width = 5 ms, Duty Cycle ≤ 10%. 50 AMPERE COMPLEMENTARY DARLINGTON POWER TRANSISTORS 60 − 120 VOLTS 300 WATTS NPN PNP COLLECTOR CASE COLLECTOR CASE BASE 1 BASE 1 EMITTER 2 MJ11028 MJ11030 MJ11032 EMITTER 2 MJ11029 MJ11033 MARKING DIAGRAM 2 1 TO−204 (TO−3) CASE 197A STYLE 1 MJ110xxG AYYWW MEX MJ110xx = Device Code xx = 28, 29, 30, 32, 33 G = Pb−Free Package A = Location Code YY = Year WW = Work Week MEX = Country of Orgin ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. © Semiconductor Components Industries, LLC, 2008 September, 2008 − Rev. 6 1 Publication Order Number: MJ11028/D MJ11028, MJ11030, MJ11032 (NPN) COLLECTOR PNP MJ11029 MJ11033 COLLECTOR NPN MJ11028 MJ11030 MJ11032 BASE BASE ≈ 3.0 k ≈ 25 ≈ 3.0 k EMITTER ≈ 25 EMITTER Figure 1. Darlington Circuit Schematic ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted) Characteristic Symbol Min Max Unit V(BR)CEO 60 90 120 − − − Vdc − − − − − 2 2 2 10 10 − 5 − 2 1k 400 18 k − − − 2.5 3.5 − − 3.0 4.5 OFF CHARACTERISTICS Collector−Emitter Breakdown Voltage (Note 1) (IC = 1 00 mAdc, IB = 0) MJ11028, MJ11029 MJ11030 MJ11032, MJ11033 Collector−Emitter Leakage Current (VCE = 60 Vdc, RBE = 1 kW) (VCE = 90 Vdc, RBE = 1 kW) (VCE = 120 Vdc, RBE = 1 kW) (VCE = 60 Vdc, RBE = 1 kW, TC = 150_C) (VCE = 120 Vdc, RBE = 1 kW, TC = 150_C) MJ11028, MJ11029 MJ11030 MJ11032, MJ11033 MJ11028, MJ11029 MJ11032, MJ11033 ICER Emitter Cutoff Current (VBE = 5 Vdc, IC = 0) IEBO Collector−Emitter Leakage Current (VCE = 50 Vdc, IB = 0) ICEO mAdc mAdc mAdc ON CHARACTERISTICS (Note 1) DC Current Gain (IC = 25 Adc, VCE = 5 Vdc) (IC = 50 Adc, VCE = 5 Vdc) hFE Collector−Emitter Saturation Voltage (IC = 25 Adc, IB = 250 mAdc) (IC = 50 Adc, IB = 500 mAdc) VCE(sat) Base−Emitter Saturation Voltage (IC = 25 Adc, IB = 200 mAdc) (IC = 50 Adc, IB = 300 mAdc) VBE(sat) 1. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2.0%. http://onsemi.com 2 − Vdc Vdc MJ11028, MJ11030, MJ11032 (NPN) ORDERING INFORMATION Device Package MJ11028 MJ11028G TO−204 (Pb−Free) MJ11029 TO−204 MJ11029G TO−204 (Pb−Free) MJ11030 TO−204 MJ11030G TO−204 MJ11032G TO−204 (Pb−Free) MJ11033 TO−204 TO−204 (Pb−Free) MJ11033G There are two limitations on the power−handling ability of a transistor: average junction temperature and second breakdown. Safe operating area curves indicate IC − VCE limits of the transistor that must be observed for reliable operation, i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 2 is based on TJ(pk) = 200_C; TC is variable depending on conditions. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. IC, COLLECTOR CURRENT (AMP) 100 50 20 10 BONDING WIRE LIMITED THERMALLY LIMITED @ TC = 25°C SECOND BREAKDOWN LIMITED 2 1 MJ11028, 29 MJ11032, 33 0.5 0.2 0.1 0.2 100 Units / Tray TO−204 (Pb−Free) MJ11032 5 Shipping TO−204 0.5 1 2 5 10 20 50 100 VCE, COLLECTOR-EMITTER VOLTAGE (VOLTS) 200 VCE , COLLECTOR-EMITTER VOLTAGE (VOLTS) Figure 2. DC Safe Operating Area 100 k VCE = 5 V TJ = 25°C hFE, DC CURRENT GAIN 50 k 20 k 10 k 5k 2k MJ11029, MJ11033 PNP MJ11028, MJ11030, MJ11032 NPN 1k 500 80 ms (PULSED) 200 100 1 2 5 10 20 50 100 5 MJ11029, MJ11033 PNP MJ11028, MJ11030, MJ11032 NPN 4 3 TJ = 25°C IC/IB = 100 VBE(sat) 2 1 0 80 ms (PULSED) VCE(sat) 1 2 3 5 10 20 IC, COLLECTOR CURRENT (AMP) IC, COLLECTOR CURRENT (AMP) Figure 3. DC Current Gain Figure 4. “On” Voltage http://onsemi.com 3 50 100 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−204 (TO−3) CASE 197A−05 ISSUE K DATE 21 FEB 2000 SCALE 1:1 A N NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. C E D −T− U DIM A B C D E G H K L N Q U V K 2 PL 0.30 (0.012) V SEATING PLANE T Q M M Y M −Y− L 2 G H B INCHES MIN MAX 1.530 REF 0.990 1.050 0.250 0.335 0.057 0.063 0.060 0.070 0.430 BSC 0.215 BSC 0.440 0.480 0.665 BSC 0.760 0.830 0.151 0.165 1.187 BSC 0.131 0.188 MILLIMETERS MIN MAX 38.86 REF 25.15 26.67 6.35 8.51 1.45 1.60 1.53 1.77 10.92 BSC 5.46 BSC 11.18 12.19 16.89 BSC 19.31 21.08 3.84 4.19 30.15 BSC 3.33 4.77 1 GENERIC MARKING DIAGRAM* −Q− 0.25 (0.010) STYLE 1: PIN 1. BASE 2. EMITTER CASE: COLLECTOR M T Y STYLE 2: PIN 1. EMITTER 2. BASE CASE: COLLECTOR M STYLE 3: PIN 1. GATE 2. SOURCE CASE: DRAIN XXXXXX A YYWW STYLE 4: PIN 1. ANODE = 1 2. ANODE = 2 CASE: CATHODES XXXXX A YY WW = Specific Device Code = Assembly Locationa = Year = Work Week *This information is generic. Please refer to device data sheet for actual part marking. DOCUMENT NUMBER: STATUS: 98ASB42128B ON SEMICONDUCTOR STANDARD NEW STANDARD: © Semiconductor Components Industries, LLC, 2002 October, DESCRIPTION: 2002 − Rev. 0 TO−204 (TO−3) http://onsemi.com 1 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. Case Outline Number: PAGE 1 OFXXX 2 DOCUMENT NUMBER: 98ASB42128B PAGE 2 OF 2 ISSUE K REVISION LEGALLY CHANGED TO ON DATE 21 FEB 2000 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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