MM74HC151M

Revised February 1999 MM74HC151 8-Channel Digital Multiplexer General Description The MM74HC151 high speed Digital multiplexer utilizes advanced silicon-gate CMOS technology. Along with the high noise immunity and low power dissipation of standard CMOS integrated circuits, it possesses the ability to drive 10 LS-TTL loads. The MM74HC151 selects one of the 8 data sources, depending on the address presented on the A, B, and C inputs. It features both true (Y) and complement (W) outputs. The STROBE input must be at a low logic level to enable this multiplexer. A high logic level at the STROBE forces the W output HIGH and the Y output LOW. The 74HC logic family is functionally as well as pin-out compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground. Features ■ Typical propagation delay data select to output Y: 26 ns ■ Wide operating supply voltage range: 2–6V ■ Low input current: 1 µA maximum ■ Low quiescent supply current: 80 µA maximum (74HC) ■ High output drive current: 4 mA minimum Ordering Code: Order Number MM74HC151M MM74HC151SJ MM74HC151MTC MM74HC151N Package Number Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC16 N16E 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Truth Table Pin Assignments for DIP, SOIC, SOP and TSSOP Inputs Select C B A S Y W X X X H L H L L L L D0 D0 L L H L D1 D1 L H L L D2 D2 L H H L D3 D3 H L L L D4 D4 H L H L D5 D5 H H L L D6 D6 H H H L D7 D7 H = HIGH Level, L = LOW Level, X = Don't Care D0, D1...D7 = the level of the respective D input Top View © 1999 Fairchild Semiconductor Corporation Outputs Strobe DS005313.prf www.fairchildsemi.com MM74HC151 8-Channel Digital Multiplexer September 1983 MM74HC151 Logic Diagram www.fairchildsemi.com 2 Recommended Operating Conditions −0.5 to +7.0V Supply Voltage (VCC) DC Input Voltage (VIN) −1.5 to VCC +1.5V DC Output Voltage (VOUT) −0.5 to VCC +0.5V Clamp Diode Current (IIK, IOK) ±20 mA DC Output Current, per pin (IOUT) ±25 mA DC VCC or GND Current, per pin (ICC) ±50 mA Storage Temperature Range (TSTG) Min Max Supply Voltage (VCC) 2 6 V DC Input or Output Voltage 0 VCC V −40 +85 °C (tr, tf) VCC = 2.0V 1000 ns VCC = 4.5V 500 ns VCC = 6.0V 400 ns (VIN, VOUT) Operating Temperature Range (TA) Input Rise or Fall Times −65°C to +150°C Power Dissipation (PD) (Note 3) 600 mW S.O. Package only 500 mW Lead Temperature (TL) Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. 260°C Note 2: Unless otherwise specified all voltages are referenced to ground. (Soldering 10 seconds) Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C. DC Electrical Characteristics Symbol VIH VIL Parameter Conditions (Note 4) VCC TA = 25°C Typ TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits Units Minimum HIGH Level 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V 6.0V 4.2 4.2 4.2 V Maximum LOW Level 2.0V 0.5 0.5 0.5 V 4.5V 1.35 1.35 1.35 V 6.0V 1.8 1.8 1.8 V Input Voltage VOH Units Minimum HIGH Level VIN = VIH or VIL Output Voltage |IOUT| ≤ 20 µA 2.0V 2.0 1.9 1.9 1.9 V 4.5V 4.5 4.4 4.4 4.4 V 6.0V 6.0 5.9 5.9 5.9 V |IOUT| ≤ 4.0 mA 4.5V 4.2 3.98 3.84 3.7 V |IOUT| ≤ 5.2 mA 6.0V 5.7 5.48 5.34 5.2 V VIN = VIH or VIL VOL Maximum LOW Level VIN = VIH or VIL Output Voltage |IOUT| ≤ 20 µA 2.0V 0 0.1 0.1 0.1 V 4.5V 0 0.1 0.1 0.1 V 6.0V 0 0.1 0.1 0.1 V V VIN = VIH or VIL IIN |IOUT| ≤ 4.0 mA 4.5V 0.2 0.26 0.33 0.4 |IOUT| ≤ 5.2 mA 6.0V 0.2 0.26 0.33 0.4 V VIN = VCC or GND 6.0V ±0.1 ±1.0 ±1.0 µA Maximum Quiescent VIN = VCC or GND 6.0V 8.0 80 160 µA Supply Current IOUT = 0 µA Maximum Input Current ICC Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at VCC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current (IIN, ICC, and IOZ) occur for CMOS at the higher voltage and so the 6.0V values should be used. 3 www.fairchildsemi.com MM74HC151 Absolute Maximum Ratings(Note 1) (Note 2) MM74HC151 AC Electrical Characteristics VCC = 5V, TA = 25°C, CL = 15 pF, tr = tf = 6 ns Symbol tPHL, tPLH Parameter Conditions Guaranteed Typ Maximum Propagation Delay Units Limit 26 35 ns 27 35 ns 22 29 ns 24 32 ns 17 23 ns 16 21 ns A, B or C to Y tPHL, tPLH Maximum Propagation Delay A, B or C to W tPHL, tPLH Maximum Propagation Delay Any D to Y tPHL, tPLH Maximum Propagation Delay any D to W tPHL, tPLH Maximum Propagation Delay Strobe to Y tPHL, tPLH Maximum Propagation Delay Strobe to W AC Electrical Characteristics CL = 50 pF, tr = tf = 6 ns (unless otherwise specified) Symbol tPHL, tPLH tPHL, tPLH tPHL, tPLH tPHL, tPLH tPHL, tPLH tPHL, tPLH tTLH, tTHL CPD Parameter Conditions VCC TA = 25°C Typ TA = −40 to 85°C TA = −55 to 125°C Guaranteed Limits Units Maximum Propagation Delay 2.0V 90 205 256 300 ns A, B or C to Y 4.5V 31 41 51 60 ns ns 6.0V 26 35 44 51 Maximum Propagation Delay 2.0V 95 205 256 300 ns A, B or C to W 4.5V 32 41 51 60 ns ns 6.0V 27 35 44 51 Maximum Propagation Delay 2.0V 70 195 244 283 ns any D to Y 4.5V 27 39 49 57 ns ns 6.0V 23 33 41 48 Maximum Propagation Delay 2.0V 75 185 231 268 ns any D to W 4.5V 29 37 46 54 ns ns 6.0V 25 32 40 46 Maximum Propagation Delay 2.0V 50 140 175 203 ns Strobe to Y 4.5V 21 28 35 41 ns ns 6.0V 18 24 30 35 Maximum Propagation Delay 2.0V 45 127 159 185 ns Strobe to W 4.5V 20 25 32 37 ns 6.0V 17 22 28 32 ns Maximum Output Rise 2.0V 30 75 95 110 ns and Fall Time 4.5V 8 15 19 22 ns 6.0V 7 13 16 19 Power Dissipation (per package) 110 ns pF Capacitance (Note 5) CIN Maximum Input 5 10 10 10 Capacitance Note 5: CPD determines the no load dynamic power consumption, PD = CPD VCC2f + ICC VCC, and the no load dynamic current consumption, IS = CPD V CC f + ICC. www.fairchildsemi.com 4 pF MM74HC151 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow Package Number M16A 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D 5 www.fairchildsemi.com MM74HC151 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 www.fairchildsemi.com 6 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Package Number N16E LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. MM74HC151 8-Channel Digital Multiplexer Physical Dimensions inches (millimeters) unless otherwise noted (Continued)