MM74HC4316M

Revised March 2001 MM74HC4316 Quad Analog Switch with Level Translator General Description Features The MM74HC4316 devices are digitally controlled analog switches implemented in advanced silicon-gate CMOS technology. These switches have low “ON” resistance and low “OFF” leakages. They are bidirectional switches, thus any analog input may be used as an output and vice-versa. Three supply pins are provided on the MM74HC4316 to implement a level translator which enables this circuit to operate with 0–6V logic levels and up to ±6V analog switch levels. The MM74HC4316 also has a common enable input in addition to each switch's control which when HIGH will disable all switches to their OFF state. All analog inputs and outputs and digital inputs are protected from electrostatic damage by diodes to VCC and ground. ■ Typical switch enable time: 20 ns ■ Wide analog input voltage range: ±6V ■ Low “ON” resistance: 50 typ. (VCC−VEE = 4.5V) 30 typ. (VCC−VEE = 9V) ■ Low quiescent current: 80 µA maximum (74HC) ■ Matched switch characteristics ■ Individual switch controls plus a common enable Ordering Code: Order Number Package Number MM74HC4316M MM74HC4316SJ MM74HC4316MTC Package Description M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow M16D 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide MTC16 MM74HC4316N N16E 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Diagram Connection Diagram Top View Truth Table Inputs Switch En CTL I/O–O/I H X “OFF” L L “OFF” L H “ON” © 2001 Fairchild Semiconductor Corporation DS005369 www.fairchildsemi.com MM74HC4316 Quad Analog Switch with Level Translator February 1984 MM74HC4316 Absolute Maximum Ratings(Note 1) Recommended Operating Conditions (Note 2) −0.5 to +7.5V Supply Voltage (VCC) Min Max 2 6 V 0 −6 V 0 VCC V −40 +85 °C (tr, tf) VCC = 2.0V 1000 ns VCC = 4.5V 500 ns +0.5 to −7.5V Supply Voltage (V ) CC −1.5 to VCC +1.5V Supply Voltage (V ) Supply Voltage (VEE) DC Control Input Voltage (VIN) EE VEE−0.5 to VCC +0.5V DC Input or Output Voltage ±20 mA ) (V , V DC Switch I/O Voltage (VIO) Clamp Diode Current (IIK, IOK) IN OUT ±25 mA Operating Temperature Range (T ) A ±50 mA Input Rise or Fall Times DC Output Current, per pin (IOUT) DC VCC or GND Current, per pin (ICC ) −65°C to +150°C Storage Temperature Range (TSTG) Power Dissipation (PD) Units (Note 3) 600 mW VCC = 6.0V 400 ns S.O. Package only 500 mW VCC = 12.0V 250 ns Lead Temperature (TL) Note 1: Absolute Maximum Ratings are those values beyond which damage to the device may occur. 260°C (Soldering 10 seconds) Note 2: Unless otherwise specified all voltages are referenced to ground. Note 3: Power Dissipation temperature derating — plastic “N” package: − 12 mW/°C from 65°C to 85°C. DC Electrical Characteristics Symbol VIH VIL Parameter (Note 4) Conditions VCC VEE TA = 25°C Typ 2.0V 1.5 1.5 1.5 V Input Voltage 4.5V 3.15 3.15 3.15 V 6.0V 4.2 4.2 4.2 V Maximum LOW Level 2.0V 0.5 0.5 0.5 V Input Voltage 4.5V 1.35 1.35 1.35 V Minimum “ON” Resistance VCTL = VIH, IS = 2.0 mA (Note 5) RON IIN Units Guaranteed Limits Minimum HIGH Level 6.0V RON TA = −40 to 85°C TA = −55 to 125°C GND 1.8 1.8 1.8 V 4.5V 100 170 200 220 Ω VIS = VCC to VEE −4.5V 4.5V 40 85 105 110 Ω (Figure 1) −6.0V 6.0V 30 70 85 90 Ω GND 2.0V 100 180 215 240 Ω VCTL = VIH, IS = 2.0 mA GND 4.5V 40 80 100 120 Ω VIS = VCC or VEE −4.5V 4.5V 50 60 75 80 Ω (Figure 1) −6.0V 6.0V 20 40 60 70 Ω GND 4.5V 10 15 20 20 Ω −4.5V 4.5V 5 10 15 15 Ω −6.0V 6.0V 5 GND 6.0V Maximum “ON” Resistance VCTL = VIH Matching VIS = VCC to VEE Maximum Control VIN = VCC or GND 10 15 15 Ω ±0.1 ±1.0 ±1.0 µA Input Current IIZ Maximum Switch “OFF” VOS = VCC or VEE GND 6.0V ±60 ±600 ±600 nA Leakage Current VIS = VEE or VCC −6.0V 6.0V ±100 ±1000 ±1000 nA VCTL = VIL (Figure 2) IIZ Maximum Switch “ON” VIS = VCC to VEE GND 6.0V ±40 ±150 ±150 nA Leakage Current VCTL = VIH, VOS = OPEN −6.0V 6.0V ±60 ±300 ±300 nA (Figure 3) ICC Maximum Quiescent VIN = VCC or GND GND 6.0V 2.0 20 40 µA Supply Current IOUT = 0 µA −6.0V 6.0V 8.0 80 160 µA Note 4: For a power supply of 5V ±10% the worst case on resistances (RON) occurs for HC at 4.5V. Thus the 4.5V values should be used when designing with this supply. Worst case VIH and VIL occur at V CC = 5.5V and 4.5V respectively. (The VIH value at 5.5V is 3.85V.) The worst case leakage current occurs for CMOS at the higher voltage and so the 5.5V values should be used. Note 5: At supply voltages (VCC–VEE) approaching 2V the analog switch on resistance becomes extremely non-linear. Therefore it is recommended that these devices be used to transmit digital only when using these supply voltages. www.fairchildsemi.com 2 VCC = 2.0V−6.0V, VEE = 0V−6V, CL = 50 pF (unless otherwise specified) Symbol Parameter Conditions VEE VCC TA = +25°C Typ TA = −40°C to +85°C TA = −55°C to +125°C Units Guaranteed Limits tPHL, Maximum Propagation GND 2.0V 25 50 63 75 tPLH Delay Switch GND 4.5V 5 10 13 15 ns ns In to Out −4.5V 4.5V 4 8 12 14 ns −6.0V 6.0V 3 7 11 13 ns GND 2.0V 30 165 206 250 ns Turn “ON” Delay GND 4.5V 20 35 43 53 ns (Control) −4.5V 4.5V 15 32 39 48 ns −6.0V 6.0V 14 30 37 45 ns GND 2.0V 45 250 312 375 ns tPZL, Maximum Switch tPZH RL = 1 kΩ RL = 1 kΩ tPHZ, Maximum Switch tPLZ Turn “OFF” Delay GND 4.5V 25 50 63 75 ns (Control) −4.5V 4.5V 20 44 55 66 ns −6.0V 6.0V 20 44 55 66 tPZL, Maximum Switch GND 2.0V 35 205 256 308 ns tPZH Turn “ON” Delay GND 4.5V 20 41 52 62 ns (Enable) −4.5V 4.5V 19 38 48 57 ns −6.0V 6.0V 18 36 45 54 ns tPLZ, Maximum Switch GND 2.0V 58 265 330 400 ns tPHZ Turn “OFF” Delay GND 4.5V 28 53 67 79 ns (Enable) −4.5V 4.5V 23 47 59 70 ns −6.0V 6.0V 21 47 59 70 fMAX Minimum Frequency RL = 600Ω, VIS = 2VPP Response (Figure 7) at (VCC−VEE/2) 0V 4.5 ns 40 MHz 100 MHz 4.5V 100 mV −4.5V 4.5V 250 mV 4.5V −52 dB −4.5V 4.5V −50 dB 4.5V −42 dB −4.5V 4.5V −44 dB 4.5V 0.013 % VIS = 8VPP −4.5V 4.5V 0.008 % 5 pF 35 pF 0.5 pF 15 pF −4.5V 4.5V 20 log (VOS/VIS)= −3 dB (Note 6) (Note 7) Control to Switch RL = 600Ω, F = 1 MHz Feedthrough Noise CL = 50 pF (Figure 8) (Note 7) (Note 8) Crosstalk Between RL = 600Ω, F = 1 MHz any Two Switches 0V (Figure 9) Switch OFF Signal THD RL = 600Ω, F = 1 MHz Feedthrough Isolation VCTL = VIL, (Figure 10) (Note 7) (Note 8) Sinewave Harmonic RL = 10 KΩ, CL = 50 pF, Distortion F = 1 KHz 0V VIS = 4VPP (Figure 11) CIN 0V 0V Maximum Control Input Capacitance CIN Maximum Switch Input Capacitance CIN Maximum Feedthrough VCTL = GND Capacitance CPD Power Dissipation Capacitance Note 6: Adjust 0 dBm for F = 1 KHz (Null RL/Ron Attenuation). Note 7: VIS is centered at VCC–VEE/2. Note 8: Adjust for 0 dBm. 3 www.fairchildsemi.com MM74HC4316 AC Electrical Characteristics MM74HC4316 AC Test Circuits and Switching Time Waveforms FIGURE 1. “ON” Resistance FIGURE 2. “OFF” Channel Leakage Current FIGURE 3. “ON” Channel Leakage Current FIGURE 4. tPHL, tPLH Propagation Delay Time Signal Input to Signal Output FIGURE 5. tPZL, tPLZ Propagation Delay Time Control to Signal Output FIGURE 6. tPZH, tPHZ Propagation Delay Time Control to Signal Output www.fairchildsemi.com 4 MM74HC4316 AC Test Circuits and Switching Time Waveforms (Continued) FIGURE 7. Frequency Response FIGURE 8. Crosstalk: Control Input to Signal Output FIGURE 9. : Crosstalk Between Any Two Switches FIGURE 10. Switch OFF Signal Feedthrough Isolation FIGURE 11. Sinewave Distortion 5 www.fairchildsemi.com MM74HC4316 Typical Performance Characteristics Typical “ON” Resistance Typical Crosstalk Between Any Two Switches Typical Frequency Response Special Considerations In certain applications the external load-resistor current may include both VCC and signal line components. To avoid drawing VCC current when switch current flows into www.fairchildsemi.com the analog switch input pins, the voltage drop across the switch must not exceed 0.6V (calculated from the On Resistance). 6 MM74HC4316 Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow Package Number M16A 7 www.fairchildsemi.com MM74HC4316 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M16D www.fairchildsemi.com 8 MM74HC4316 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 9 www.fairchildsemi.com MM74HC4316 Quad Analog Switch with Level Translator Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N16E Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. www.fairchildsemi.com www.fairchildsemi.com 10