NC7NZ17L8X

DATA SHEET www.onsemi.com TinyLogic UHS Triple Buffer with Schmitt Trigger Inputs MARKING DIAGRAMS NC7NZ17 UQFN8 1.6X1.6, 0.5P CASE 523AY U4KK XYZ US8 CASE 846AN NZ17 ALYW Description The NC7NZ17 is a triple buffer with Schmitt trigger inputs from onsemi’s Ultra High Speed Series of TinyLogic in the US8 package. The device is fabricated with advanced CMOS technology to achieve ultra high speed with high output drive while maintaining low static power dissipation over a very broad VCC operating range. The device is specified to operate over the 1.65 V to 5.5 V VCC range. The inputs and outputs are high impedance when VCC is 0 V. Inputs tolerate voltages up to 5.5 V independent of VCC operating voltage. Schmitt trigger inputs typically achieve 1 V hysteresis between the positive going and negative going input threshold voltage at 5 V VCC. Features • • • • • • • • • Space Saving US8 Surface Mount Package MicroPak™ Pb−Free Leadless Package Ultra High Speed: tPD 3.6 ns Typ into 50 pF at 5 V VCC High Output Drive: ±24 mA at 3 V VCC Broad VCC Operating Range: 1.65 V to 5.5 V Power Down High Impedance Inputs / Outputs Overvoltage Tolerant Inputs Facilitate 5 V to 3 V Translation Proprietary Noise / EMI Reduction Circuitry Implemented These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant U4, NZ17 KK XY Z A L YW = Specific Device Code = 2−Digit Lot Run Traceability Code = 2−Digit Date Code Format = Assembly Plant Code = Assembly Site = Wafer Lot Number = Assembly Start Week ORDERING INFORMATION See detailed ordering, marking and shipping information on page 6 of this data sheet. IEEE / IEC 1A 2A 3A (1) (7) (3) (5) (6) (2) 1Y 2Y 3Y Figure 1. Logic Symbol © Semiconductor Components Industries, LLC, 2005 June, 2022 − Rev. 3 1 Publication Order Number: NC7NZ17/D NC7NZ17 Connection Diagrams VCC 1Y 3A 2Y 8 7 6 5 1A 7 3Y 6 2A 5 VCC 8 1 2 3 4 1A 3Y 2A GND 1 1Y Figure 2. Connection Diagram (Top View) (Top View) 4 GND 2 3A 3 2Y Figure 4. Pad Assignments for MicroPak (Top Thru View) AAA Pin One AAA represents Product Code Top Mark − see ordering code NOTE: Orientation of Top Mark determines Pin One location. Read the Top Product Code Mark left to right, Pin One is the lower left pin (see diagram). Figure 3. Pin One Orientation Diagram PIN DESCRIPTIONS FUNCTION TABLE (Y = A) Name Description Input Output A1, A2, A3 Data Inputs A Y Y1, Y2, Y3 Output L L H H H = HIGH Logic Level L = LOW Logic Level www.onsemi.com 2 NC7NZ17 ABSOLUTE MAXIMUM RATINGS Symbol Min Max Unit VCC Supply Voltage −0.5 6.5 V VIN DC Input Voltage −0.5 6.5 V DC Output Voltage −0.5 6.5 V VOUT Parameter IIK DC Input Diode Current VIN < 0 V − −50 mA IOK DC Output Diode Current VOUT < 0 V − −50 mA IOUT DC Output Current − ±50 mA DC VCC / GND Current − ±100 mA −65 +150 °C ICC / IGND TSTG Storage Temperature TJ Junction Temperature under Bias − +150 °C TL Junction Lead Temperature (Soldering, 10 Seconds) − +260 °C PD Power Dissipation in Still Air − − 500 539 mW US8 MicroPak−8 Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN VOUT Parameter Min Max Unit Supply Voltage Operating 1.65 5.5 V Supply Voltage Data Retention 1.5 5.5 0 5.5 Input Voltage Output Voltage TA Operating Temperature qJA Thermal Resistance US8 MicroPak−8 V 0 VCC V −40 +85 °C − − 250 232 °C/W Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 1. Unused inputs must be held HIGH or LOW. They may not float. www.onsemi.com 3 NC7NZ17 DC ELECTICAL CHARACTERISTICS TA = +25°C Symbol VP VN VH VOH Parameter Positive Threshold Voltage Negative Threshold Voltage Hysteresis Voltage HIGH Level Output Voltage Typ Max Min Max Unit 1.65 − 1.07 1.5 − 1.5 V 2.3 − 1.38 1.8 − 1.8 3.0 − 1.74 2.2 − 2.2 4.5 − 2.43 3.1 − 3.1 VCC (V) Conditions 5.5 − 2.88 3.6 − 3.6 1.65 0.25 0.56 − 0.25 − 2.3 0.40 0.75 − 0.40 − 3.0 0.6 0.98 − 0.6 − 4.5 1.0 1.42 − 1.0 − 5.5 1.2 1.68 − 1.2 − 1.65 0.15 0.51 1.0 0.15 1.0 2.3 0.25 0.62 1.1 0.25 1.1 3.0 0.4 0.76 1.2 0.4 1.2 4.5 0.6 1.01 1.5 0.6 1.5 5.5 0.7 1.20 1.7 0.7 1.7 1.55 1.65 − 1.55 − 2.3 2.2 2.3 − 2.2 − 3.0 2.9 3.0 − 2.9 − 4.5 4.4 4.5 − 4.4 − 1.65 VIN = VIH IIN LOW Level Output Voltage Input Leakage Current IOFF Power Off Leakage Current ICC Quiescent Supply Current IOH = −100 mA 1.65 IOH = −4 mA 1.29 1.52 − 1.29 − 2.3 IOH = −8 mA 1.9 2.14 − 1.9 − 3.0 IOH = −16 mA 2.4 2.75 − 2.4 − 3.0 IOH = −24 mA 2.3 2.62 − 2.3 − IOH = −32 mA 3.8 4.13 − 3.8 − IOL = 100 mA − 0.0 0.1 − 0.1 2.3 − 0.0 0.1 − 0.1 3.0 − 0.0 0.1 − 0.1 4.5 − 0.0 0.1 − 0.1 4.5 VOL TA = −40 to +85°C Min 1.65 VIN = VIL V V V V 1.65 IOL = 4 mA − 0.08 0.24 − 0.24 2.3 IOL = 8 mA − 0.10 0.3 − 0.3 3.0 IOL = 16 mA − 0.16 0.4 − 0.4 3.0 IOL = 24 mA − 0.24 0.55 − 0.55 4.5 IOL = 32 mA − 0.25 0.55 − 0.55 VIN = 5.5 V, GND − − ±0.1 − ±1.0 mA VIN or VOUT = 5.5 V − − 1 − 10 mA VIN = 5.5 V, GND − − 1.0 − 10 mA 1.65 to 5.5 0.0 1.65 to 5.5 www.onsemi.com 4 NC7NZ17 AC ELECTRICAL CHARACTERISTICS TA = +25°C Symbol Parameter tPLH, tPHL Propagation Delay (Figure 5, 7) Typ Max Min Max Unit − 6.9 11.9 − 13.1 ns − 4.8 8.2 − 9.0 3.3 ±0.3 − 3.7 5.6 − 6.2 5.0 ±0.5 − 3.0 4.7 − 5.2 − 4.3 6.6 − 7.3 − 3.6 5.6 − 6.2 − 2.5 − − − pF − 9 − − − pF − 11 − − − 1.8 ±0.15 2.5 ±0.2 3.3 ±0.3 5.0 ±0.5 CIN Input Capacitance CPD Power Dissipation Capacitance (Figure 6) TA = −40 to +85°C Min VCC (V) Conditions CL = 15 pF, RL = 1 MW, CL = 50 pF, RL = 500 W, 0 (Note 2) 3.3 5.0 2. CPD is defined as the value of the internal equivalent capacitance which is derived from dynamic operating current consumption (ICCD) at no output loading and operating at 50% duty cycle. (See Figure 6). CPD is related to ICCD dynamic operating current by the expression: ICCD = (CPD) (VCC) (fIN) + (ICCstatic). AC ELECTRICAL CHARACTERISTICS TA = +25°C Symbol Parameter Conditions VCC (V) Typical Unit VOLP Quiet Output Dynamic Peak VOL CL = 50 pF, VIH = 5.0 V, VIL = 0 V 5.0 0.8 V VOLV Quiet Output Dynamic Valley VOL CL = 50 pF, VIH = 5.0 V, VIL = 0 V 5.0 −0.8 V AC Loading and Waveforms tr = 3 ns tf = 3 ns 90% VCC 50% INPUT INPUT 10% OUTPUT CL 50% tW tPLH RL OUTPUT CL includes load and stray capacitance Input PRR = 1.0 MHz, tW = 500 ns. VCC 90% 10% tPHL 50% GND VOH 50% VOL Figure 5. AC Test Circuit Figure 7. AC Waveforms VCC A INPUT Input = AC Waveform; tr = tf = 1.8 ns; PRR = variable; Duty Cycle = 50%. Figure 6. ICCD Test Circuit www.onsemi.com 5 NC7NZ17 ORDERING INFORMATION Top Mark Package Shipping† NC7NZ17K8X NZ17 8−Lead US8, JEDEC MO−187, Variation CA 3.1 mm Wide 3000 / Tape & Reel NC7NZ17L8X U4 8−Lead MicroPak, 1.6 mm Wide (Pb−Free) 5000 / Tape & Reel NC7NZ17L8X−L22185 U4 8−Lead MicroPak, 1.6 mm Wide (Pb−Free) 5000 / Tape & Reel Part Number †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. 3. Pb−Free package per JEDEC J−STD−020B. MicroPak is trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. www.onsemi.com 6 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS UQFN8 1.6X1.6, 0.5P CASE 523AY ISSUE O 0.05 C A 1.60 DATE 31 AUG 2016 0.40 (6X) 1.60 B 0.45 (2X) 2X 1.60 TOP VIEW PIN#1 IDENT 0.05 1.61 C 0.50 RECOMMENDED LAND PATTERN 0.50±0.05 0.05 C 0.05 C 0.25 (8X) NOTES: SEATING PLANE 0.025±0.025 A. PACKAGE CONFORMS TO JEDEC MO−255 VARIATION UAAD. C B. DIMENSIONS ARE IN MILLIMETERS. SIDE VIEW C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 2009. 1.60±0.05 (0.10) D. LAND PATTERN RECOMMENDATION IS EXISTING INDUSTRY LAND PATTERN. (0.20)3X DETAIL A 1 2 3 (0.20) (0.09) 4 8 1.60±0.05 0.30±0.05 0.30±0.05 (7X) 7 6 5 0.50 1.00±0.05 (0.15) 0.20±0.05 (8X) BOTTOM VIEW DOCUMENT NUMBER: DESCRIPTION: 98AON13591G UQFN8 1.6X1.6, 0.5P 0.30±0.05 0.10 C 0.05 C A B DETAIL A SCALE : 2X Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS US8 CASE 846AN ISSUE O DOCUMENT NUMBER: DESCRIPTION: 98AON13778G US8 DATE 31 DEC 2016 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. 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