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NCP1417_06

NCP1417_06

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    NCP1417_06 - 200 mA DC−DC Step−up Converter with Dual Low Battery Protection - ON Semico...

  • 数据手册
  • 价格&库存
NCP1417_06 数据手册
NCP1417 200 mA DC−DC Step−up Converter with Dual Low Battery Protection NCP1417 is a monolithic micropower high frequency Boost (step−up) voltage switching converter IC specially designed for battery operated hand−held electronic products up to 200 mA loading. It integrates Synchronous Rectifier for improving efficiency as well as eliminating the external Schottky Diode. High switching frequency (up to 600 kHz) allows use of a low profile inductor and output capacitor. Dual Low−Battery Detectors and Cycle−by−Cycle Current Limit provide value−added features for various battery−operated applications. With all these functions ON, the quiescent supply current is only 9.0 mA typical. This device is available in a space saving compact Micro8t package. Features http://onsemi.com MARKING DIAGRAM 8 8 1 Micro8 DM SUFFIX CASE 846A 1 1417 A Y W = Device Marking = Assembly Location = Year = Work Week 1417 AYW • High Efficiency, Up to 92%, Typical • Very Low Device Quiescent Supply Current of 9.0 mA Typical • Built−in Synchronous Rectifier (P−FET) Eliminates One External Schottky Diode • High Switching Frequency (Up to 600 kHz) Allows Small Size • • • • • • • • • • • • • • Inductor and Capacitor High Accuracy Reference Output, 1.19 V ± 0.6% @ 25_C, Can Supply More Than 2.5 mA when VOUT ≥ 3.3 V 1.0 V Startup at No Load Guaranteed Output Voltage from 1.5 V to 5.5 V Adjustable Output Current Up to 200 mA @ Vin = 2.5 V, Vout = 3.3 V Multi−Function LBI/Shutdown Control Pin Dual Open Drain Low−Battery Detector Outputs 1.0 A Cycle by Cycle Current Limit Low Profile and Minimum External Parts Compact Micro8 Package PIN CONNECTIONS FB LBI/SHDN LBO1 REF 1 2 3 4 (Top View) 8 7 6 5 OUT LX GND LBO2 ORDERING INFORMATION Device NCP1417DMR2 Package Micro8 Shipping 4000 Tape & Reel Applications Personal Digital Assistants (PDA) Handheld Digital Audio Product Camcorders and Digital Still Camera Handheld Instrument Conversion from One or Two NiMH or NiCd or One Lithium−ion Cells to 3.3 V/5.0 V © Semiconductor Components Industries, LLC, 2006 July, 2006 − Rev. 3 1 Publication Order Number: NCP1417/D NCP1417 Input 1.0 V to VOUT 10 mF 22 mH 150 pF 355 K FB VOUT + VOUT 200 K Low Battery Sense Input Shutdown Input 56 nF Low Battery Open Drain Output 1 LBI/SHDN LX 33 mF Output 1.5 V to 5.5 V IOUT typical up to 200 mA at 3.3 V Output and 2.5 V Input NCP1417 LBO1 GND REF 150 nF LBO2 Low Battery Open Drain Output 2 Figure 1. Typical Operating Circuit MAXIMUM RATINGS Rating Power Supply (Pin 8) Input/Output Pins Pin 1−5, Pin 7 Thermal Characteristics Micro8 Plastic Package Maximum Power Dissipation @ TA = 25°C Thermal Resistance Junction to Air Operating Junction Temperature Range Operating Ambient Temperature Range Storage Temperature Range 1. This device contains ESD protection and exceeds the following tests: Human Body Model (HBM) "2.0 kV per JEDEC standard: JESD22−A114. Machine Model (MM) "200 V per JEDEC standard: JESD22−A115. 2. The maximum package power dissipation limit must not be exceeded. TJ(max) * TA PD + RqJA 3. Latch−up Current Maximum Rating: "150 mA per JEDEC standard: JESD78. 4. Moisture Sensitivity Level: MSL 1 per IPC/JEDEC standard: J−STD−020A. Symbol VOUT VIO Value −0.3 to 6.0 −0.3 to 6.0 Unit V V PD RqJA TJ TA Tstg 520 240 −40 to +150 −40 to +85 −55 to +150 mW _C/W _C _C _C http://onsemi.com 2 NCP1417 ELECTRICAL CHARACTERISTICS (VOUT = 3.3 V, TA = 25°C for typical value, −40°C ≤ TA ≤ 85_C for min/max values unless Characteristics Operating Voltage Output Voltage Range (Adjusted by External Feedback) Reference Voltage (CREF = 150 nF, Under No Loading, TA = 25_C) Reference Voltage (CREF = 150 nF, Under No Loading, −40_C ≤ TA ≤ 85_C) Reference Voltage Temperature Coefficient Reference Voltage Load Current (VOUT = 3.3 V, VREF = VREF_NL " 1.5%, CREF = 1.0 mF) (Note 5) Reference Voltage Load Regulation (VOUT = 3.3 V, ILOAD = 0 to 100 mA, CREF = 1.0 mF) Reference Voltage Line Regulation FB, LBI Input Threshold Internal NFET ON−Resistance (ILX = 100 mA) Internal PFET ON−Resistance (ILX = 100 mA) LX Switch Current Limit (NFET) Operating Current into OUT (VFB = 1.4 V, i.e. No Switching, VOUT = 3.3 V) Shutdown Current into OUT (SHDN = GND) LX Switch MAX. ON−Time (VFB = 1.0 V, VOUT = 3.3 V) LX Switch MIN. OFF−Time (VFB = 1.0 V, VOUT = 3.3 V) FB Input Current LBI/SHDN Input Current LBO1/LBO2 Low Output Voltage (VLBI = 0, ISINK = 1.0 mA) LBI/SHDN Input Threshold for LBO1 LBI/SHDN Input Threshold for LBO2 LBI/SHDN Input Threshold, Low LBI/SHDN Input Threshold, High 5. Loading capability decreases with VOUT. Symbol VIN VOUT VREF_NL VREF_NL_A TCVREF IREF VREF_LOAD VREF_LINE VFB, VLBI RDS(ON)_N RDS(ON)_P ILIM IQ ISD tON tOFF IFB ILBI, ISHDN VLBO_L1 VLBO_L2 VLBI1 VLBI2 VSHDN_L VSHDN_H Min 1.0 VIN 1.183 1.178 − 2.5 − − 1.172 − − − − − 0.8 0.22 − − − − 1.172 0.904 − 0.6 Typ − − 1.190 − 0.03 − 0.015 0.03 1.190 0.65 1.3 1.0 9.0 0.05 1.4 0.25 1.5 1.5 − − 1.190 0.944 − − Max 5.5 5.5 1.197 1.202 − − 1.0 1.0 1.200 − − − 14 1.0 2.0 0.46 20 8.0 0.08 0.08 1.200 0.965 0.3 − Unit V V V V mV/_C mA mV mV/V V W W A mA mA mS mS nA nA V V V V V otherwise noted.) PIN FUNCTION DESCRIPTION Pin No. 1 2 3 4 5 6 7 8 Pin Name FB LBI/SHDN LBO1 REF LBO2 GND LX OUT Output Voltage Feedback Input. Low−Battery Detector Input and Shutdown Control input multi−function pin. Open−Drain Low−Battery Detector Output. Output is LOW when VLBI is < 1.172 V. LBO1 is high impedance during shutdown. 1.190 V Reference Voltage Output, bypassing with 150 nF capacitor if this pin is not loaded, bypassing with 1 μF if this pin is loaded up to 2.5 mA @ VOUT = 3.3 V. Open−Drain Low−Battery Detector Output. Output is LOW when VLBI is < 0.904 V. LBO2 is high impedance during shutdown. Ground N−Channel and P−Channel Power MOSFET Drain Connection. Power Output. OUT provides bootstrap power to the IC. Pin Description http://onsemi.com 3 NCP1417 VBAT + ZLC − CHIP ENABLE _ZCUR 20 mV + 7 LX M2 VDD 8 OUT VDD SenseFET M1 GND 6 GND VDD VOUT _PWGONCE 1 FB + PFM − VOLTAGE REFERENCE _CEN _PFM _MAINSW2ON CONTROL LOGIC _SYNSW2ON _MAINSWOFD 4 REF _VREFOK _SYNSWOFD + ILIM − GND _ILIM + GND 3 LBO1 2 LBI/SHDN VREF + − − + CP1 30 mV CP2 30 mV GND 5 LBO2 GND 0.8 x VREF Figure 2. Simplified Functional Diagram http://onsemi.com 4 NCP1417 1.220 REFERENCE VOLTAGE, VREF/V 1.215 1.210 1.205 1.200 1.195 1.190 VIN = 3 V VOUT = 3.3 V L = 22 μH Cin = 10 μF Cout = 33 μF CREF = 1 μF TA = 25_C VIN = 1.8 V 1.195 REFERENCE VOLTAGE, VREF/V 1.192 IREF = 0 mA 1.189 IREF = 2.5 mA 1.186 1.183 1.180 CREF = 1 μF TA = 25_C 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 VIN = 2.2 V 1 10 100 1000 OUTPUT CURRENT, ILOAD/mA INPUT VOLTAGE at OUT PIN, VOUT/V Figure 3. Reference Voltage versus Output Current 1.194 REFERENCE VOLTAGE, VREF/V 1.192 1.19 1.188 1.186 1.184 −40 VOUT = 3.3 V CREF = 150 nF IREF = 0 mA −20 0 20 40 60 80 100 2 Figure 4. Reference Voltage versus Input Voltage at OUT Pin SWITCH ON RESISTANCE, RDS(ON)/Ω 1.5 P−FET (M2) 1 N−FET (M1) 0.5 VOUT = 3.3 V 0 −40 −20 0 20 40 60 80 100 AMBIENT TEMPERATURE, TA/_C AMBIENT TEMPERATURE, TA/_C Figure 5. Reference Voltage versus Temperature Figure 6. Switch ON Resistance versus Temperature MIN. STARTUP BATTERY VOLTAGE, VBATT/V 1.8 Lx SWITCH MAX. ON TIME, tON/μS 1.7 1.6 1.5 1.4 1.3 1.2 −40 2.1 1.8 Without Schottky Diode 1.5 1.2 0.9 0.6 With Schottky Diode (MBR0502) −20 0 20 40 60 80 100 0 20 40 60 80 100 120 AMBIENT TEMPERATURE, TA/_C OUTPUT LOADING CURRENT, ILOAD/mA Figure 7. Lx Switch Max. ON Time versus Temperature Figure 8. Min. Startup Battery Voltage versus Loading Current http://onsemi.com 5 NCP1417 100 90 EFFICIENCY/% L = 22 μH EFFICIENCY/% 100 90 L = 27 μH L = 22 μH 80 L = 10 μH 70 60 50 VIN = 1.8 V VOUT = 3.3 V CIN = 10 μF COUT = 33 μF 1 10 L = 15 μH 80 70 60 50 VIN = 2.2 V VOUT = 5 V CIN = 10 μF COUT = 33 μF 1 10 100 1000 100 1000 OUTPUT LOADING CURRENT, ILOAD/mA OUTPUT LOADING CURRENT, ILOAD/mA Figure 9. Efficiency versus Load Current Figure 10. Efficiency versus Load Current 100 90 EFFICIENCY/% L = 22 μH EFFICIENCY/% 100 90 L = 27 μH L = 22 μH 80 70 60 50 VIN = 3 V VOUT = 5 V CIN = 10 μF COUT = 33 μF 1 10 100 1000 OUTPUT LOADING CURRENT, ILOAD/mA 80 L = 10 μH 70 60 50 VIN = 2.2 V VOUT = 3.3 V CIN = 10 μF COUT = 33 μF 1 10 L = 15 μH 100 1000 OUTPUT LOADING CURRENT, ILOAD/mA Figure 11. Efficiency versus Load Current Figure 12. Efficiency versus Load Current 100 90 EFFICIENCY/% L = 22 μH EFFICIENCY/% 100 L = 27 μH 90 L = 22 μH 80 70 60 50 L = 10 μH L = 15 μH 80 70 60 50 VIN = 4.5 V VOUT = 5 V CIN = 10 μF COUT = 33 μF 1 10 100 1000 VIN = 3 V VOUT = 3.3 V CIN = 10 μF COUT = 33 μF 1 10 100 1000 OUTPUT LOADING CURRENT, ILOAD/mA OUTPUT LOADING CURRENT, ILOAD/mA Figure 13. Efficiency versus Load Current Figure 14. Efficiency versus Load Current http://onsemi.com 6 NCP1417 3 OUTPUT VOLTAGE CHANGE/% 2 1 0 −1 −2 −3 3V 2.2 V L = 22 mH VOUT = 3.3 V CIN = 10 μF COUT = 33 μF 1 10 1.8 V OUTPUT VOLTAGE CHANGE/% 3 2 1 0 −1 −2 −3 1.8 V 3V 2.2 V L = 15 mH VOUT = 3.3 V CIN = 10 μF COUT = 33 μF 1 10 100 1000 100 1000 OUTPUT LOADING CURRENT, ILOAD/mA OUTPUT LOADING CURRENT, ILOAD/mA Figure 15. Output Voltage Change versus Load Current 100 RIPPLE VOLTAGE, VRIPPLE/mVp−p 80 100 mA 150 mA 60 40 20 0 VOUT = 3.3 V CIN = 10 μF COUT = 33 μF L = 22 mH 1 1.5 2 2.5 3 RIPPLE VOLTAGE, VRIPPLE/mVp−p 100 80 Figure 16. Output Voltage Change versus Load Current 100 mA 150 mA 60 40 20 0 VOUT = 3.3 V CIN = 10 μF COUT = 33 μF L = 15 mH 1 1.5 2 2.5 3 BATTERY INPUT VOLTAGE, VBATT/V BATTERY INPUT VOLTAGE, VBATT/V Figure 17. Battery Input Voltage versus Output Ripple Voltage NO LOAD OPERATING CURRENT, I BATT/μA 20 16 Figure 18. Battery Input Voltage versus Output Ripple Voltage 12 8 4 0 0 1 2 3 4 5 6 INPUT VOLTAGE AT OUT PIN, VOUT/V Upper Trace: Output Voltage Waveform, 1.0 V/Division Lower Trace: Shutdown Pin Waveform, 1.0 V/Division (VIN = 2.2 V, VOUT = 3.3 V, ILOAD = 100 mA; L = 22 μH, COUT = 33 μF) Figure 19. No Load Operating Current versus Input Voltage at OUT Pin Figure 20. Startup Transient Response http://onsemi.com 7 NCP1417 Upper Trace: Voltage at LX pin, 2.0 V/Division Middle Trace: Output Voltage Ripple, 50 mV/Division Lower Trace: Inductor Current, IL, 100 mA/Division (VIN = 2.2 V, VOUT = 3.3 V, ILOAD = 100 mA; L = 22 μH, COUT = 33 μF) Upper Trace: Voltage at LX pin, 2.0 V/Division Middle Trace: Output Voltage Ripple, 50 mV/Division Lower Trace: Inductor Current, IL, 100 mA/Division (VIN = 2.2 V, VOUT = 3.3 V, ILOAD = 30 mA; L = 22 μH, COUT = 33 μF) Figure 21. Continuous Conduction Mode Switching Waveform Figure 22. Discontinuous Conduction Mode Switching Waveform Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Battery Voltage, VIN, 1.0 V/Division (VIN = 1.8 V, VOUT = 3.0 V, L = 22 μH, COUT = 33 μF) Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Load Current, ILOAD, 50 mA/Division (VOUT = 3.3 V, ILOAD = 10 mA to 100 mA; L = 22 μH, COUT = 33 μF) Figure 23. Line Transient Response for VOUT = 3.3 V Figure 24. Load Transient Response for VIN = 1.8 V Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Load Current, ILOAD, 50 mA/Division (VOUT = 3.3 V, ILOAD = 10 mA to 100 mA; L = 22 μH, COUT = 33 μF) Upper Trace: Output Voltage Ripple, 100 mV/Division Lower Trace: Load Current, ILOAD, 50 mA/Division (VOUT = 3.3 V, ILOAD = 10 mA to 100 mA; L = 22 μH, COUT = 33 μF) Figure 25. Load Transient Response for VIN = 2.4 V Figure 26. Load Transient Response for VIN = 3.3 V http://onsemi.com 8 NCP1417 DETAILED OPERATION DESCRIPTIONS NCP1417 is a monolithic micropower high frequency step−up voltage switching converter IC specially designed for battery operated hand−held electronic products up to 200 mA loading. It integrates Synchronous Rectifier for improving efficiency as well as eliminating the external Schottky Diode. High switching frequency (up to 600 kHz) allows low profile inductor and output capacitor being used. Dual Low−Battery Detectors, Logic−Controlled Shutdown and Cycle−by−Cycle Current Limit provide value−added features for various battery−operated application. With all these functions ON, the quiescent supply current is only 9 μA typical. This device is available in compact Micro8 package. PFM Regulation Scheme From the simplified Functional Diagram (Figure 2), the output voltage is divided down and fed back to pin 1 (FB). This voltage goes to the non−inverting input of the PFM comparator whereas the comparator’s inverting input is connected to REF. A switching cycle is initiated by the falling edge of the comparator, at the moment, the main switch (M1) is turned ON. After the maximum ON−time (typical 1.4 mS) elapses or the current limit is reached, M1 is turned OFF, and the synchronous switch (M2) is turned ON. The M1 OFF time is not less than the minimum OFF−time (typical 0.25 mS), this is to ensure energy transfer from the inductor to the output capacitor. If the regulator is operating at continuous conduction mode (CCM), M2 is turned OFF just before M1 is supposed to be ON again. If the regulator is operating at discontinuous conduction mode (DCM), which means the coil current will decrease to zero before the next cycle, M1 is turned OFF as the coil current is almost reaching zero. The comparator (ZLC) with fixed offset is dedicated to sense the voltage drop across M2 as it is conducting, when the voltage drop is below the offset, the ZLC comparator output goes HIGH, and M2 is turned OFF. Negative feedback of closed loop operation regulates voltage at pin 1 (FB) equal to the internal voltage reference (1.190 V). Synchronous Rectification situation will occur. So dead time is introduced to make sure M2 is completely turned OFF before M1 is being turned ON. When the regulator is operating in DCM, as coil current is dropped to zero, M2 is supposed to be OFF. Fail to do so, reverse current will flow from the output bulk capacitor through M2 and then the inductor to the battery input. It causes damage to the battery. So the ZLC comparator comes with fixed offset voltage to switch M2 OFF before any reverse current builds up. However, if M2 is switch OFF too early, large residue coil current flows through the body diode of M2 and increases conduction loss. Therefore, determination on the offset voltage is essential for optimum performance. With the implementation of synchronous rectification, efficiency can be as high as 92%. For single cell input voltage, use an external schottky diode such as MBR0520 connected from pin 7 to pin 8 to ensure quick start−up. Cycle−by−Cycle Current Limit From Figure 2, SenseFET is applied to sample the coil current as M1 is ON. With that sample current flowing through a sense resistor, sense−voltage is developed. Threshold detector (ILIM) detects whether the sense−voltage is higher than preset level. If it happens, detector output signifies the CONTROL LOGIC to switch OFF M1, and M1 can only be switched ON as next cycle starts after the minimum OFF−time (typical 0.25 mS). With properly sizing of SenseFET and sense resistor, the peak coil current limit is set at 1.0 A typically. Voltage Reference The voltage at REF is set typically at +1.190 V. It can deliver up to 2.5 mA with load regulation ±1.5%, at VOUT equal to 3.3 V. If VOUT is increased, the REF load capability can also be increased. A bypass capacitor of 0.15 mF is required for proper operation when REF is not loaded. If REF is loaded, 1.0 mF capacitor at REF is needed. Shutdown Synchronous Rectifier is used to replace Schottky Diode to eliminate the conduction loss contributed by forward voltage drop of the latter. Synchronous Rectifier is normally realized by powerFET with gate control circuitry which, however, involved relative complicated timing concerns. As main switch M1 is being turned OFF, if the synchronous switch M2 is just turned ON with M1 not being completed turned OFF, current will be shunt from the output bulk capacitor through M2 and M1 to ground. This power loss lowers overall efficiency. So a certain amount of dead time is introduced to make sure M1 is completely OFF before M2 is being turned ON. When the main regulator is operating in CCM, as M2 is being turned OFF, and M1 is just turned ON with M2 not being completely turned OFF, the above mentioned The IC is shutdown when the voltage at pin 2 (LBI/SHDN) is pulled lower than 0.3 V via an open drain transistor. During shutdown, M1 and M2 are both switched OFF, however, the body diode of M2 allows current flow from battery to the output, the IC internal circuit will consume less than 0.05 mA current typically. If the pin 2 pull low is released, the IC will be enabled. The internal circuit will only consume 9.0 mA current typically from the OUT pin. Dual Low−Battery Detection Two comparators with 30 mV hysteresis are applied to perform the dual low−battery detection function. When pin 2 (LBI) is at a voltage, which can be defined by a resistor divider from the battery voltage, lower than the internal reference voltage, 1.190 V, the first comparator, CP1 output will cause a 50 W low side switch to be turned ON. It will pull down the voltage at pin 3 (LBO1) which has a hundreds kilo−Ohm of pull−high resistance. If the pin 2 voltage is http://onsemi.com 9 NCP1417 higher than 1.190 V + 30 mV, the comparator output will cause the 50 W low side switch to be turned OFF, pin 3 will become high impedance, and its voltage will be pulled high. The second low−battery detector functions in the same manner, the second comparator, CP2 with a lower triggering reference point derived from the internal reference is used instead, typical 0.944 V. This configuration provides two levels of low battery warning to the target system. APPLICATIONS INFORMATION Output Voltage Setting out of the capacitors multiplying with the Equivalent Series Resistance (ESR) of the capacitor producing ripple voltage at the terminals. During the syn−rect switch off cycle, the charges stored in the output capacitor is used to sustain the output load current. Load current at this period and the ESR combined and reflected as ripple at the output terminal. For all cases, the lower the capacitor ESR, the lower the ripple voltage at output. As a general guide line, low ESR capacitors should be used. Ceramic capacitors have the lowest ESR, but low ESR tantalum capacitors can also be used as a cost effective substitute. Optional Startup Schottky Diode for Low Battery Voltage The output voltage of the converter is determined by the external feedback network comprised of RFB1 and RFB2 and the relationship is given by: VOUT + 1.190 V R 1 ) FB1 RFB2 where RFB1 and RFB2 are the upper and lower feedback resistors respectively. Low Battery Detect Level Setting In general operation, no external schottky diode is required, however, in case you are intended to operate the device close to 1.0 V level, a schottky diode connected between the LX and OUT pins as shown in Figure 27 can help during startup of the converter. The effect of the additional schottky is shown in Figure 8. L MBR0520 VOUT The Low Battery Detect Voltages of the converter are determined by the external divider network comprised of RLB1 and RLB2 and the relationship is given by: VLB1 + 1.190 V R 1 ) LB1 RLB2 NCP1417 LX OUT where RLB1 and RLB2 are the upper and lower divider resistors respectively. By setting the VLB1, the second low battery detection point, VLB2 will be fixed automatically. Inductor Selection COUT The NCP1417 is tested to produce optimum performance with a 22 mH inductor at VIN = 3.0 V, VOUT = 3.3 V supplying output current up to 200 mA. For other input/output requirements, inductance in the range 10 mH to 47 mH can be used according to end application specifications. Selecting an inductor is a compromise between output current capability and tolerable output voltage ripple. Of course, the first thing we need to obey is to keep the peak inductor current below its saturation limit at maximum current and the ILIM of the device. In NCP1417, ILIM is set at 1.0 A. As a rule of thumb, low inductance values supply higher output current, but also increase the ripple at output and reducing efficiency, on the other hand, high inductance values can improve output ripple and efficiency, however it also limit the output current capability at the same time. One other parameter of the inductor is its DC resistance, this resistance can introduce unwanted power loss and hence reduce overall efficiency, the basic rule is selecting an inductor with lowest DC resistance within the board space limitation of the end application. Capacitors Selection Figure 27. PCB Layout Recommendations Good PCB layout plays an important role in switching mode power conversion. Careful PCB layout can help to minimize ground bounce, EMI noise and unwanted feedback that can affect the performance of the converter. Hints suggested in below can be used as a guide line in most situations. Grounding Star−ground connection should be used to connect the output power return ground, the input power return ground and the device power ground together at one point. All high current running paths must be thick enough for current flowing through and producing insignificant voltage drop along the path. Feedback signal path must be separated with the main current path and sensing directly at the anode of the output capacitor. Components Placement In all switching mode boost converter applications, both the input and output terminals sees impulsive voltage/current waveforms. The currents flowing into and Power components, i.e. input capacitor, inductor and output capacitor, must be placed as close together as possible. All connecting traces must be short, direct and thick. High current flowing and switching paths must be http://onsemi.com 10 NCP1417 kept away from the feedback (FB, pin 1) terminal to avoid unwanted injection of noise into the feedback path. Feedback Network must be placed very close to the feedback (FB, pin 1) pin and sensing the output voltage directly at the anode of the output capacitor. Feedback of the output voltage must be a separate trace detached from the power path. External feedback network TYPICAL APPLICATION CIRCUIT Input 1 V to VOUT CFB1 RFB2 308 K RLB1 Shutdown Open Drain Input Low Battery Open Drain Output 1 200 K 150 pF CIN 10 μF L 22 μH RFB1 355 K 1 2 3 4 RLB2 330 K NCP1417 FB LBI/SHDN LB01 REF OUT LX GND LB02 8 7 6 5 33 μF COUT + VOUT = 3.3 V/200 mA max. 56 nF CSHDN 150 nF CREF Low Battery Open Drain Output 2 Figure 28. Typical Application Schematic for 2 Alkaline Cells Supply GENERAL DESIGN PROCEDURES Switch mode converter design is considered as black magic to most engineers, some complicate empirical formulae are available for reference usage. Those formulae are derived from the assumption that the key components, i.e. power inductor and capacitors are available with no tolerance. Practically, its not true, the result is not a matter of how accurate the equations you are using to calculate the component values, the outcome is still somehow away from the optimum point. Following, is a simple method based on the most basic first order equations to estimate the inductor and capacitor values for NCP1417 operating in Continuous Conduction Mode. The component value set can be used as a starting point to fine tune the circuit operation. By all means, detail bench testing is needed to get the best performance out of the circuit. Design Parameters: VIN = 1.8 V to 3.0 V, Typical 2.4 V VOUT = 3.3 V IOUT = 150 mA (200 mA max) VLB1 = 2.3 V; VLB2 [ 0.8 VLB1 = 1.84 V VOUT−RIPPLE = 40 mVP−P at IOUT = 200 mA Calculate the feedback network: Select RFB2 = 200 K RFB1 + RFB2 VOUT *1 VREF RFB1 + 200 K 3.3 V * 1 + 355 K 1.19 V http://onsemi.com 11 NCP1417 With the feedback resistor divider, additional small capacitor, CFB1 in parallel with RFB1 is required to ensure stability. The value can be in between 68 pF to 220 pF, the rule is to select the lowest capacitance to ensure stability. Also a small capacitor, CFB2 in parallel with RFB2 may also be needed to lower the feedback ripple hence improve output ripple and regulation. In this example, only CFB1 is used and the value is 150 pF. Calculate the Low Battery Detect divider: VLB1 = 2.3 V Select RLB2 = 330 K RLB1 + RLB2 VLB1 *1 VREF I ILAVG + OUT + 200 mA + 275 mA 1 * 0.273 1*D Determine the peak inductor ripple current, IRIPPLE−P and calculate the inductor value: Assume IRIPPLE−P is 25% of ILAVG, the inductance of the power inductor can be calculated as follows: IRIPPLE−P + 0.25 L+ 275 mA + 68.8 mA VIN tON 2.4 V 1.4 mS + + 24.4 mH 2(68.8 mA) 2IRIPPLE−P Standard value of 22 mH is selected for initial trial. Determine the output voltage ripple, VOUT−RIPPLE and calculate the output capacitor value: VOUT * RIPPLE + 40 mVP−P at IOUT + 200 mA COUT u IOUT tON VOUT−RIPPLE * IOUT ESRCOUT 200 mA 1.4 mS + 28 mF 40 mV * 200 mA 0.15 W RLB1 + 330 K 2.3 V * 1 + 308 K 1.19 V Once the VLB1 is set, the next low battery detection point, VLB2 will be fixed automatically. Determine the Steady State Duty Ratio, D for typical VIN, operation will be optimized around this point: VOUT +1 VIN 1*D D+1* VIN + 1 * 2.4 V + 0.273 3.3 V VOUT where tON + 1.4 mS and ESRCOUT + 0.15 W, COUT u Determine the average inductor current, ILAVG at maximum IOUT : From above calculation, you need at least 28 mF in order to achieve the specified ripple level at conditions stated. Practically, a one level larger capacitor will be used to accommodate factors not take into account in the calculation. So a capacitor value of 33 mF is selected as initial trial. http://onsemi.com 12 NCP1417 PACKAGE DIMENSIONS Micro8 DM SUFFIX CASE 846A−02 ISSUE E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. DIM A B C D G H J K L MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 −−− 1.10 0.25 0.40 0.65 BSC 0.05 0.15 0.13 0.23 4.75 5.05 0.40 0.70 INCHES MIN MAX 0.114 0.122 0.114 0.122 −−− 0.043 0.010 0.016 0.026 BSC 0.002 0.006 0.005 0.009 0.187 0.199 0.016 0.028 − A− K − B− PIN 1 ID G D 8 PL 0.08 (0.003) M TB S A S −T− PLANE 0.038 (0.0015) H SEATING C J L Micro8 is a trademark of International Rectifier ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 13 NCP1417/D
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