NCP4352SNT1G

NCP4352 Secondary Side SMPS ECO Mode Controller for Low Standby Power The NCP4352 is a secondary side SMPS controller designed for use in applications which require extremely low consumption. The device is capable of detecting “light load” conditions and entering the power supply into low consumption “ECO mode”. During ECO mode, the output voltage decreases to an adjustable level, allowing higher efficiency for light load condition while keeping lower but regulated voltage supply. Once more energy is required, the NCP4352 automatically switches back to the normal mode regulation of output voltage. During normal power supply operation, the NCP4352 provides integrated voltage and current feedback regulation, replacing the need for a shunt regulator. Feedback control is provided through optocoupler to primary side SMPS controller. The NCP4352 is available in TSOP−6 package. Features • • • • • • • Operating Input Voltage Range: 2.5 V to 36.0 V Supply Current < 155 mA ±0.5% Reference Voltage Accuracy (TJ = 25°C) Constant Voltage Control Loop Constant Current Control Loop Designed for Use with Any Primary SMPS Controller These are Pb−free Devices TSOP−6 SN SUFFIX CASE 318G 1 E52AYWG G 1 E52 A Y W G = Specific Device Code = Assembly Location = Year = Work Week = Pb−Free Package PIN CONNECTIONS • Offline Adapters for Notebooks, Game Stations and Printers • High Power AC−DC Converters for TVs, Set−Top Boxes, Monitors etc. August, 2015 − Rev. 0 MARKING DIAGRAM (Note: Microdot may be in either location) Typical Applications © Semiconductor Components Industries, LLC, 2015 www.onsemi.com VCC VSNS GND ECODET FBC ISNS (Top View) ORDERING INFORMATION See detailed ordering and shipping information on page 9 of this data sheet. 1 Publication Order Number: NCP4352/D NCP4352 Current Regulation VCC VCC management I BIASV Power RESET VDD ISNS OTA Sink only VREFC SW3 V DD VREF FBC VSNS OTA Sink only Voltage Regulation VREF 0.9 x VREF IBIASV Enabling Q S Q R VCC ECO Mode Detection 10%VCC ECODET GND Power RESET Figure 1. Simplified Block Diagram Table 1. PIN FUNCTION DESCRIPTION NCP4352 Pin Name 1 VCC Supply voltage pin Description 2 GND Ground 6 VSNS Output voltage sensing pin, connected to output voltage divider 5 ECODET 4 ISNS Current sensing input for output current regulation, connect it to shunt resistor in ground branch. 3 FBC Output of current sinking OTA amplifiers driving feedback optocoupler’s LED. Connect here compensation network (networks) as well. ECO mode detection input. Voltage divider provides adjustable ECO mode detection threshold Table 2. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage VCC −0.3 to 40.0 V FBC Voltage VFBC −0.3 to VCC + 0.3 V VSNS,VISNS,VECODET −0.3 to 10.0 V RθJA 315 °C/W TJ −40 to 150 °C VSNS, ISNS, ECODET Voltage Thermal Resistance – Junction−to−Air (Note 1) Junction Temperature TSTG −60 to 150 °C ESD Capability, Human Body Model (Note 1) ESDHBM 2000 V ESD Capability, Machine Model (Note 1) ESDMM 250 V ESD Capability, Charged Device Model (Note 1) ESDCDM 1000 V Storage Temperature Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. 50 mm2, 1.0 oz. Copper spreader. 2. This device series incorporates ESD protection and is tested by the following methods: ESD Human Body Model tested per JESD22A−114F ESD Charged Device Model tested per JESD22−C101F Latch−up Current Maximum Rating tested per JEDEC standard: JESD78 class I. www.onsemi.com 2 NCP4352 Table 3. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Maximum Operating Input Voltage Min Max VCCMAX Operating Junction Temperature TJ Unit 36.0 V 125 °C −40 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Table 4. ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VCC = 15 V; unless otherwise noted. Typical values are at TJ = +25°C. Test Conditions Parameter VCC UVLO VCC rising Symbol Min Typ Max Unit VCCUVLO 3.3 3.5 3.7 V 2.3 2.5 2.7 VCC falling VCC UVLO Hysteresis Quiescent Current VCCUVLOHYS 0.8 ICC VECODET = 2 V, In regulation 1.0 V 105 140 VECODET = 0 V, VSNS < VSNSBIASTH 90 125 VECODET = 1 V, In regulation 120 155 mA VOLTAGE CONTROL LOOP OTA Transconductance Sink current only gmV Reference Voltage 2.8 V ≤ VCC ≤ 36.0 V, TJ = 25°C VREF 2.8 V ≤ VCC ≤ 36.0 V, TJ = 0 − 125°C Sink Current Capability ISINKV VFBC > 1.5 V, VECODET = 2 V VFBC > 1.5 V, VECODET = 1 V Inverting Input Bias Current IBIASV VSNS = VREF, VECODET = 2 V VSNS > VSNSBIASTH, VECODET = 1 V Inverting Input Bias Current Threshold VECODET = 1 V VSNSBIASTH 1 S 1.244 1.250 1.256 1.230 1.250 1.270 2.5 3.0 3.5 1.2 1.5 2.0 −100 V mA 100 nA −35 −31 −27 mA 1.07 1.12 1.17 V CURRENT CONTROL LOOP OTA Transconductance Sink current only gmC Reference Voltage VREFC 3 60.0 62.5 3.0 Sink Current Capability VFBC > 1.5 V, VECODET = 2 V ISINKC 2.5 Inverting Input Bias Current VISNS = VREFC IBIASC −100 S 65.0 mV 3.5 mA 100 nA ECO MODE DETECTION COMPARATOR Threshold Value 2.5 V ≤ VCC ≤ 36.0 V VECODETTH VCC = 15 V Hysteresis 1.47 Output change from logic high to logic low VECODETH V 10% VCC 1.50 40 1.53 mV Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 3 NCP4352 1.29 1.28 1.28 1.27 1.27 1.26 1.25 1.25 1.24 1.23 1.23 1.22 −20 0 20 40 60 80 0 120 100 12 18 24 VCC (V) Figure 2. VREF at VCC = 15 V Figure 3. VREF at TJ = 255C 64.5 64.0 64.0 63.5 63.5 63.0 62.5 62.0 30 36 30 36 63.0 62.5 62.0 61.5 61.5 61.0 61.0 60.5 −20 0 20 40 60 80 100 0 120 6 12 18 24 TJ (°C) VCC (V) Figure 4. VREFC at VCC = 15 V Figure 5. VREFC at TJ = 255C 3.8 1.53 3.6 VCCUVLO_R 1.52 VECODETTH (V) 3.4 3.2 3.0 2.8 2.6 2.4 −40 6 TJ (°C) 64.5 60.5 −40 VCC (V) 1.26 1.24 1.22 −40 VREFC (mV) VREF (V) 1.29 VREFC (mV) VREF (V) TYPICAL CHARACTERISTICS 0 20 40 60 1.50 1.49 1.48 VCCUVLO_F −20 1.51 80 100 1.47 −40 120 −20 0 20 40 60 80 100 TJ (°C) TJ (°C) Figure 6. VCCUVLO Rise and Fall Threshold Figure 7. VECODETTH at VCC = 15 V www.onsemi.com 4 120 NCP4352 TYPICAL CHARACTERISTICS 0.110 −27 0.108 −28 −29 0.104 IBIASV (mA) VECODETTH/VCC (−) 0.106 0.102 0.100 0.098 −32 −33 −34 0.092 0.090 0 10 20 30 −35 −40 −20 40 40 60 80 100 Figure 8. VECODETTH/VCC Ratio at TJ = 255C Figure 9. IBIASV at VCC = 15 V, VSNS > VSNSBIASTH, VECODET < 10% VCC 130 130 120 120 ICC (mA) 140 110 100 120 110 100 90 90 80 80 70 −20 0 20 40 60 80 100 0 120 6 12 18 24 30 TJ (°C) VCC (V) Figure 10. ICC in Regulation, VCC = 15 V, VECODET = 2 V Figure 11. ICC in Regulation, TJ = 255C, VECODET > 10% VCC 160 160 150 150 140 140 130 130 120 110 36 120 110 100 100 90 90 80 80 70 −40 20 TJ (°C) 140 70 −40 0 VCC (V) ICC (mA) ICC (mA) −31 0.096 0.094 ICC (mA) −30 70 −20 0 20 40 60 80 100 0 120 6 12 18 24 30 TJ (°C) VCC (V) Figure 12. ICC in ECO Mode, VCC = 15 V, VECODET = 1 V, VSNS = VREF Figure 13. ICC in ECO Mode, TJ = 255C, VECODET = 1 V, VSNS = VREF www.onsemi.com 5 36 NCP4352 120 120 110 110 100 100 ICC (mA) ICC (mA) TYPICAL CHARACTERISTICS 90 80 80 70 70 60 60 50 −40 −20 50 0 20 40 60 80 100 0 120 6 12 18 24 30 TJ (°C) VCC (V) Figure 14. ICC in ECO Mode, VCC = 15 V, VECODET = 0 V, VSNS < VSNSBIASTH Figure 15. ICC in ECO Mode, TJ = 255C, VECODET = 1 V, VSNS < VSNSBIASTH 3.5 2.0 3.4 1.9 3.3 36 1.8 ISINKV (mA) 3.2 3.1 3.0 2.9 2.8 1.7 1.6 1.5 1.4 2.7 2.6 2.5 −40 1.3 −20 0 20 40 60 80 100 1.2 −40 120 −20 0 20 40 60 80 100 120 TJ (°C) TJ (°C) Figure 16. Voltage OTA Current Sink Capability in Normal Mode, VCC = 15 V, VECODET = 2 V Figure 17. Voltage OTA Current Sink Capability in ECO Mode, VCC = 15 V, VECODET = 1 V 3.5 3.4 3.3 3.2 ISINKC (mA) ISINKV (mA) 90 3.1 3.0 2.9 2.8 2.7 2.6 2.5 −40 −20 0 20 40 60 80 100 TJ (°C) Figure 18. Current OTA Current Sink Capability in Normal Mode, VCC = 15 V, VECODET = 2 V www.onsemi.com 6 120 NCP4352 APPLICATION INFORMATION Current regulation point is set to current given by Equation 2. A typical application circuits for NCP4352 series is shown in Figure 19. Pin functions are available in pin description table. Figure 20 shows possible connection to flyback primary controller. This schematic uses one single optocoupler for both voltage and current regulation functions. Those schematics provide all possible functionalities. I OUTLIM + (eq. 2) ECO Mode Detection ECO mode operation is advantageous for ultra low output current condition. The reduced output voltage with very long skip off time and the low power mode of the whole regulation system reduces strongly the overall consumption. The output voltage is reduced to a second regulation point in ECO mode. When output voltage decreases, the overall output and regulation power are reduced. The ECO mode detection is based on comparison of output voltage and voltage loaded with fixed resistances (D2, R6, R7, R8 and C2). Figure 21 shows detection waveforms. When output voltage is loaded with very low current, primary controller goes into skip mode (primary controller stops switching for some time). While output power is reduced, thanks to the serial resistance R6, the voltage on capacitor C2 provides a voltage proportional to output power, allowing power level detection. Ones ECODET pin voltage goes lower than VECODETTH (this threshold is derived from VOUT = VCC), ECO mode is detected. This means that ECO mode is not activated until falling edge comes at ECODET pin. To reduce output voltage on C1 down to the new regulation point, the current IBIASV injected into VSNS pin provides the requested offset (VSNS voltage is higher than VREF). This offset, defined by R4, R5 and the internal current source, allows keeping the same output voltage resistances divider defined for the normal mode. Reduced output voltage in ECO mode can be computed by Equation 3. Power Supply The NCP4352 is designed to operate from a single supply up to 36 V. It starts to operate when VCC voltage reaches 3.5 V and stops when VCC voltage drops below 2.5 V. VCC can be supplied by direct connection to the VOUT voltage of the power supply. It is recommended to add a RC filter (R1 and C3) in series from VOUT to VCC pin to reduce voltage spikes and drops that are produced at the converter’s output capacitors. Recommended values for this filter are 220 Ω and 1 mF. Voltage Regulation Path The output voltage is detected on the VSNS pin by the R3 and R4 voltage divider. This voltage is compared with the internal precise voltage reference. The voltage difference is amplified by gmV of the transconductance amplifier. The amplifier output current is connected to the FBC pin. The compensation network is also connected to this pin to provide frequency compensation for the voltage regulation path. This FBC pin drives an optocoupler to prove the secondary side regulation. The optocoupler is supplied via direct connection to VOUT line through resistor R1. Regulation information is transferred through the optocoupler to the primary side controller where its FB pin is usually pulled down to reduce energy transferred to secondary output. The output voltage can be computed by Equation 1. V OUT + V REF R3 ) R4 R4 V REFC R11 (eq. 1) I R3 + Current Regulation Path V REF ) (R4 ) R5) @ I BIASV R4 (eq. 3) V OUT_ECO + I R3 @ R3 ) ǒI R3 * I BIASVǓ @ R4 The output current is sensed by the shut resistor R11 in series with the load. Voltage drop on R11 is compared with internal precise voltage reference VREFC at ISNS transconductance amplifier input. Voltage difference is amplified by gmC to output current of amplifier, connected to FBC pin. Compensation network is connected between this pin and ISNS input to provide frequency compensation for current regulation path. Current regulation OTA is activated only in normal mode, during ECO mode is turned−off to save energy. It doesn’t make any issue, because ECO mode is activated just in case of light load so current regulation path is not needed. The sink current on primary FB pin is so adjusted to keep primary controller FB in line with the new working point with reduced output voltage. Primary IC should be kept supplied from auxiliary winding of the transformer despite overall voltage reduction. This may ask for serial voltage regulator to avoid over voltage in normal mode. If output power increases such that ECODET pin voltage is higher than 10% of VCC, the ECO mode is ended and regulation is switched back to original normal mode. The IC also starts in normal mode after UVLO event. www.onsemi.com 7 NCP4352 R13 D2 ECO Supply D1 C2 C1 VOUT R3 Current Regulation VCC ISNS OTA Sink only VCC management C4 C3 R10 R9 VDD R12 VREFC IBIASV Power RESET SW3 VDD R11 VREF R6 Feedback Opto Sink only FBC R1 OTA VSNS Voltage Regulation VREF R7 R4 0.9 x VREF IBIASV Enabling Q S Q R VCC ECO Mode Detection 10%VCC ECODET GND R8 Power RESET Figure 19. Typical Application Schematic for ECO Mode NCP4352 D3 VCC R6 D2 D1 VIN D4 R13 ~ C1 C6 R1 R10 C5 C2 D5 R9 VOUT R3 C4 C3 HV VCC VCC DRV T1 FBC OPTO 1 VCC ISNS R2 R5 R14 C7 R12 R11 VSNS CS R4 FB GND R7 ECODET C8 GND ECO Mode Figure 20. Typical Application Schematic with Flyback and NCP4352 www.onsemi.com 8 R8 NCP4352 Primary Controller Activity Normal operation Skip ECO mode Very low or no load detected, ECO mode activated VECODET 10% VCC IOUT Figure 21. ECO Mode Detection ORDERING INFORMATION Device NCP4352SNT1G Marking Package Shipping† E52 TSOP−6 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TSOP−6 CASE 318G−02 ISSUE V 1 SCALE 2:1 D H ÉÉ ÉÉ 6 E1 1 NOTE 5 5 2 L2 4 GAUGE PLANE E 3 L b SEATING PLANE C DETAIL Z e DIM A A1 b c D E E1 e L L2 M c A 0.05 M DATE 12 JUN 2012 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.15 PER SIDE. DIMENSIONS D AND E1 ARE DETERMINED AT DATUM H. 5. PIN ONE INDICATOR MUST BE LOCATED IN THE INDICATED ZONE. A1 DETAIL Z MIN 0.90 0.01 0.25 0.10 2.90 2.50 1.30 0.85 0.20 0° MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 2.75 3.00 1.50 1.70 0.95 1.05 0.40 0.60 0.25 BSC 10° − STYLE 1: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 2: PIN 1. EMITTER 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. BASE 2 6. COLLECTOR 2 STYLE 3: PIN 1. ENABLE 2. N/C 3. R BOOST 4. Vz 5. V in 6. V out STYLE 4: PIN 1. N/C 2. V in 3. NOT USED 4. GROUND 5. ENABLE 6. LOAD STYLE 5: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 6: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 7: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. N/C 5. COLLECTOR 6. EMITTER STYLE 8: PIN 1. Vbus 2. D(in) 3. D(in)+ 4. D(out)+ 5. D(out) 6. GND STYLE 9: PIN 1. LOW VOLTAGE GATE 2. DRAIN 3. SOURCE 4. DRAIN 5. DRAIN 6. HIGH VOLTAGE GATE STYLE 10: PIN 1. D(OUT)+ 2. GND 3. D(OUT)− 4. D(IN)− 5. VBUS 6. D(IN)+ STYLE 11: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1/GATE 2 STYLE 12: PIN 1. I/O 2. GROUND 3. I/O 4. I/O 5. VCC 6. I/O STYLE 13: PIN 1. GATE 1 2. SOURCE 2 3. GATE 2 4. DRAIN 2 5. SOURCE 1 6. DRAIN 1 STYLE 14: PIN 1. ANODE 2. SOURCE 3. GATE 4. CATHODE/DRAIN 5. CATHODE/DRAIN 6. CATHODE/DRAIN STYLE 15: PIN 1. ANODE 2. SOURCE 3. GATE 4. DRAIN 5. N/C 6. CATHODE STYLE 16: PIN 1. ANODE/CATHODE 2. BASE 3. EMITTER 4. COLLECTOR 5. ANODE 6. CATHODE STYLE 17: PIN 1. EMITTER 2. BASE 3. ANODE/CATHODE 4. ANODE 5. CATHODE 6. COLLECTOR GENERIC MARKING DIAGRAM* RECOMMENDED SOLDERING FOOTPRINT* 6X 0.60 XXXAYWG G 1 6X 3.20 XXX A Y W G 0.95 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98ASB14888C TSOP−6 1 IC 0.95 XXX MG G = Specific Device Code =Assembly Location = Year = Work Week = Pb−Free Package STANDARD XXX = Specific Device Code M = Date Code G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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