NCS3402DR2G

NCS3402 Dual Nano-power Open Drain Output Comparator The NCS3402 is a nano−power comparator consuming only 470 nA per channel supply current, which make this device ideal for battery power and wireless handset applications. The NCS3402 has a minimum operating supply voltage of 2.7 V over the extended industrial temperature range (TA = −40°C to 125°C), while having an input common−mode range of −0.1 to VDD + 5 V. The ultra low supply current makes the NCS3402 an ideal choice for battery powered and portable applications where quiescent current is the primary concern. Reverse battery protection guards the amplifier from an over−current condition due to improper battery installation. For harsh environments, the inputs can be taken 5 V above the positive supply rail without damage to the device. • Low Supply Current: 470 nA/Per Channel Input Common−Mode Range exceeds the rails −0.1 V to VDD + 5 V Supply Voltage Range: 2.7 V to 16 V Reverse Battery Protection Up to 18 V Open Drain CMOS Output Stage Specified Temperature Range ♦ −40°C to 125°C This is a Pb−Free Device ♦ • ♦ 8 SOIC−8 D SUFFIX CASE 751 8 1 1 N3402 ALYWG G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package (Note: Microdot may be in either location) PIN CONNECTIONS Typical Applications • • • • MARKING DIAGRAMS A L Y W G Features • • • • http://onsemi.com Voltage Sense Circuit PSU Monitoring Circuit Wireless Handsets Portable Medical Equipment OUT1 1 8 VDD IN−1 2 7 OUT2 IN+1 3 6 IN−2 VSS 4 5 IN +2 (Top View) ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet. © Semiconductor Components Industries, LLC, 2013 April, 2013 − Rev. 2 1 Publication Order Number: NCS3402/D NCS3402 PIN FUNCTION DESCRIPTION Pin No. Pin Name 1 OUT1 Channel 1 Output Description 2 IN−1 Channel 1 Inverting Input 3 IN+2 Channel 2 Non−Inverting Input 4 VSS Negative Power Supply 5 IN+2 Channel 2 Non−Inverting Input 6 IN−2 Channel 2 Inverting Input 7 OUT2 Channel 2 Output 8 VDD Positive Power Supply ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage VDD 17 V Differential Input Voltage VID ±20 V Input Voltage Range (Notes 1 and 2) VIN 0 to VCC + 5 V Input Current Range IIN ±10 mA Output Current Range Io ±10 mA Operating Free−Air Temperature Range TA −40 to +125 °C Maximum Junction Temperature TJ 150 °C Storage Temperature Range TSTG −65 to 150 °C Lead Temperature 1.6 mm (1/16 inch) from case for 10 seconds TSLD 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. All voltage values, except differential voltages, are respect to GND 2. Input voltage range is limited to 20V or VCC +5 V whichever is smaller ESD RATINGS Rating Symbol Value Unit Human Body Model HBM 2000 V Machine Model MM 200 V Symbol Value Unit RqJA 176 °C/W THERMAL CHARACTERISTICS (Note 3) Rating Thermal Characteristics Thermal Resistance, Junction−to−Air SOIC8 3. Power dissipation must be considered to ensure the maximum junction temperature (qJA) is not exceeded. RECOMMENDED OPERATING CONDITIONS Parameter Symbol Min Max Single supply 2.7 16 Split supply ±1.35 ±8 VICR −0.1 VDD+5 V TA − 40 125 °C Supply voltage VDD Common−mode input voltage range Operating free−air temperature http://onsemi.com 2 Unit V NCS3402 DC PERFORMANCE ELECTRICAL CHARACTERISTICS AT SPECIFIED OPERATING FREE−AIR TEMPERATURE, VS = 2.7 V, 5 V, 15 V (unless otherwise noted) Parameter Symbol Testing Conditions TA Min 25°C Input offset voltage VIO Offset voltage drift DVIO VCM = VS/2, RS = 50 W, RP = 1 MW Common−mode rejection ratio Large−signal differential voltage amplification CMRR VCM = 0 to 5 V, RS = 50 W AVD Max 250 3600 Full range 4400 25°C VCM = 0 to 2.7 V, RS = 50 W Typ 3 25°C 55 Full range 50 25°C 60 Full range 55 25°C 65 VCM = 0 to 15 V, RS = 50 W Full range 60 RP = 1 MW 25°C Unit mV mV/°C 72 76 dB 88 1000 V/mV INPUT/OUTPUT CHARACTERISTICS SPECIFIED OPERATING FREE−AIR TEMPERATURE, VS = 2.7 V, 5 V, 15 V (unless otherwise noted) Input offset current (Note 4) 25°C IIO VCM = VS/2, RP = 1 MW, RS = 50 W 20 Full range 100 1000 25°C 80 pA 250 Input bias current (Note 4) IIB Differential input resistance RID Vin = VS/2 25°C 300 MW High−impedance output leakage current IOZ VCM = VS/2, VO = VCC, VID = 1 V 25°C 50 pA VCM = VS/2, IOL = 2 mA, VID = −1 V 25°C 8 25°C 80 Low−level output voltage Full range VOL VCM = VS/2, IOL = 50 mA, VID = −1 V 3000 Full range 200 pA mV 300 POWER SUPPLY SPECIFIED OPERATING FREE−AIR TEMPERATURE, VCC = 2.7 V, 5 V, 15 V (unless otherwise noted) 25°C Output state low Supply current (per channel) ICC RP = No pullup VCC = 2.7 V to 5 V PSRR Full range VCM = VS/2, No load VCC = 5 V to 15 V 4. Guaranteed by design or characterization. http://onsemi.com 3 550 750 25°C Output state high Power supply rejection ratio 470 560 Full range 640 nA 950 25°C 75 Full range 70 25°C 85 Full range 80 100 105 dB NCS3402 SWITCHING CHARACTERISTICS AT RECOMMENDED OPERATING CONDITIONS, VCC = 2.7 V, 5 V, 15 V, TA = 25°C (unless otherwise noted) Parameter Symbol Testing Conditions TA Overdrive = 2 mV Propagation delay time, low−to−high−level Propagation delay time, high−to−low−level output t(PLH) t(PHL) Overdrive = 10 mV f = 10 kHz, VSTEP = 100 mV, RP = 1 MW, CL = 10 pF tf Typ 25°C 30 Overdrive = 2 mV 250 RP = 1 MW, CL = 10 pF http://onsemi.com 4 Unit 85 Overdrive = 50 mV Overdrive = 10 mV Max 220 25°C Overdrive = 50 mV Fall time Min ms 55 18 25°C 5 ms NCS3402 3.5 IIB− IIB+ IIO 2.5 2.0 1.5 1.0 0.5 0 2.7 5 20 35 50 65 80 95 1.5 1.5 1.2 5V 0.5 5 20 35 50 65 80 95 110 125 5 0.9 0.6 0.3 0.1 0.2 0.3 0.4 0.5 0.6 0.7 4 −40 0 25 70 125 3.5 3 2.5 2 1.5 1 0.5 0 0.8 VDD = 5 V VID = −1 V 4.5 0 0.4 0.8 1.2 1.6 2 2.4 IOL, LOW LEVEL OUTPUT CURRENT (mA) IOL, LOW LEVEL OUTPUT CURRENT (mA) Figure 3. Low Level Output Voltage vs. Low Level Output Current Figure 4. Low Level Output Voltage vs. Low Level Output Current 15 800 13.5 700 12 10.5 9 7.5 −40 0 25 70 125 6 4.5 3 VDD = 15 V VID = −1 V 1.5 0 2.7 V 1.0 Figure 2. Open Drain Leakage Current vs. Temperature 1.8 0 15 V Figure 1. Input Bias/Offset Current vs. Temperature −40 0 25 70 125 0 2.0 AMBIENT TEMPREATURE (°C) 2.1 0 2.7 V 5V 15 V 2.5 AMBIENT TEMPREATURE (°C) VDD = 2.7 V VID = −1 V 2.4 VID = 1 V 0 −40 −25 −10 110 125 VOL, LOW LEVEL VOLTAGE (V) VOL, LOW LEVEL VOLTAGE (V) OUTPUT LEAKAGE (nA) 3.0 −40 −25 −10 VOL, LOW LEVEL VOLTAGE (V) 3.0 VDD = 15 V RP = 1 MW IDD, CURRENT (nA) INPUT BIAS/OFFSET CURRENT (nA) TYPICAL CHARACTERISTICS 0.4 0.8 1.2 1.6 2 2.4 VID = −1 V 600 500 400 300 −40 0 25 70 125 200 100 2.8 0 0 2 4 6 8 10 12 14 IOL, LOW LEVEL OUTPUT CURRENT (mA) VDD SUPPLY (V) Figure 5. Low Level Output Voltage vs. Low Level Output Current Figure 6. IDD vs. VDD vs. Temperature http://onsemi.com 5 2.8 16 NCS3402 TYPICAL CHARACTERISTICS 5V 2.7 V 300 200 100 0 −40 −25 −10 5 20 35 50 65 80 95 50 mV 110 125 TIME (25 ms/div) Figure 8. Propagation Delay L−H (2.7 V) 2 mV INPUT INPUT AMPLITUDE (50 mV/div) OUTPUT AMPLITUDE (500 mV/div) 10 mV VDD = 15 V CL = 10 pF RP = 1 MW to VDD TA = 25°C 50 mV 2 mV 10 mV INPUT TIME (25 ms/div) Figure 10. Propagation Delay L−H (15 V) 2 mV 50 mV 10 mV INPUT VDD = 2.7 V CL = 10 pF RP = 1 MW to VDD TA = 25°C INPUT AMPLITUDE (50 mV/div) TIME (25 ms/div) Figure 9. Propagation Delay L−H (5 V) OUTPUT AMPLITUDE (250 mV/div) INPUT AMPLITUDE (50 mV/div) Figure 7. Supply Current vs. Free−Air Temperature 50 mV 2 mV INPUT FREE−AIR TEMPERATURE (°C) VDD = 2.7 V CL = 10 pF RP = 1 MW to VDD TA = 25°C 10 mV 50 mV 2 mV 10 mV INPUT VDD = 5 V CL = 10 pF RP = 1 MW to VDD TA = 25°C TIME (25 ms/div) TIME (25 ms/div) Figure 11. Propagation Delay H−L (2.7 V) Figure 12. Propagation Delay H−L (5 V) http://onsemi.com 6 OUTPUT AMPLITUDE (2 V/div) 400 OUTPUT AMPLITUDE (500 mV/div) 15 V 500 INPUT AMPLITUDE (25 mV/div) SUPPLY CURRENT (nA) 600 VDD = 2.7 V CL = 10 pF RP = 1 MW to VDD TA = 25°C OUTPUT AMPLITUDE (250 mV/div) INPUT AMPLITUDE (25 mV/div) 700 NCS3402 50 mV 10 mV 2 mV INPUT 8 7 6 FALL TIME (ms) VDD = 15 V CL = 10 pF RP = 1 MW to VDD TA = 25°C OUTPUT AMPLITUDE (2 V/div) INPUT AMPLITUDE (50 mV/div) TYPICAL CHARACTERISTICS VID = 1 to -1V RP = 1 MW to VDD 3 Devices Shown TA = 25°C 5 4 1 − 10 pF 1 − 50 pF 2 − 10 pF 2 − 50 pF 3 − 10 pF 3 − 50 pF 3 2 1 0 TIME (25 ms/div) 2.7 3 4 5 6 7 8 9 10 11 12 13 14 15 SUPPLY VOLTAGE (V) Figure 13. Propagation Delay H−L (15 V) Figure 14. Output Fall Time vs. Power Supply ORDERING INFORMATION Device NCS3402DR2G Package Shipping† SOIC−8 (Pb−Free) 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 7 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AK 8 1 SCALE 1:1 −X− DATE 16 FEB 2011 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. A 8 5 S B 0.25 (0.010) M Y M 1 4 −Y− K G C N X 45 _ SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X J S 8 8 1 1 IC 4.0 0.155 XXXXX A L Y W G IC (Pb−Free) = Specific Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package XXXXXX AYWW 1 1 Discrete XXXXXX AYWW G Discrete (Pb−Free) XXXXXX = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 1.270 0.050 SCALE 6:1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 _ 8 _ 0.010 0.020 0.228 0.244 8 8 XXXXX ALYWX G XXXXX ALYWX 1.52 0.060 0.6 0.024 MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 GENERIC MARKING DIAGRAM* SOLDERING FOOTPRINT* 7.0 0.275 DIM A B C D G H J K M N S mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SOIC−8 NB CASE 751−07 ISSUE AK DATE 16 FEB 2011 STYLE 1: PIN 1. EMITTER 2. COLLECTOR 3. COLLECTOR 4. EMITTER 5. EMITTER 6. BASE 7. BASE 8. EMITTER STYLE 2: PIN 1. COLLECTOR, DIE, #1 2. COLLECTOR, #1 3. COLLECTOR, #2 4. COLLECTOR, #2 5. BASE, #2 6. EMITTER, #2 7. BASE, #1 8. EMITTER, #1 STYLE 3: PIN 1. DRAIN, DIE #1 2. DRAIN, #1 3. DRAIN, #2 4. DRAIN, #2 5. GATE, #2 6. SOURCE, #2 7. GATE, #1 8. SOURCE, #1 STYLE 4: PIN 1. ANODE 2. ANODE 3. ANODE 4. ANODE 5. ANODE 6. ANODE 7. ANODE 8. COMMON CATHODE STYLE 5: PIN 1. DRAIN 2. DRAIN 3. DRAIN 4. DRAIN 5. GATE 6. GATE 7. SOURCE 8. SOURCE STYLE 6: PIN 1. SOURCE 2. DRAIN 3. DRAIN 4. SOURCE 5. SOURCE 6. GATE 7. GATE 8. SOURCE STYLE 7: PIN 1. INPUT 2. EXTERNAL BYPASS 3. THIRD STAGE SOURCE 4. GROUND 5. DRAIN 6. GATE 3 7. SECOND STAGE Vd 8. FIRST STAGE Vd STYLE 8: PIN 1. COLLECTOR, DIE #1 2. BASE, #1 3. BASE, #2 4. COLLECTOR, #2 5. COLLECTOR, #2 6. EMITTER, #2 7. EMITTER, #1 8. COLLECTOR, #1 STYLE 9: PIN 1. EMITTER, COMMON 2. COLLECTOR, DIE #1 3. COLLECTOR, DIE #2 4. EMITTER, COMMON 5. EMITTER, COMMON 6. BASE, DIE #2 7. BASE, DIE #1 8. EMITTER, COMMON STYLE 10: PIN 1. GROUND 2. BIAS 1 3. OUTPUT 4. GROUND 5. GROUND 6. BIAS 2 7. INPUT 8. GROUND STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 STYLE 12: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 13: PIN 1. N.C. 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 14: PIN 1. N−SOURCE 2. N−GATE 3. P−SOURCE 4. P−GATE 5. P−DRAIN 6. P−DRAIN 7. N−DRAIN 8. N−DRAIN STYLE 15: PIN 1. ANODE 1 2. ANODE 1 3. ANODE 1 4. ANODE 1 5. CATHODE, COMMON 6. CATHODE, COMMON 7. CATHODE, COMMON 8. CATHODE, COMMON STYLE 16: PIN 1. EMITTER, DIE #1 2. BASE, DIE #1 3. EMITTER, DIE #2 4. BASE, DIE #2 5. COLLECTOR, DIE #2 6. COLLECTOR, DIE #2 7. COLLECTOR, DIE #1 8. COLLECTOR, DIE #1 STYLE 17: PIN 1. VCC 2. V2OUT 3. V1OUT 4. TXE 5. RXE 6. VEE 7. GND 8. ACC STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE STYLE 19: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. MIRROR 2 7. DRAIN 1 8. MIRROR 1 STYLE 20: PIN 1. SOURCE (N) 2. GATE (N) 3. SOURCE (P) 4. GATE (P) 5. DRAIN 6. DRAIN 7. DRAIN 8. DRAIN STYLE 21: PIN 1. CATHODE 1 2. CATHODE 2 3. CATHODE 3 4. CATHODE 4 5. CATHODE 5 6. COMMON ANODE 7. COMMON ANODE 8. CATHODE 6 STYLE 22: PIN 1. I/O LINE 1 2. COMMON CATHODE/VCC 3. COMMON CATHODE/VCC 4. I/O LINE 3 5. COMMON ANODE/GND 6. I/O LINE 4 7. I/O LINE 5 8. COMMON ANODE/GND STYLE 23: PIN 1. LINE 1 IN 2. COMMON ANODE/GND 3. COMMON ANODE/GND 4. LINE 2 IN 5. LINE 2 OUT 6. COMMON ANODE/GND 7. COMMON ANODE/GND 8. LINE 1 OUT STYLE 24: PIN 1. BASE 2. EMITTER 3. COLLECTOR/ANODE 4. COLLECTOR/ANODE 5. CATHODE 6. CATHODE 7. COLLECTOR/ANODE 8. COLLECTOR/ANODE STYLE 25: PIN 1. VIN 2. N/C 3. REXT 4. GND 5. IOUT 6. IOUT 7. IOUT 8. IOUT STYLE 26: PIN 1. GND 2. dv/dt 3. ENABLE 4. ILIMIT 5. SOURCE 6. SOURCE 7. SOURCE 8. VCC STYLE 29: PIN 1. BASE, DIE #1 2. EMITTER, #1 3. BASE, #2 4. EMITTER, #2 5. COLLECTOR, #2 6. COLLECTOR, #2 7. COLLECTOR, #1 8. COLLECTOR, #1 STYLE 30: PIN 1. DRAIN 1 2. DRAIN 1 3. GATE 2 4. SOURCE 2 5. SOURCE 1/DRAIN 2 6. SOURCE 1/DRAIN 2 7. SOURCE 1/DRAIN 2 8. GATE 1 DOCUMENT NUMBER: DESCRIPTION: 98ASB42564B SOIC−8 NB STYLE 27: PIN 1. ILIMIT 2. OVLO 3. UVLO 4. INPUT+ 5. SOURCE 6. SOURCE 7. SOURCE 8. DRAIN STYLE 28: PIN 1. SW_TO_GND 2. DASIC_OFF 3. DASIC_SW_DET 4. GND 5. V_MON 6. VBULK 7. VBULK 8. VIN Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 onsemi and are trademarks of Semiconductor Components Industries, LLC dba onsemi or its subsidiaries in the United States and/or other countries. onsemi reserves the right to make changes without further notice to any products herein. onsemi makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. onsemi does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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