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www.onsemi.com
onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi
product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all
liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees,
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associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
Low Noise, Audio Dual
Operational Amplifier
LM833, NCV833
The LM833 is a standard low−cost monolithic dual general−purpose
operational amplifier employing Bipolar technology with innovative
high−performance concepts for audio systems applications. With high
frequency PNP transistors, the LM833 offers low voltage noise
(4.5 nV/ Hz ), 15 MHz gain bandwidth product, 7.0 V/ms slew rate,
0.3 mV input offset voltage with 2.0 mV/°C temperature coefficient of
input offset voltage. The LM833 output stage exhibits no dead−band
crossover distortion, large output voltage swing, excellent phase and
gain margins, low open loop high frequency output impedance and
symmetrical source/sink AC frequency response.
For an improved performance dual/quad version, see the MC33079
family.
•
MARKING
DIAGRAMS
8
1
LM833N
A
WL
YY
WW
G
Low Voltage Noise: 4.5 nV/ ǸHz
High Gain Bandwidth Product: 15 MHz
High Slew Rate: 7.0 V/ms
Low Input Offset Voltage: 0.3 mV
Low T.C. of Input Offset Voltage: 2.0 mV/°C
Low Distortion: 0.002%
Excellent Frequency Stability
Dual Supply Operation
NCV Prefix for Automotive and Other Applications Requiring Site
and Change Controls
These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
Rating
Supply Voltage (VCC to VEE)
Symbol
Value
Unit
VS
+36
V
Input Differential Voltage Range (Note 1)
VIDR
30
V
Input Voltage Range (Note 1)
VIR
±15
V
Output Short Circuit Duration (Note 2)
tSC
Indefinite
Operating Ambient Temperature Range
TA
−40 to +85
°C
Operating Junction Temperature
TJ
+150
°C
Storage Temperature
Tstg
−60 to +150
°C
ESD Protection at any Pin
− Human Body Model
− Machine Model
Maximum Power Dissipation (Notes 2 and 3)
Vesd
PD
V
600
200
February, 2021 − Rev. 7
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
LM833
ALYW
G
SOIC−8
D SUFFIX
CASE 751
1
1
LM833
A
L
Y
W
G
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
Output 1
1
2
1
8
VCC
7
Output 2
Inputs 1
3
6
2
500
mW
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Either or both input voltages must not exceed the magnitude of VCC or VEE.
2. Power dissipation must be considered to ensure maximum junction
temperature (TJ) is not exceeded (see power dissipation performance
characteristic).
3. Maximum value at TA ≤ 85°C.
© Semiconductor Components Industries, LLC, 2011
LM833N
AWL
YYWWG
PDIP−8
N SUFFIX
CASE 626
1
Features
•
•
•
•
•
•
•
•
•
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1
VEE
4
Inputs 2
5
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
LM833/D
LM833, NCV833
ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
VIO
−
0.3
5.0
mV
DVIO/DT
−
2.0
−
mV/°C
Input Offset Current (VCM = 0 V, VO = 0 V)
IIO
−
10
200
nA
Input Bias Current (VCM = 0 V, VO = 0 V)
IIB
−
300
1000
nA
Common Mode Input Voltage Range
VICR
−
−12
+14
−14
+12
−
V
Large Signal Voltage Gain (RL = 2.0 kW, VO = ±10 V)
AVOL
90
110
−
dB
Output Voltage Swing:
RL = 2.0 kW, VID = 1.0 V
RL = 2.0 kW, VID = 1.0 V
RL = 10 kW, VID = 1.0 V
RL = 10 kW, VID = 1.0 V
VO+
VO−
VO+
VO−
10
−
12
−
13.7
−14.1
13.9
−14.7
−
−10
−
−12
Common Mode Rejection (Vin = ±12 V)
CMR
80
100
−
Power Supply Rejection (VS = 15 V to 5.0 V, −15 V to −5.0 V)
PSR
80
115
−
dB
ID
−
4.0
8.0
mA
Characteristic
Input Offset Voltage (RS = 10 W, VO = 0 V)
Average Temperature Coefficient of Input Offset Voltage
RS = 10 W, VO = 0 V, TA = Tlow to Thigh
Power Supply Current (VO = 0 V, Both Amplifiers)
V
dB
AC ELECTRICAL CHARACTERISTICS (VCC = +15 V, VEE = −15 V, TA = 25°C, unless otherwise noted.)
Symbol
Min
Typ
Max
Unit
SR
5.0
7.0
−
V/ms
GBW
10
15
−
MHz
Unity Gain Frequency (Open Loop)
fU
−
9.0
−
MHz
Unity Gain Phase Margin (Open Loop)
qm
−
60
−
Equivalent Input Noise Voltage (RS = 100 W, f = 1.0 kHz)
en
−
4.5
−
nVń ǸHz
Equivalent Input Noise Current (f = 1.0 kHz)
in
−
0.5
−
pAń ǸHz
Power Bandwidth (VO = 27 Vpp, RL = 2.0 kW, THD ≤ 1.0%)
BWP
−
120
−
kHz
Distortion (RL = 2.0 kW, f = 20 Hz to 20 kHz, VO = 3.0 Vrms, AV = +1.0)
THD
−
0.002
−
%
CS
−
−120
−
dB
Characteristic
Slew Rate (Vin = −10 V to +10 V, RL = 2.0 kW, AV = +1.0)
Gain Bandwidth Product (f = 100 kHz)
1000
800
IIB , INPUT BIAS CURRENT (nA)
PD , MAXIMUM POWER DISSIPATION (mW)
Channel Separation (f = 20 Hz to 20 kHz)
600
400
200
0
-50
°
0
50
100
VCC = +15 V
VEE = -15 V
VCM = 0 V
800
600
400
200
0
-55
150
-25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 1. Maximum Power Dissipation
versus Temperature
Figure 2. Input Bias Current versus Temperature
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2
LM833, NCV833
10
TA = 25°C
IS , SUPPLY CURRENT (mA)
I IB , INPUT BIAS CURRENT (nA)
800
600
400
200
0
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
VCC
8.0
6.0
VO
+
VEE
4.0
2.0
0
20
RL = ∞
TA = 25°C
IS
0
5.0
Figure 3. Input Bias Current versus
Supply Voltage
110
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
105
100
95
90
-55
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
RL = 2.0 kW
TA = 25°C
100
90
80
125
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
100
45
80
Phase
40
20
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
TA = 25°C
Gain
135
0
1.0
10
100
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
90
1.0 M
180
10 M
GBW, GAIN BANDWIDTH PRODUCT (MHz)
0
60
20
Figure 6. DC Voltage Gain versus
Supply Voltage
∅ , EXCESS PHASE (DEGREES)
AVOL, OPEN LOOP VOLTAGE GAIN (dB)
Figure 5. DC Voltage Gain
versus Temperature
120
20
Figure 4. Supply Current versus
Supply Voltage
AVOL, DC VOLTAGE GAIN (dB)
AVOL, DC VOLTAGE GAIN (dB)
110
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
20
15
10
5.0
0
-55
Figure 7. Open Loop Voltage Gain and
Phase versus Frequency
VCC = +15 V
VEE = -15 V
f = 100 kHz
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
Figure 8. Gain Bandwidth Product
versus Temperature
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3
125
LM833, NCV833
GBW, GAIN BANDWIDTH PRODUCT (MHz)
30
10
SR, SLEW RATE (V/ μs)
f = 100 kHz
TA = 25°C
20
10
0
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
8.0
Falling
Rising
6.0
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
AV = +1.0
4.0
2.0
-55
20
Figure 9. Gain Bandwidth Product versus
Supply Voltage
SR, SLEW RATE (V/ μ s)
8.0
RL = 2.0k W
AV = +1.0
TA = 25°C
Falling
4.0
+
Vin
2.0
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
VO
RL
100
125
35
Rising
6.0
+
Figure 10. Slew Rate versus Temperature
VO, OUTPUT VOLTAGE (Vpp )
10
-25
Vin
VO
RL
30
25
20
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
THD v 1.0%
TA = 25°C
15
10
5.0
0
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
0
20
10
VO, OUTPUT VOLTAGE (Vpp )
20
15
RL = 10 kW
TA = 25°C
VO +
10
5.0
0
-5.0
-10
VO -
-15
-20
5.0
10
15
VCC, |VEE|, SUPPLY VOLTAGE (V)
1.0 k
10 k
100 k
f, FREQUENCY (Hz)
1M
10 M
Figure 12. Output Voltage versus Frequency
V sat , OUTPUT SATURATION VOLTAGE |V|
Figure 11. Slew Rate versus Supply Voltage
100
20
15
+Vsat
-Vsat
14
VCC = +15 V
VEE = -15 V
RL = 10 kW
13
-55
Figure 13. Maximum Output Voltage
versus Supply Voltage
-25
0
25
50
75
TA, AMBIENT TEMPERATURE (°C)
100
Figure 14. Output Saturation Voltage
versus Temperature
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4
125
PSR, POWER SUPPLY REJECTION (dB)
140
VCC = +15 V
VEE = -15 V
TA = 25°C
120
100
80
CMR, COMMON MODE REJECTION (dB)
LM833, NCV833
DVCC
-
ADM
DVO
+
DVEE
-PSR
+PSR
60
40
20
+PSR = 20 Log
-PSR = 20 Log
0
100
1.0 k
DVO/ADM
( DVCC )
( DVDVO/AEEDM )
10 k
100 k
f, FREQUENCY (Hz)
1.0 M
160
DVCM
140
+
CMR = 20 Log
100
80
VCC = +15 V
VEE = -15 V
VCM = 0 V
DVCM = ±1.5 V
TA = 25°C
60
40
20
100
10 M
-
+
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
TA = 25°C
VO
RL
0.01
10 M
VO = 1.0 Vrms
VO = 3.0 Vrms
100
1.0 k
10 k
VCC = +15 V
VEE = -15 V
RS = 100 W
TA = 25°C
2.0
1.0
100 k
10
Figure 17. Total Harmonic Distortion
versus Frequency
100
2.0
100
VCC = +15 V
VEE = -15 V
TA = 25°C
1.0
0.7
0.5
0.4
0.3
100
1.0 k
f, FREQUENCY (Hz)
10 k
1.0 k
f, FREQUENCY (Hz)
10 k
100 k
Figure 18. Input Referred Noise Voltage
versus Frequency
e n, INPUT NOISE VOLTAGE (nV/√ Hz )
i n , INPUT NOISE CURRENT (pA/√ Hz )
1.0 M
5.0
f, FREQUENCY (Hz)
0.2
10
10 k
100 k
f, FREQUENCY (Hz)
10
e n, INPUT NOISE VOLTAGE (nV/√ Hz )
THD, TOTAL HARMONIC DISTORTION (%)
1.0 k
Figure 16. Common Mode Rejection
versus Frequency
1.0
0.001
10
DVO
DVCM
× ADM
DV0
120
Figure 15. Power Supply Rejection
versus Frequency
0.1
-
ADM
VCC = +15 V
VEE = -15 V
Vn(total) = (inRS)2 +en2 + Ǹ
4KTRS
TA = 25°C
10
1.0
1.0
100 k
10
100
1.0 k
10 k
100 k
RS, SOURCE RESISTANCE (W)
Figure 19. Input Referred Noise Current
versus Frequency
Figure 20. Input Referred Noise Voltage
versus Source Resistance
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5
1.0 M
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
CL = 0 pF
AV = -1.0
TA = 25°C
VO , OUTPUT VOLTAGE (5.0 V/DIV)
VO , OUTPUT VOLTAGE (5.0 V/DIV)
LM833, NCV833
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
CL = 0 pF
AV = +1.0
TA = 25°C
t, TIME (2.0 ms/DIV)
t, TIME (2.0 ms/DIV)
VO , OUTPUT VOLTAGE (10 mV/DIV)
Figure 21. Inverting Amplifier
Figure 22. Noninverting Amplifier Slew Rate
VCC = +15 V
VEE = -15 V
RL = 2.0 kW
CL = 0 pF
AV = +1.0
TA = 25°C
t, TIME (200 ns/DIV)
Figure 23. Noninverting Amplifier Overshoot
ORDERING INFORMATION
Package
Shipping†
LM833NG
PDIP−8
(Pb−Free)
50 Units / Rail
LM833DG
SOIC−8
(Pb−Free)
98 Units / Rail
LM833DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCV833DR2G*
SOIC−8
(Pb−Free)
2500 / Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NCV prefix indicates qualified for automotive use.
www.onsemi.com
6
LM833, NCV833
PACKAGE DIMENSIONS
PDIP−8
N SUFFIX
CASE 626−05
ISSUE M
D
A
E
H
8
5
E1
1
4
NOTE 8
b2
c
B
END VIEW
TOP VIEW
WITH LEADS CONSTRAINED
NOTE 5
A2
A
e/2
NOTE 3
L
SEATING
PLANE
A1
C
D1
M
e
8X
SIDE VIEW
b
0.010
eB
END VIEW
M
C A
M
B
M
NOTE 6
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7
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. DIMENSIONS A, A1 AND L ARE MEASURED WITH THE PACKAGE SEATED IN JEDEC SEATING PLANE GAUGE GS−3.
4. DIMENSIONS D, D1 AND E1 DO NOT INCLUDE MOLD FLASH
OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS ARE
NOT TO EXCEED 0.10 INCH.
5. DIMENSION E IS MEASURED AT A POINT 0.015 BELOW DATUM
PLANE H WITH THE LEADS CONSTRAINED PERPENDICULAR
TO DATUM C.
6. DIMENSION eB IS MEASURED AT THE LEAD TIPS WITH THE
LEADS UNCONSTRAINED.
7. DATUM PLANE H IS COINCIDENT WITH THE BOTTOM OF THE
LEADS, WHERE THE LEADS EXIT THE BODY.
8. PACKAGE CONTOUR IS OPTIONAL (ROUNDED OR SQUARE
CORNERS).
DIM
A
A1
A2
b
b2
C
D
D1
E
E1
e
eB
L
M
INCHES
MIN
MAX
−−−−
0.210
0.015
−−−−
0.115 0.195
0.014 0.022
0.060 TYP
0.008 0.014
0.355 0.400
0.005
−−−−
0.300 0.325
0.240 0.280
0.100 BSC
−−−−
0.430
0.115 0.150
−−−−
10 °
MILLIMETERS
MIN
MAX
−−−
5.33
0.38
−−−
2.92
4.95
0.35
0.56
1.52 TYP
0.20
0.36
9.02
10.16
0.13
−−−
7.62
8.26
6.10
7.11
2.54 BSC
−−−
10.92
2.92
3.81
−−−
10 °
LM833, NCV833
PACKAGE DIMENSIONS
SOIC−8
D SUFFIX
CASE 751−07
ISSUE AK
−X−
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
−Y−
K
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
D
0.25 (0.010)
M
Z Y
S
X
M
J
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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8
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