NCV8401ADTRKG

NCV8401A, NCV8401B Self-Protected Low Side Driver with Temperature and Current Limit NCV8401A/B is a three terminal protected Low-Side Smart Discrete device. The protection features include overcurrent, overtemperature, ESD and integrated Drain-to-Gate clamping for overvoltage protection. This device offers protection and is suitable for harsh automotive environments. Features • • • • • • • • • Short Circuit Protection Thermal Shutdown with Automatic Restart Over Voltage Protection Integrated Clamp for Inductive Switching ESD Protection dV/dt Robustness Analog Drive Capability (Logic Level Input) NCV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP Capable These Devices are Pb−Free and are RoHS Compliant www.onsemi.com VDSS (Clamped) RDS(ON) TYP ID MAX (Limited) 42 V 23 mW @ 10 V 33 A* *Max current may be limited below this value depending on input conditions. Drain Overvoltage Protection Gate Input ESD Protection Temperature Limit Current Limit Current Sense Typical Applications • Switch a Variety of Resistive, Inductive and Capacitive Loads • Can Replace Electromechanical Relays and Discrete Circuits • Automotive / Industrial Source MARKING DIAGRAM 1 DPAK CASE 369C STYLE 2 Y WW xxxxx G 2 3 = Year = Work Week = 8401A or 8401B = Pb−Free Package YWW NCV xxxxxG 1 = Gate 2 = Drain 3 = Source ORDERING INFORMATION Device Package Shipping† NCV8401ADTRKG DPAK (Pb−Free) 2500/Tape & Reel NCV8401BDTRKG DPAK (Pb−Free) 2500/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. © Semiconductor Components Industries, LLC, 2016 July, 2017 − Rev. 13 1 Publication Order Number: NCV8401/D NCV8401A, NCV8401B MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Internally Clamped Drain−to−Gate Voltage Internally Clamped (RGS = 1.0 MW) Gate−to−Source Voltage Symbol Value Unit VDSS 42 V VDGR 42 V VGS "14 V Drain Current − Continuous ID Total Power Dissipation @ TA = 25°C (Note 1) @ TA = 25°C (Note 2) PD Internally Limited W 1.1 2.0 RqJC RqJA RqJA 1.6 110 60 °C/W Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 3.65 Apk, L = 120 mH, RG = 25 W, TJstart = 150°C) (Note 3) EAS 800 mJ Load Dump Voltage (VGS = 0 and 10 V, RI = 2.0 W, RL = 3.0 W, td = 400 ms) VLD 65 V Operating Junction Temperature TJ −40 to 150 °C Storage Temperature Tstg −55 to 150 °C Thermal Resistance, Junction−to−Case Junction−to−Ambient (Note 1) Junction−to−Ambient (Note 2) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Minimum FR4 PCB, steady state. 2. Mounted onto a 2″ square FR4 board (1″ square, 2 oz. Cu 0.06″ thick single−sided, t = steady state). 3. Not subject to production testing. + ID DRAIN IG + VDS GATE SOURCE VGS − − Figure 1. Voltage and Current Convention www.onsemi.com 2 NCV8401A, NCV8401B MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Characteristic Min Typ Max Unit 42 42 46 44 50 50 Vdc 1.5 6.5 5.0 50 100 mAdc 1.8 5.0 2.0 Vdc −mV/°C 23 43 29 55 28 50 34 60 VSD 0.80 1.1 V tON 41 50 ms tOFF 129 150 tON 16 25 tOFF 164 180 −dVDS/dtON 1.27 2.0 dVDS/dtOFF 0.36 0.75 25 11 30 16 35 21 30 18 35 25 40 28 150 175 200 OFF CHARACTERISTICS Drain−to−Source Clamped Breakdown Voltage (VGS = 0 Vdc, ID = 250 mAdc) (VGS = 0 Vdc, ID = 250 mAdc, TJ = 150°C) (Note 4) V(BR)DSS Zero Gate Voltage Drain Current (VDS = 32 Vdc, VGS = 0 Vdc) (VDS = 32 Vdc, VGS = 0 Vdc, TJ = 150°C) (Note 4) IDSS Gate Input Current (VGS = 5.0 Vdc, VDS = 0 Vdc) IGSSF mAdc ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = 1.2 mAdc) Threshold Temperature Coefficient VGS(th) Static Drain−to−Source On−Resistance (Note 5) (VGS = 10 Vdc, ID = 5.0 Adc, TJ @ 25°C) (VGS = 10 Vdc, ID = 5.0 Adc, TJ @ 150°C) (Note 4) RDS(on) Static Drain−to−Source On−Resistance (Note 5) (VGS = 5.0 Vdc, ID = 5.0 Adc, TJ @ 25°C) (VGS = 5.0 Vdc, ID = 5.0 Adc, TJ @ 150°C) (Note 4) RDS(on) 1.0 Source−Drain Forward On Voltage (IS = 5 A, VGS = 0 V) mW mW SWITCHING CHARACTERISTICS (Note 4) Turn−ON Time (10% VIN to 90% ID) Turn−OFF Time (90% VIN to 10% ID) Turn−ON Time (10% VIN to 90% ID) Turn−OFF Time (90% VIN to 10% ID) Slew−Rate ON (80% VDS to 50% VDS) Slew−Rate OFF (50% VDS to 80% VDS) VIN = 0 V to 5 V, VDD = 25 V ID = 1.0 A, Ext RG = 2.5 W VIN = 0 V to 10 V, VDD = 25 V, ID = 1.0 A, Ext RG = 2.5 W Vin = 0 to 10 V, VDD = 12 V, RL = 4.7 W V/ms SELF PROTECTION CHARACTERISTICS (TJ = 25°C unless otherwise noted) Current Limit ILIM VGS = 5.0 V, VDS = 10 V VGS = 5.0 V, TJ = 150°C (Note 4) VGS = 10 V, VDS = 10 V VGS = 10 V, TJ = 150°C (Note 4) Temperature Limit (Turn−off) VGS = 5.0 V (Note 4) TLIM(off) VGS = 5.0 V DTLIM(on) Thermal Hysteresis Temperature Limit (Turn−off) 150 165 °C °C 15 VGS = 10 V (Note 4) TLIM(off) VGS = 10 V DTLIM(on) 15 VGS = 5 V ID = 1.0 A IGON 50 100 400 700 0.1 0.5 0.7 1.0 0.6 1.0 2.0 4.0 Thermal Hysteresis Adc 185 °C °C GATE INPUT CHARACTERISTICS (Note 4) Device ON Gate Input Current VGS = 10 V ID = 1.0 A Current Limit Gate Input Current VGS = 5 V, VDS = 10 V IGCL VGS = 10 V, VDS = 10 V Thermal Limit Fault Gate Input Current VGS = 5 V, VDS = 10 V IGTL VGS = 10 V, VDS = 10 V mA mA mA ESD ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 4) ESD Electro−Static Discharge Capability Human Body Model (HBM) Machine Model (MM) V 4000 400 4. Not subject to production testing. 5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. www.onsemi.com 3 NCV8401A, NCV8401B TYPICAL PERFORMANCE CURVES 10,000 Emax (mJ) IL(max) (A) 100 TJstart = 25°C 10 TJstart = 25°C 1,000 TJstart = 150°C TJstart = 150°C 100 1 10 100 10 100 L (mH) L (mH) Figure 2. Single Pulse Maximum Switch−off Current vs. Load Inductance Figure 3. Single Pulse Maximum Switching Energy vs. Load Inductance 100 10,000 Emax (mJ) IL(max) (A) TJstart = 25°C 10 TJstart = 25°C 1,000 TJstart = 150°C TJstart = 150°C 1 100 1 10 1 Time in Clamp (ms) Figure 4. Single Pulse Maximum Inductive Switch−off Current vs. Time in Clamp Figure 5. Single Pulse Maximum Inductive Switching Energy vs. Time in Clamp 45 30 6V 40 7V 8V 9V −40°C 25 10 V 35 25°C 30 20 5V 4V 25 ID (A) ID (A) 100 Time in Clamp (ms) 20 15 150°C 10 3V 10 5 VGS = 2.5 V 5 100°C 15 0 0 0 1 2 3 4 5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VDS (V) VGS (V) Figure 6. On−state Output Characteristics at 255C Figure 7. Transfer Characteristics (VDS = 10 V) www.onsemi.com 4 NCV8401A, NCV8401B TYPICAL PERFORMANCE CURVES 45 80 150°C, VGS = 5 V ID = 3 A 70 40 150°C 150°C, VGS = 10 V 35 100°C RDS(on) (mW) RDS(on) (mW) 60 50 40 25°C 25 30 20 20 15 10 −40°C 3 4 5 6 7 8 9 10 10 100°C, VGS = 5 V 30 100°C, VGS = 10 V 25°C, VGS = 5 V 25°C, VGS = 10 V −40°C, VGS = 5 V 1 −40°C, VGS = 10 V 3 5 7 9 VGS (V) ID (A) Figure 8. RDS(on) vs. Gate−Source Voltage Figure 9. RDS(on) vs. Drain Current 2.00 45 1.75 40 1.50 35 ILIM (A) NORMALIZED RDS(on) −40°C VGS = 5 V 1.25 25°C 30 25 1.00 0.75 20 VGS = 10 V 0.50 −40 −20 100°C 150°C 15 0 20 60 40 80 100 120 140 5 7 8 9 T (°C) VGS (V) Figure 10. Normalized RDS(on) vs. Temperature (ID = 5 A) Figure 11. Current Limit vs. Gate−Source Voltage (VDS = 10 V) 45 10 150°C VGS = 10 V 35 IDSS (mA) 1 30 0.1 100°C 25 0.01 25°C 20 0.001 VGS = 5 V 15 −40 10 100 40 ILIM (A) 6 −40°C 0.0001 −20 0 20 40 60 80 100 120 140 10 15 20 25 30 35 TJ (°C) VDS (V) Figure 12. Current Limit vs. Junction Temperature (VDS = 10 V) Figure 13. Drain−to−Source Leakage Current (VGS = 0 V) www.onsemi.com 5 40 NCV8401A, NCV8401B 1.0 1.1 0.9 −40°C 1.0 0.8 25°C VSD (V) 1.2 0.9 0.7 0.5 150°C 0.4 0 20 40 80 60 100 120 140 1 DRAIN−SOURCE VOLTAGE SLOPE (V/ms) tf 50 tr td(on) 4 5 6 7 8 9 10 6 7 9 8 10 2.0 −dVDS/dt(on) 1.5 1.0 dVDS/dt(off) 0.5 0 3 4 5 6 7 8 9 10 VGS (V) VGS (V) Figure 16. Resistive Load Switching Time vs. Gate−Source Voltage (VDD = 25 V, ID = 5 A, RG = 0 W) Figure 17. Resistive Load Switching Drain−Source Voltage Slope vs. Gate−Source Voltage (VDD = 25 V, ID = 5 A, RG = 0 W) 125 td(off), VGS = 10 V 100 td(off), VGS = 5 V 75 tf, VGS = 10 V tf, VGS = 5 V 50 tr, VGS = 5 V td(on), VGS = 5 V td(on), VGS = 10 V tr, VGS = 10 V 0 0 5 Figure 15. Source−Drain Diode Forward Characteristics (VGS = 0 V) 100 25 4 Figure 14. Normalized Threshold Voltage vs. Temperature (ID = 1.2 mA, VDS = VGS) td(off) 3 3 IS (A) 150 0 2 T (°C) 200 TIME (ms) 100°C 0.6 0.6 −40 −20 TIME (ms) 0.7 0.8 500 1000 1500 2000 DRAIN−SOURCE VOLTAGE SLOPE (V/ms) NORMALIZED VGS(th) (V) TYPICAL PERFORMANCE CURVES 2.0 −dVDS/dt(on), VGS = 10 V 1.8 1.6 1.4 1.2 1.0 0.8 −dVDS/dt(on), VGS = 5 V 0.6 0.4 dVDS/dt(off), VGS = 5 V dVDS/dt(off), VGS = 10 V 0.2 0 0 500 1000 1500 2000 RG (W) RG (W) Figure 18. Resistive Load Switching Time vs. Gate Resistance (VDD = 25 V, ID = 5 A) Figure 19. Drain−Source Voltage Slope during Turn On and Turn Off vs. Gate Resistance (VDD = 25 V, ID = 5 A) www.onsemi.com 6 NCV8401A, NCV8401B TYPICAL PERFORMANCE CURVES 250 225 RqJA (°C/W) 200 175 150 125 100 75 PCB Cu thickness, 1.0 oz 50 25 PCB Cu thickness, 2.0 oz 0 100 200 300 400 500 600 COPPER HEAT SPREADER AREA 700 800 (mm2) Figure 20. RqJA vs. Copper Area RqJA 788 mm2 C°/W, 2 oz. Copper 100 50% Duty Cycle 10 1 20% 10% 5% 2% 1% 0.1 0.01 Single Pulse Psi Tab−A 0.001 1E−06 0.00001 0.0001 0.001 0.01 0.1 PULSE WIDTH (sec) Figure 21. Transient Thermal Resistance www.onsemi.com 7 1 10 100 1000 NCV8401A, NCV8401B TEST CIRCUITS AND WAVEFORMS RL VIN + D RG VDD G DUT − S IDS Figure 22. Resistive Load Switching Test Circuit 90% 10% VIN tON tOFF 90% 10% IDS Figure 23. Resistive Load Switching Waveforms www.onsemi.com 8 NCV8401A, NCV8401B TEST CIRCUITS AND WAVEFORMS L VDS VIN D RG + VDD G DUT − S tp IDS Figure 24. Inductive Load Switching Test Circuit 5V VIN 0V Tav Tp V(BR)DSS Ipk VDD VDS VDS(on) IDS 0 Figure 25. Inductive Load Switching Waveforms HDPlus is a trademark of Semiconductor Components Industries, LLC (SCILLC). www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C ISSUE F 4 1 2 DATE 21 JUL 2015 3 SCALE 1:1 A E b3 C A B c2 4 L3 Z D 1 L4 2 3 NOTE 7 b2 e c SIDE VIEW b 0.005 (0.13) TOP VIEW H DETAIL A M BOTTOM VIEW C Z H L2 GAUGE PLANE C L L1 DETAIL A Z SEATING PLANE BOTTOM VIEW A1 ALTERNATE CONSTRUCTIONS ROTATED 905 CW STYLE 1: PIN 1. BASE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 6: PIN 1. MT1 2. MT2 3. GATE 4. MT2 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN STYLE 7: PIN 1. GATE 2. COLLECTOR 3. EMITTER 4. COLLECTOR STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE 4. CATHODE STYLE 8: PIN 1. N/C 2. CATHODE 3. ANODE 4. CATHODE STYLE 4: PIN 1. CATHODE 2. ANODE 3. GATE 4. ANODE STYLE 9: STYLE 10: PIN 1. ANODE PIN 1. CATHODE 2. CATHODE 2. ANODE 3. RESISTOR ADJUST 3. CATHODE 4. CATHODE 4. ANODE SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.102 5.80 0.228 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.028 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.114 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.72 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.90 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− GENERIC MARKING DIAGRAM* XXXXXXG ALYWW AYWW XXX XXXXXG IC Discrete = Device Code = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. 6.17 0.243 SCALE 3:1 DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z XXXXXX A L Y WW G 3.00 0.118 1.60 0.063 STYLE 5: PIN 1. GATE 2. ANODE 3. CATHODE 4. ANODE NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. 7. OPTIONAL MOLD FEATURE. mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON10527D DPAK (SINGLE GAUGE) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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