LDO Regulator - Ultra
Low Iq
350 mA
NCV8774C
The NCV8774C is a 350 mA LDO regulator. Its robustness allows
NCV8774C to be used in severe automotive environments. Ultra low
quiescent current as low as 17 mA typical makes it suitable for
applications permanently connected to battery requiring ultra low
quiescent current with or without load. This feature is especially critical
when modules remain in active mode when ignition is off. The
NCV8774C contains protection functions as current limit, thermal
shutdown.
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MARKING
DIAGRAM
DPAK−3
DT SUFFIX
CASE 369C
Features
•
•
•
•
•
•
•
•
•
Output Voltage Options: 3.3 V and 5 V
Output Voltage Accuracy: ±2%
Output Current up to 350 mA
Ultra Low Quiescent Current: typ 17 mA
Wide Input Voltage Operation Range: up to 40 V
Protection Features
− Current Limitation
− Thermal Shutdown
EMC Compliant
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Grade 1
Qualified and PPAP Capable
These are Pb−Free Devices
x
A
WL, L
Y
WW
G
8774CxG
ALYWW
= Voltage Option
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 12 of this data sheet.
Typical Applications (For safety applications refer to Figure 29)
•
•
•
•
Body Control Module
Instruments and Clusters
Occupant Protection and Comfort
Powertrain
VBAT
Cin
0.1 mF
Vin
Vout
NCV8774C
Vout
Cout
1 mF
GND
Figure 1. Typical Application Schematic
© Semiconductor Components Industries, LLC, 2019
May, 2020 − Rev. 2
1
Publication Order Number:
NCV8774C/D
NCV8774C
Vin
Vout
Driver
With
Current
Limit
−
+
Thermal
Vref
Shutdown
GND
Figure 2. Simplified Block Diagram
PIN CONNECTIONS
PIN
Tab,
1. Vin
2. GND
3. Vout
1
DPAK−3
Figure 3. Pin Connections
PIN FUNCTION DESCRIPTION
Pin No.
Pin Name
Description
1
Vin
2, TAB
GND
Power Supply Ground.
3
Vout
Regulated Output Voltage. Connect 1 mF capacitor with ESR < 5 W to ground.
Positive Power Supply Input. Connect 0.1 mF capacitor to ground.
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2
NCV8774C
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Min
Max
Unit
DC
Vin
−0.3
40
V
Load Dump − Suppressed
*
−
45
V
Vout
−0.3
7
V
Junction Temperature
TJ
−40
150
°C
Storage Temperature
TSTG
−55
150
°C
Input Voltage (Note 1)
Input Voltage (Note 2)
Output Voltage
US
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.
2. Load Dump Test B (with centralized load dump suppression) according to ISO16750−2 standard. Guaranteed by design. Not tested in
production. Passed Class A according to ISO16750−1.
ESD CAPABILITY (Note 3)
Rating
Symbol
Min
Max
Unit
ESD Capability, Human Body Model
ESDHBM
−4
4
kV
ESD Capability, Charged Device Model
ESDCDM
−1
1
kV
3. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per AEC−Q100−002 (JS−001−2017)
Field Induced Charge Device Model ESD characterization is not performed on plastic molded packages with body sizes smaller than
2 x 2 mm due to the inability of a small package body to acquire and retain enough charge to meet the minimum CDM discharge current
waveform characteristic defined in JEDEC JS−002−2018
LEAD SOLDERING TEMPERATURE AND MSL (Note 4)
Symbol
Rating
Moisture Sensitivity Level
DPAK−3
Min
MSL
Max
1
Unit
−
4. For more information, please refer to our Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
THERMAL CHARACTERISTICS
Rating
Thermal Characteristics, DPAK−3
Thermal Resistance, Junction−to−Air (Note 5)
Thermal Reference, Junction−to−Case (Note 5)
Thermal Resistance, Junction−to−Air (Note 6)
Thermal Reference, Junction−to−Case (Note 6)
Symbol
Value
RqJA
RYJC
RqJA
RYJC
49
6.6
28
6.6
Unit
°C/W
5. Values based on 1s0p board with copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. Single layer − according
to JEDEC51.3.
6. Values based on 2s2p board with copper area of 645 mm2 (or 1 in2) of 1 oz copper thickness and FR4 PCB substrate. 4 layers − according
to JEDEC51.7.
RECOMMENDED OPERATING RANGE
Rating
Symbol
Min
Max
Unit
Input Voltage (Note 7)
Vin
4.5
40
V
Junction Temperature
TJ
−40
150
°C
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
7. Minimum Vin = 4.5 V or (Vout + VDO), whichever is higher.
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3
NCV8774C
ELECTRICAL CHARACTERISTICS Vin = 13.5 V, Cin = 0.1 mF, Cout = 1 mF, Min and Max values are valid for temperature range
−40°C ≤ TJ ≤ +150°C unless noted otherwise and are guaranteed by test, design or statistical correlation. Typical values are referenced to
TJ = 25°C. (Note 8)
Test Conditions
Parameter
Symbol
Min
Typ
Max
Unit
3.234
3.234
4.9
4.9
3.3
3.3
5.0
5.0
3.366
3.366
5.1
5.1
3.234
4.9
3.3
5.0
3.366
5.1
Regline
−20
0
20
mV
Regload
−35
0
35
mV
−
−
200
350
350
600
−
−
−
−
17
−
19
−
21
23
23
25
REGULATOR OUTPUT
Output Voltage (Accuracy %)
Output Voltage (Accuracy %)
Line Regulation
Load Regulation
Dropout Voltage (Note 9)
3.3 V Vin = 4.5 V to 40 V, Iout = 0.1 mA to 200 mA
Vin = 4.5 V to 16 V, Iout = 0.1 mA to 350 mA
5.0 V Vin = 5.45 V to 40 V, Iout = 0.1 mA to 200 mA
Vin = 5.7 V to 16 V, Iout = 0.1 mA to 350 mA
3.3 V Vin = 4.5 V to 40 V, Iout = 0 mA
5.0 V Vin = 5.45 V to 40 V, Iout = 0 mA
3.3 V Vin = 4.5 V to 28 V, Iout = 5 mA
5.0 V Vin = 6 V to 28 V, Iout = 5 mA
Iout = 0.1 mA to 350 mA
Vout
Vout
VDO
5.0 V Iout = 200 mA
Iout = 350 mA
V
V
mV
QUIESCENT CURRENT
Quiescent Current (Iq = Iin − Iout)
Iq
Iout = 0 mA, TJ = 25°C
Iout = 0 mA, TJ ≤ 125°C
Iout = 0.1 mA, TJ = 25°C
Iout = 0.1 mA, TJ ≤ 125°C
mA
CURRENT LIMIT PROTECTION
Current Limit
Vout = 0.96 x Vout_nom
ILIM
400
−
1100
mA
Short Circuit Current Limit
Vout = 0 V
ISC
400
−
1100
mA
PSRR
−
80
−
dB
Thermal Shutdown Temperature
(Note 10)
TSD
150
175
195
°C
Thermal Shutdown Hysteresis
(Note 10)
TSH
−
10
−
°C
PSRR
Power Supply Ripple Rejection (Note 10) f = 100 Hz, 0.5 Vpp
THERMAL SHUTDOWN
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
8. Performance guaranteed over the indicated operating temperature range by design and/or characterization tested at TA [ TJ. Low duty cycle
pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.
9. Measured when output voltage falls 100 mV below the regulated voltage at Vin = 13.5 V.
10. Values based on design and/or characterization.
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4
NCV8774C
TYPICAL CHARACTERISTICS
800
Vin = 13.5 V
Iout = 100 mA
28
26
Iq, QUIESCENT CURRENT (mA)
Iq, QUIESCENT CURRENT (mA)
30
24
22
20
18
16
14
12
10
−40 −20
0
20
40
60
80
600
500
400
300
200
Vout = 5 V
100
0
100 120 140 160
0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40
Vin, INPUT VOLTAGE (V)
TJ, JUNCTION TEMPERATURE (°C)
Figure 4. Quiescent Current vs. Temperature
Figure 5. Quiescent Current vs. Input Voltage
1200
Iq, QUIESCENT CURRENT (mA)
Iout = 100 mA
TJ = 25°C
Vout = 3.3 V
700
TJ = −40°C
1000
TJ = 25°C
800
TJ = 150°C
600
400
200
Vin = 13.5 V
0
0
50
100
150
200
250
300
350
IOUT, OUTPUT CURRENT (mA)
Figure 6. Quiescent Current vs. Output Current
Vin = 13.5 V
Iout = 100 mA
Vout(nom) = 5.0 V
5.08
5.05
5.03
5.00
4.98
4.95
4.93
4.90
−40 −20
0
20
40
60
80
3.38
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
5.10
Vin = 13.5 V
Iout = 100 mA
Vout(nom) = 3.3 V
3.36
3.34
3.32
3.3
3.28
3.26
3.24
3.22
−40 −20
100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
0
20
40
60
80
100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage vs. Temperature
Figure 8. Output Voltage vs. Temperature
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5
NCV8774C
TYPICAL CHARACTERISTICS
4.0
Iout = 100 mA
Vout(nom) = 5.0 V
5
Vout, OUTPUT VOLTAGE (V)
Vout, OUTPUT VOLTAGE (V)
6
4
3
TJ = 150°C
2
TJ = 25°C
1
TJ = −40°C
0
0
1
2
3
4
5
6
Vin, INPUT VOLTAGE (V)
7
3.0
2.5
2.0
TJ = 150°C
1.5
TJ = 25°C
1.0
0.5
0.0
8
Iout = 100 mA
Vout(nom) = 3.3 V
3.5
TJ = −40°C
0
Figure 9. Output Voltage vs. Input Voltage
700
Vout(nom) = 5.0 V
600
TJ = 150°C
500
400
TJ = 25°C
300
200
TJ = −40°C
100
0
0
50
100
150
200
250
300
2
3
4
5
6
Vin, INPUT VOLTAGE (V)
7
8
Figure 10. Output Voltage vs. Input Voltage
VDO, DROPOUT VOLTAGE (mV)
VDO, DROPOUT VOLTAGE (mV)
700
1
500
Iout = 350 mA
400
300
200
Iout = 200 mA
100
0
350
Vout(nom) = 5.0 V
600
0
Iout, OUTPUT CURRENT (mA)
20
40
60
80
100
120
140
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Dropout vs. Temperature
Figure 11. Dropout vs. Output Current
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6
160
NCV8774C
TYPICAL CHARACTERISTICS
TJ = 25°C
Vout(nom) = 5.0 V
ISC @ Vout = 0 V
800
ILIM @ Vout = 4.8 V
600
400
200
0
0
5
10
15
20
25
30
Vin, INPUT VOLTAGE (V)
35
ISC @ Vout = 0 V
800
ILIM @ Vout = 3.168 V
600
400
200
0
40
0
Figure 13. Output Current Limit vs. Input
Voltage
800
700
ILIM @ Vout = 4.8 V
600
500
400
−40 −20
0
20
40
60
80
900
40
ISC @ Vout = 0 V
800
ILIM @ Vout = 3.168 V
700
600
500
400
−40 −20
100 120 140 160
0
20
40
60
80
100 120 140 160
TJ, JUNCTION TEMPERATURE (°C)
Figure 15. Output Current Limit vs. Temperature
Figure 16. Output Current Limit vs. Temperature
100
100
Unstable Region
ESR, STABILITY REGION (W)
ESR, STABILITY REGION (W)
35
Vin = 13.5 V
Vout(nom) = 3.3 V
TJ, JUNCTION TEMPERATURE (°C)
10
Stable Region
1
0.1
0.01
15
20
25
30
Vin, INPUT VOLTAGE (V)
1000
900
ISC @ Vout = 0 V
10
1100
Vin = 13.5 V
Vout(nom) = 5.0 V
1000
5
Figure 14. Output Current Limit vs. Input
Voltage
ILIM, ISC, CURRENT LIMIT (mA)
ILIM, ISC, CURRENT LIMIT (mA)
1100
TJ = 25°C
Vout(nom) = 3.3 V
1000
ILIM, ISC, CURRENT LIMIT (mA)
ILIM, ISC, CURRENT LIMIT (mA)
1000
Vin = 13.5 V
Vout(nom) = 5.0 V
Cout = 1.0 mF − 100 mF
0
50
100
150
200
250
300
Unstable Region
10
Stable Region
1
0.1
0.01
350
Vin = 13.5 V
Vout(nom) = 3.3 V
Cout = 1.0 mF − 100 mF
0
50
100
150
200
250
300
350
Iout, OUTPUT CURRENT (mA)
Iout, OUTPUT CURRENT (mA)
Figure 17. Cout ESR Stability Region vs. Output
Current
Figure 18. Cout ESR Stability Region vs. Output
Current
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7
NCV8774C
TJ = 25°C
Iout = 1 mA
Cout = 10 mF
trise/fall = 1 ms (Vin)
Vout(nom) = 5.0 V
26 V
Vin, (10 V/div)
Vin, (10 V/div)
TYPICAL CHARACTERISTICS
6V
6V
3.310 V
Vout, (20 mV/div)
Vout, (20 mV/div)
5.013 V
4.989 V
3.286 V
TIME (1 ms/div)
TIME (1 ms/div)
Figure 19. Line Transients
0.1 mA
0.1 mA
3.37 V
Vout, (100 mV/div)
Vout, (100 mV/div)
5.07 V
3.21 V
4.87 V
TIME (200 ms/div)
TIME (200 ms/div)
Figure 21. Load Transients
Figure 22. Load Transients
Vin, (10 V/div)
13.5 V
0V
0V
Vout, (2 V/div)
Vin, (10 V/div)
13.5 V
Vout, (2 V/div)
TJ = 25°C
Vin = 13.5 V
Cout = 10 mF
trise/fall = 1 ms (Iout)
Vout(nom) = 3.3 V
100 mA
Iout, (50 mA/div)
Iout, (50 mA/div)
Figure 20. Line Transients
TJ = 25°C
Vin = 13.5 V
Cout = 10 mF
trise/fall = 1 ms (Iout)
Vout(nom) = 5.0 V
100 mA
TJ = 25°C
Iout = 1 mA
Cout = 10 mF
trise/fall = 1 ms (Vin)
Vout(nom) = 3.3 V
26 V
TJ = 25°C
Iout = 1 mA
Cout = 10 mF
trise/fall = 100 ms (Vin)
Vout(nom) = 5.0 V
TIME (100 ms/div)
TJ = 25°C
Iout = 1 mA
Cout = 10 mF
trise/fall = 100 ms (Vin)
Vout(nom) = 3.3 V
TIME (100 ms/div)
Figure 23. Power Up/Down Response
Figure 24. Power Up/Down Response
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NCV8774C
TYPICAL CHARACTERISTICS
120
120
100
100
Iout = 100 mA
PSRR (dB)
40
20
0
10
Iout = 100 mA
Vin = 13.5 V $ 0.5 Vpp
Cout = 1 mF
Vout(nom) = 5.0 V
100
60
40
20
1000
10000
f, FREQUENCY (Hz)
Iout = 100 mA
80
60
0
10
100000 1000000
Iout = 100 mA
Vin = 13.5 V $ 0.5 Vpp
Cout = 1 mF
Vout(nom) = 3.3 V
Figure 25. PSRR vs. Frequency
100
1000
10000
f, FREQUENCY (Hz)
TJ = 25°C
Vin = 13.5 V
Cout = 1 mF
Iout = 100 mA
5000
4000
3000
2000
1000
0
10
100000 1000000
Figure 26. PSRR vs. Frequency
6000
NOISE DENSITY (nV/√Hz)
PSRR (dB)
80
100
1000
10000
f, FREQUENCY (Hz)
Figure 27. Noise vs. Frequency
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100000
NCV8774C
DEFINITIONS
General
Current Limit and Short Circuit Current Limit
All measurements are performed using short pulse low
duty cycle techniques to maintain junction temperature as
close as possible to ambient temperature.
Current Limit is value of output current by which output
voltage drops below 96% of its nominal value. Short Circuit
Current Limit is output current value measured with output
of the regulator shorted to ground.
Output voltage
The output voltage parameter is defined for specific
temperature, input voltage and output current values or
specified over Line, Load and Temperature ranges.
PSRR
Power Supply Rejection Ratio is defined as ratio of output
voltage and input voltage ripple. It is measured in decibels
(dB).
Line Regulation
The change in output voltage for a change in input voltage
measured for specific output current over operating ambient
temperature range.
Line Transient Response
Typical output voltage overshoot and undershoot
response when the input voltage is excited with a given
slope.
Load Regulation
The change in output voltage for a change in output
current measured for specific input voltage over operating
ambient temperature range.
Load Transient Response
Typical output voltage overshoot and undershoot
response when the output current is excited with a given
slope between low−load and high−load conditions.
Dropout Voltage
The input to output differential at which the regulator
output no longer maintains regulation against further
reductions in input voltage. It is measured when the output
drops 100 mV below its nominal value. The junction
temperature, load current, and minimum input supply
requirements affect the dropout level.
Thermal Protection
Quiescent and Disable Currents
Maximum Package Power Dissipation
Quiescent Current (Iq) is the difference between the input
current (measured through the LDO input pin) and the
output load current.
The power dissipation level is maximum allowed power
dissipation for particular package or power dissipation at
which the junction temperature reaches its maximum
operating value, whichever is lower.
Internal thermal shutdown circuitry is provided to protect
the integrated circuit in the event that the maximum junction
temperature is exceeded. When activated at typically 175°C,
the regulator turns off. This feature is provided to prevent
failures from accidental overheating.
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NCV8774C
APPLICATIONS INFORMATION
can dissipate up to 2.53 W for 1s0p PCB board and 4.49 W
for 2s2p PCB board when the ambient temperature (TA) is
25°C. See Figure 28 for RqJA versus PCB area. The power
dissipated by the NCV8774C can be calculated from the
following equations:
The NCV8774C regulator is self−protected with internal
thermal shutdown and internal current limit. Typical
characteristics are shown in Figures 4 to 27.
Input Decoupling (Cin)
A ceramic or tantalum 0.1 mF capacitor is recommended
and should be connected close to the NCV8774C package.
Higher capacitance and lower ESR will improve the overall
line and load transient response.
If extremely fast input voltage transients are expected then
appropriate input filter must be used in order to decrease
rising and/or falling edges below 4 V/ms for proper
operation. The filter can be composed of several capacitors
in parallel.
P D + V inǒI q@I outǓ ) I outǒV in * V outǓ
or
V in(max) +
NOTE:
P D(max) ) ǒV out
I outǓ
I out ) I q
(eq. 3)
Items containing Iq can be neglected if Iout >> Iq.
RqJA, THERMAL RESISTANCE (°C/W)
110
100
Output Decoupling (Cout)
The NCV8774C is a stable component and does not
require a minimum Equivalent Series Resistance (ESR) for
the output capacitor. Stability region of ESR vs Output
Current is shown in Figures 17 to 18. The minimum output
decoupling value is 1 mF and can be augmented to fulfill
stringent load transient requirements. The regulator works
with ceramic chip capacitors as well as tantalum devices.
Larger values improve noise rejection and load regulation
transient response.
Thermal Considerations
As power in the NCV8774C increases, it might become
necessary to provide some thermal relief. The maximum
power dissipation supported by the device is dependent
upon board design and layout. Mounting pad configuration
on the PCB, the board material, and the ambient temperature
affect the rate of junction temperature rise for the part. When
the NCV8774C has good thermal conductivity through the
PCB, the junction temperature will be relatively low with
high power applications. The maximum dissipation the
NCV8774C can handle is given by:
P D(max) +
(eq. 2)
ƪTJ(max) * TAƫ
90
80
70
1 oz, Single Layer
60
2 oz, Single Layer
50
40
1 oz, 4 Layer
30
20
2 oz, 4 Layer
10
0
0
200
400
600
800
COPPER HEAT SPREADER (mm2)
Figure 28. Thermal Resistance vs. PCB Copper Area
Hints
Vin and GND printed circuit board traces should be as
wide as possible. When the impedance of these traces is
high, there is a chance to pick up noise or cause the regulator
to malfunction. Place external components, especially the
output capacitor, as close as possible to the NCV8774C and
make traces as short as possible. The NCV8774C is not
developed in compliance with ISO26262 standard. If
application is safety critical then the below application
example diagram shown in Figure 29 can be used.
(eq. 1)
R qJA
Since TJ is not recommended to exceed 150°C, then the
NCV8774C soldered on 645 mm2, 1 oz copper area, FR4
VBAT
Vout
Vin
Cin
0.1 μF
NCV8774C
1000
Cout
1 μF
GND
VCC
Voltage
Supervisor
VDD
Microprocessor
(e.g. NCV30X, NCV809)
GND
RESET
Figure 29. NCV8774C Application Diagram
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11
I/O
NCV8774C
ORDERING INFORMATION
Output Voltage
Marking
Package
Shipping†
NCV8774CDT50RKG
5.0 V
8774C5G
DPAK−3
(Pb−Free)
2500 /
Tape & Reel
NCV8774CDT33RKG
3.3 V
8774C3G
DPAK−3
(Pb−Free)
2500 /
Tape & Reel
Device
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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12
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
4
1 2
DATE 21 JUL 2015
3
SCALE 1:1
A
E
b3
B
c2
4
L3
Z
D
1
L4
C
A
2
3
NOTE 7
b2
e
c
SIDE VIEW
b
0.005 (0.13)
TOP VIEW
H
DETAIL A
M
BOTTOM VIEW
C
Z
H
L2
GAUGE
PLANE
C
L
L1
DETAIL A
Z
SEATING
PLANE
BOTTOM VIEW
A1
ALTERNATE
CONSTRUCTIONS
ROTATED 905 CW
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 8:
PIN 1. N/C
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
STYLE 9:
STYLE 10:
PIN 1. ANODE
PIN 1. CATHODE
2. CATHODE
2. ANODE
3. RESISTOR ADJUST
3. CATHODE
4. CATHODE
4. ANODE
SOLDERING FOOTPRINT*
6.20
0.244
2.58
0.102
5.80
0.228
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.028 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.114 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.72
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.90 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
GENERIC
MARKING DIAGRAM*
XXXXXXG
ALYWW
AYWW
XXX
XXXXXG
IC
Discrete
= Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
6.17
0.243
SCALE 3:1
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
XXXXXX
A
L
Y
WW
G
3.00
0.118
1.60
0.063
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
DOCUMENT NUMBER:
DESCRIPTION:
98AON10527D
DPAK (SINGLE GAUGE)
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
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