NFAP1060L3TT

Intelligent Power Module (IPM) 600 V, 10 A NFAP1060L3TT The NFAP1060L3TT is a fully−integrated inverter power stage consisting of a high−voltage driver, six IGBT’s and a thermistor, suitable for driving permanent magnet synchronous (PMSM) motors, brushless−DC (BLDC) motors and AC asynchronous motors. The IGBT’s are configured in a 3−phase bridge with separate emitter connections for the lower legs for maximum flexibility in the choice of control algorithm. The power stage has a full range of protection functions including cross−conduction protection, external shutdown and under−voltage lockout functions. An internal comparator and reference connected to the over−current protection circuit allows the designer to set the over−current protection level. www.onsemi.com Features • • • • • • • • Three−phase 10 A/600 V IGBT Module with Integrated Drivers Compact 44 mm x 20.9 mm Single In−line Package Built−in Under Voltage Protection Cross−conduction Protection ITRIP Input to Shut Down All IGBTs Integrated Bootstrap Diodes and Resistors Thermistor for Substrate Temperature Measurement UL1557 Certification (File number: E339285) SIP29 CASE 127FB MARKING DIAGRAM NFAP1060L3TT ZZZATYWW Typical Applications HIN(U) HS1 LIN(U) LS1 VS(W), W VS(V), V VS(U), U = Specific Device Code = Assembly Lot Code = Assembly Location = Test Location = Year = Work Week HS3 HS2 ORDERING INFORMATION LS2 HS3 LS3 Device LS1 LS2 LS3 NFAP1060L3TT Package Shipping SIP29 (Pb−Free) 120 / Box NW FLTEN LIN(W) HS2 NV HIN(W) Three channel half−bridge driver with protection circuits NFAP1060L3TT ZZZ A T Y WW Device marking is on package top side HS1 NU LIN(V) ITRIP HIN(V) P TH VDD VSS Industrial Drives Industrial Pumps Industrial Fans Industrial Automation VB(U) VB(V) VB(W) • • • • Figure 1. Functional Diagram © Semiconductor Components Industries, LLC, 2019 March, 2020 − Rev. 1 1 Publication Order Number: NFAP1060L3TT/D NFAP1060L3TT NFAP1060L3TT VPN C1 + P:13 From Op−amp circuit HV Ground RSU From HV Power Source RC filtering for HINx and LINx not shown. Recommended in noisy environments. CS RSV RSW NU:17 ITRIP:16 NV:19 HIN(U):20 NW:21 HIN(W):23 HIN(V):22 LIN(U):24 To Op−amp circuit LIN(V):25 LIN(W):26 + VB(U):9 Pull−up VS(U), U:10 + Motor RTH VB(V):5 FLTEN:18 VS(V), V:6 + RP TH:27 VB(W):1 VDD:28 VS(W), W:2 VSS:29 CD4 VDD=15V from + external regulator LV Ground Star connection to HV Ground Figure 2. Application Schematic www.onsemi.com 2 Controller NFAP1060L3TT Bootstrap VB(U) (9) Bootstrap VB(V) (5) Bootstrap VB(W) (1) P (13) VDD (28) VSS (29) TH (27) VS(W), W (2) VS(V), V (6) VS(U), U (10) NU (17) NV (19) NW (21) Level Shifter HIN(U) HIN(V) HIN(W) LIN(U) LIN(V) LIN(W) (20) (22) (23) (24) (25) (26) Logic VDD ITRIP (16) Level Shifter Internal Voltage reference Logic VDD undervoltage shutdown Level Shifter Logic FLTEN (18) Over current protection Figure 3. Simplified Block Diagram www.onsemi.com 3 NFAP1060L3TT Table 1. PIN FUNCTION DESCRIPTION Pin NOTE: Name 1 VB(W) 2 VS(W), W 5 VB(V) 6 VS(V), V 9 VB(U) 10 VS(U), U 13 P 16 ITRIP 17 NU 18 FLTEN Description High−Side Bias Voltage for W phase IGBT Driving High−Side Bias Voltage GND for W phase IGBT Driving, Output for W Phase High−Side Bias Voltage for V phase IGBT Driving High−Side Bias Voltage GND for V phase IGBT Driving, Output for V Phase High−Side Bias Voltage for U phase IGBT Driving High−Side Bias Voltage GND for U phase IGBT Driving, Output for U Phase Positive DC−Link Input Input for Over Current Protection Negative DC−Link Input for U Phase Fault Output, Enable Input 19 NV Negative DC−Link Input for V Phase 20 HIN(U) Signal Input for High−Side U Phase 21 NW 22 HIN(V) Negative DC−Link Input for W Phase Signal Input for High−Side V Phase 23 HIN(W) Signal Input for High−Side W Phase 24 LIN(U) Signal Input for Low−Side U Phase 25 LIN(V) Signal Input for Low−Side V Phase 26 LIN(W) Signal Input for Low−Side W Phase 27 TH 28 VDD Low−Side Bias Voltage for IC and IGBTs Driving 29 VSS Low−Side Common Supply Ground Series Resister for Thermistor (Temperature Detection) Pins 3, 4, 7, 8, 11, 12, 14 and 15 are not present Table 2. ABSOLUTE MAXIMUM RATINGS at Tc = 25°C (Note 1) Rating Unit Supply Voltage VPN P−NU,NV,NW, VPN (surge) < 500 V (Note 2) 450 V Collector − Emitter Voltage Vces P−U,V,W; U−NU; V−NV; W−NW 600 V Parameter Symbol Conditions Each IGBT Collector Current ±Ic P,U,V,W,NU,NV,NW terminal current ±10 A Each IGBT Collector Current (Peak) ±Icp Tc = 25°C, Under 1ms Pulse Width 20 A Corrector Dissipation 19 W High−Side Control Bias voltage VBS VB(U)−VS(U), VB(V)−VS(V), VB(W)−VS(W) (Note 3) −0.3 to +20.0 V Control Supply Voltage VDD VDD−VSS −0.3 to +20.0 V VIN Input Signal Voltage Pc Tc = 25°C, Per One Chip HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W)−VSS −0.3 to VDD V FLTEN Terminal Voltage VFLTEN FLTEN−VSS −0.3 to VDD V Current Sensing Input Voltage VITRIP ITRIP−VSS Operating Junction Temperature Storage Temperature −0.3 to +7.0 V Tj 150 °C Tstg −40 to +125 °C Module Case Operation Temperature Tc Tightening Torque MT Case mounting screws Isolation Voltage Viso 50 Hz sine wave AC 1 minute (Note 4) −40 to +125 °C 0.9 Nm 2000 Vrms Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. Refer to ELECTRICAL CHARACTERISTICS, RECOMMENDED OPERATING RANGES and/or APPLICATION INFORMATION for Safe Operating parameters. 2. This surge voltage developed by the switching operation due to the wiring inductance between P and NU, NV, NW terminal. 3. VBS = VB(U)−VS(U), VB(V)−VS(V), VB(W)−VS(W) 4. Test conditions: AC2500V, 1 s www.onsemi.com 4 NFAP1060L3TT Table 3. RECOMMENDED OPERATING RANGES Parameter Symbol Conditions Min Typ Max Unit 0 280 450 V Supply voltage VPN P−NU,NV,NW High−Side Control Bias voltage VBS VB(U)−VS(U), VB(V)−VS(V), VB(W)−VS(W) 13.0 15 17.5 V Control Supply Voltage VDD VDD−VSS 14.0 15 16.5 V ON−state Input Voltage VIN(ON) 3.0 − 5.0 V OFF−state Input Voltage VIN(OFF) HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W)−VSS 0 − 0.3 V 1 − 20 kHz Turn−off to Turn−on (external) 0.5 − − ms 1 − − ms 0.6 − 0.9 Nm PWM Frequency fPWM Dead Time DT Allowable Input Pulse Width PWIN Tightening Torque ON and OFF ‘M3’ type screw Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. Table 4. ELECTRICAL CHARACTERISTICS at Tc = 25°C, VBIAS (VBS, VDD) = 15 V unless otherwise noted. Test Conditions Parameter Symbol Min Typ Max Unit Ices − − 1 mA IR(DB) − − 1 mA VCE(sat) − 2.1 2.7 V − 1.8 − V − 2.2 2.8 V − 1.7 − V POWER OUTPUT SECTION Collector−Emitter Leakage Current Vce = 600 V Bootstrap Diode Reverse Current VR(DB) = 600 V Collector−Emitter Saturation Voltage VDD = VBS = 15 V, IN = 5 V, Ic = 10 A, Tj = 25°C VDD = VBS = 15 V, IN = 5 V, Ic = 5 A, Tj = 100°C FWDi Forward Voltage IN = 0 V, Ic = −10 A, Tj = 25°C VF IN = 0 V, Ic = −5 A, Tj = 100°C Junction to Case Thermal Resistance Inverter IGBT Part (per 1/6 Module) Rth(j−c)Q − − 6.3 °C/W Inverter FRD Part (per 1/6 Module) Rth(j−c)F − − 11.6 °C/W DRIVER SECTION Quiescent VBS Supply Current VBS = 15 V, HIN = 0 V, per driver IQBS − 0.07 0.4 mA Quiescent VDD Supply Current VDD = 15 V, HIN = 0 V, VDD−VSS IQDDL − 0.85 3.0 mA ON Threshold voltage HIN(U), HIN(V), HIN(W), LIN(U), LIN(V), LIN(W)−VSS VIN(ON) − − 2.5 V VIN(OFF) 0.8 − − V OFF Threshold voltage Logic 1 Input Current VIN = +3.3 V IIN+ − 660 − mA Logic 0 Input Current VIN = 0 V IIN− − − 2 mA FLTEN Terminal Sink Current FAULT: ON / VFLTEN = 0.1 V IoSD − 2 − mA Fault−Output Pulse Width FLTEN−VSS tFOD 20 − − ms Enable Threshold FLTEN−VSS VEN+ − − 2.5 V VEN− 0.8 − − V Short Circuit Trip Level ITRIP−VSS VSC(ref) 0.44 0.49 0.54 V High−Side Control Bias Voltage Under− Voltage Protection Reset Level UVBSR 10.3 11.1 11.9 V Detection Level UVBSD 10.1 10.9 11.7 V Supply Voltage Under−Voltage Protection Reset Level UVDDR 10.3 11.1 11.7 V Detection Level UVDDD 10.1 10.9 11.5 V Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. www.onsemi.com 5 NFAP1060L3TT Table 5. ELECTRICAL CHARACTERISTICS at Tc = 25°C, VBIAS (VBS, VDD) = 15 V, VCC = 300 V, L = 3.0 mH unless otherwise noted. Symbol Min Typ Max Unit tON − 0.5 1.0 ms tOFF − 0.5 1.0 ms EON − 114 − mJ Turn−off Switching Loss EOFF − 65 − mJ Total Switching Loss ETOT − 179 − mJ EON − 136 − mJ EOFF − 75 − mJ mJ Parameter Test Conditions SWITCHING CHARACTER Switching Time IC = 10 A, Tj = 25°C Turn−on Switching Loss IC = 5 A, Tj = 25°C Turn−on Switching Loss IC = 5 A, Tj = 100°C Turn−off Switching Loss Total Switching Loss Diode Reverse Recovery Energy IC = 5 A, Tj = 100°C Diode Reverse Recovery Time ETOT − 211 − EREC − 27 − mJ tRR − 174 − ns − ms Reverse Bias Safe Operating Area IC = 20 A, VCE = 450 V RBSOA Short Circuit Safe Operating Area VCE = 400 V, Tj = 100°C SCSOA Full Square 5 − TYPICAL CHARACTERISTICS INV SECTION Figure 4. VCE vs. IC for Different Temperatures (VDD = 15 V) Figure 5. VF vs. IF for Different Temperatures Figure 6. EON vs. IC for Different Temperatures Figure 7. EOFF vs. IC for Different Temperatures www.onsemi.com 6 NFAP1060L3TT TYPICAL CHARACTERISTICS INV SECTION Figure 8. Thermal Impedance Plot Figure 10. Turn−off Waveform Tj = 100°C, VCC = 300 V Figure 9. Turn−on Waveform Tj = 100°C, VCC = 300 V www.onsemi.com 7 NFAP1060L3TT APPLICATIONS INFORMATION VBS undervoltage protection reset signal HIN LIN VDD undervoltage protection reset voltage (Note 6) VDD VBS undervoltage protection reset voltage (Note 7) Voltage w0.54V VB(U), VB(V), VB(W) (Note 8) Voltage < 0.44V ITRIP FLTEN driven output FLTEN driven input Cross−conduction prevention period (Note 5) Upper IGBT Gate Drive Lower IGBT Gate Drive Automatic reset after protection (Fault−Output Pulse Width ) Figure 11. Input / Output Timing Chart 5. This section of the timing diagram shows the effect of cross−conduction prevention. 6. This section of the timing diagram shows that when the voltage on VDD decreases sufficiently all gate output signals will go low, switching off all six IGBTs. When the voltage on VDD rises sufficiently, normal operation will resume. 7. This section shows that when the bootstrap voltage on VB(U) (VB(V), VB(W)) drops, the corresponding high side output U (V, W) is switched off. When the voltage on VB(U) (VB(V), VB(W)) rises sufficiently, normal operation will resume. 8. This section shows that when the voltage on ITRIP exceeds the threshold, all IGBT’s are turned off. Normal operation resumes later after the over−current condition is removed. Table 6. INPUT / OUTPUT LOGIC TABLE INPUT OUTPUT HIN LIN ITRIP High side IGBT Low side IGBT U,V,W FAULT H L L ON OFF P OFF L H L OFF ON NU, NV, NW OFF L L L OFF OFF High Impedance OFF H H L OFF OFF High Impedance OFF X X H OFF OFF High Impedance ON Table 7. THERMISTOR CHARACTERISTICS Parameter Resistance B−Constant (25 to 50℃) Symbol Condition Min R25 Tth=25℃ R125 Tth=125℃ B Temperature Range Typ Max Unit 45.59 47 48.41 kW 1.34 1.45 1.59 kW 3953 4021 −40 www.onsemi.com 8 4033 K +125 °C NFAP1060L3TT Figure 12. Thermistor Resistance vs. Thermistor Temperature Figure 13. Thermistor Voltage vs. Thermistor Temperature Conditions: RTH = 4.7 kW, pull−up voltage 5.0 V (see Figure 12) www.onsemi.com 9 NFAP1060L3TT FLTEN Pin Minimum Input Pulse Width The FLTEN pin is connected to an open−drain FAULT output and an ENABLE input, it is required a pull−up resistor. If the pull−up voltage is 5 V, use a pull−up resistor with a value of 6.8 kW or higher. If the pull−up voltage is 15 V, use a pull−up resistor with a value of 20 kW or higher. The pulled up voltage in normal operation for the FLTEN pin should be above 2.5 V, noting that it is connected to an internal ENABLE input. The FAULT output is triggered if there is a VDD under−voltage or an overcurrent condition. Driving the FLTEN terminal pin is used to enable or shut down the built−in driver. If the voltage on the FLTEN pin rises above the positive going ENABLE threshold, the output drivers are enabled. If the voltage on the FLTEN pin falls below the negative going ENABLE threshold, the drivers are disabled. When input pulse width is less than 1 ms, an output may not react to the pulse. (Both ON signal and OFF signal) Calculation of Bootstrap Capacitor Value The bootstrap capacitor value CB is calculated using the following approach. The following parameters influence the choice of bootstrap capacitor: • VBS: Bootstrap power supply. 15 V is recommended. • QG: Total gate charge of IGBT at VBS = 15 V. 17 nC • UVLO: Falling threshold for UVLO. Specified as 12 V. • IDMAX: High−side drive power dissipation. • Specified as 0.4 mA • TONMAX: Maximum ON pulse width of high side IGBT. Under−voltage Protection If VDD goes below the VDD supply under−voltage lockout falling threshold, the FAULT output is switched on. The FAULT output stays on until VDD rises above the VDD supply under−voltage lockout rising threshold. After VDD has risen above the threshold to enable normal operation, the driver waits to receive an input signal on the LIN input before enabling the driver for the HIN signal. The hysteresis is approximately 200 mV. Capacitance Calculation Formula: CB = (QG + IDMAX * TONMAX)/(VBS − UVLO) The relationship between TONMAX and CB becomes as follows. CB is recommended to be approximately 3 times the value calculated above. The recommended value of CB is in the range of 1 to 47 mF, however, the value needs to be verified prior to production. When not using the bootstrap circuit, each high side driver power supply requires an external independent power supply. Overcurrent Protection An over−current condition is detected if the voltage on the ITRIP pin is larger than the reference voltage. There is a blanking time of typically 350 ns to improve noise immunity. After a shutdown propagation delay of typically 0.9 ms, the FAULT output is switched on. The FAULT output is held on for 20 ms (minimum). The over−current protection threshold should be set to be equal or lower to 2 times the module rated current (Io). An additional fuse is recommended to protect against system level or abnormal over−current fault conditions. Capacitors on High Voltage and VDD Supplies Both the high voltage and VDD supplies require an electrolytic capacitor and an additional high frequency capacitor. The recommended value of the high frequency capacitor is between 100 nF and 10 mF. Figure 14. Bootstrap Capacitance vs. Tonmax www.onsemi.com 10 NFAP1060L3TT TEST CIRCUITS Ices, IR(DB) U+ V+ W+ U− V− W− A 13 13 13 10 6 2 B 10 6 2 17 19 21 VBS=15V 9 10 VBS=15V 5 VBS=15V V(DB) W(DB) A 9 5 1 B 29 29 29 A VCE, VR 6 U+,V+,W+ : High side phase U−,V−,W− : Low side phase U(DB) ICE, IR A 1 2 VDD=15V 28 B 29,17,19,21 Figure 15. Test Circuit for ICE VCE(sat) (Test by pulse) U+ V+ W+ U− V− W− A 13 13 13 10 6 2 B 10 6 2 17 19 21 C 20 22 23 24 25 26 VBS=15V 9 10 VBS=15V A 5 6 VBS=15V VCE(sat) 2 VDD=15V IC V 1 28 C 5V B 29,17,19,21 Figure 16. Test Circuit for VCE(SAT) VF (Test by pulse) U+ V+ W+ U− V− W− A 13 13 13 10 6 2 B 10 6 2 17 19 21 U(DB) V(DB) W(DB) A 9 5 1 B 28 28 28 VBS U+ VBS V+ VBS W+ VDD A 9 5 1 28 B 10 6 2 29 A V VF B Figure 17. Test Circuit for VF IQBS, IQDDL ID A A VD* B Figure 18. Test Circuit for ID www.onsemi.com 11 IC NFAP1060L3TT SWITCHING TIME (The circuit is a representative example of the lower side U phase.) A VBS =15 V U+ V+ W+ U− V− W− 13 13 13 13 13 13 B 17 19 21 17 19 21 C 10 6 2 13 13 13 D 17 19 21 10 6 2 E 20 22 23 24 25 26 VBS =15 V 5 6 VBS =15 V 1 2 VDD =15 V 28 Input Signal E 29,17,19,21 A C CS V CC D B Io Figure 19. Test Circuit for Switching Time Input Signal (0 to 5V) lo 9 10 90% tON 10% tOFF www.onsemi.com 12 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SIP29, 44.0x20.9 FP−1 CASE 127FB ISSUE A DATE 14 JUN 2019 GENERIC MARKING DIAGRAM* XXXXXXXXXXXXXXXXX ZZZATYWW DOCUMENT NUMBER: DESCRIPTION: XXXX ZZZ AT Y WW = Specific Device Code = Assembly Lot Code = Assembly & Test Location = Year = Work Week 98AON01721H SIP29, 44.0x20.9 FP−1 *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. Electronic versions are uncontrolled except when accessed directly from the Document Repository. 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