NL5S4157ADFT2G

1 W SPDT Switch NL5S4157A The NL5S4157A is a low RON SPDT analog switch. The device is designed for low operating voltage, high current switching of speaker output for mobile applications. It can switch a balanced stereo output. It can handle a balanced microphone/speaker/ringtone generator in monophone mode. www.onsemi.com Features • • • • • Wide VCC Operating Range: 1.65 V to 5.5 V OVT up to +5.5 V for Control pin RON: Typically < 1 W at VCC = 4.5 V Rail−to−Rail Input/Output This Device is Pb−Free, Halogen Free/BFR Free and is RoHS Compliant Typical Applications • • • • • 1 SC−88/SC70−6/SOT−363 CASE 419B−02 MARKING DIAGRAM 6 Cell Phone Speaker/Microphone Switching Ringtone−Chip/Amplifier Switching Stereo Balanced (Push−Pull) Switching RF PA Routing General Switching ATMG G 1 AT M G = Specific Device Code = Date Code* = Pb−Free Package (Note: Microdot may be in either location) *Date Code orientation and/or position may vary depending upon manufacturing location. ORDERING INFORMATION See detailed ordering and shipping information on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2020 January, 2021 − Rev. 1 1 Publication Order Number: NL5S4157A/D NL5S4157A PIN ASSIGNMENTS Figure 1. NL5S4157A (Top View) Figure 2. Analog Symbol PIN DESCRIPTION Pin Name Description 1 NO 2 GND Normally−Open Port 3 NC 4 COM Common Port 5 VCC Supply 6 IN Supply Ground Normally−Closed Port Switch Select Input FUNCTION TABLE IN Switch L NC to COM H NO to COM www.onsemi.com 2 NL5S4157A MAXIMUM RATINGS Symbol Rating Value Unit −0.5 to +6.0 V −0.5 to VCC+0.5 V −0.5 to +6.0 V VCC Positive DC Supply Voltage VIS Switch Input / Output Voltage VIN Digital Select Input Voltage IOK I/O Port Diode Current ±100 mA IIK Select Input Diode Current −100 mA II/O Continuous DC Current Through Analog Switch ±100 mA Peak Current Through Analog Switch, 10% Duty Cycle ±300 mA −65 to +150 °C 2 kV II/O−pk Ts ESD Storage Temperature Human Body Model (HBM) Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. RECOMMENDED OPERATING CONDITIONS Symbol Min Max Unit VCC Positive DC Supply Voltage Parameter 1.65 5.5 V VIS Switch Input / Output Voltage GND VCC V VIN Digital Select Input Voltage GND 5.5 V TA Operating Temperature Range −40 +125 °C tr, tf Input Transition Rise or Fall Time (Select Input IN) VCC v 3.0 V 0 20 ns/V VCC > 3.0 V 0 10 Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. www.onsemi.com 3 NL5S4157A ELECTRICAL CHARACTERISTICS Guaranteed Limit 255C Symbol Parameter VIH Input High Voltage VIL Input Low Voltage Condition VCC (V) Min 2.7 1.1 5.0 1.42 Typ −405C to 855C Max Min Max 1.1 −405C to 1255C Min Max 1.1 1.42 Unit V 1.42 2.7 0.4 0.4 0.4 5.0 0.7 0.7 0.7 V IIN Input Leakage Current VIN = 0 V to 5.5 V 1.65 − 5.5 ±0.1 ±1 ±1 mA IOFF Input Leakage Current VIN = 0 to 5.5 V 0 0.05 1 1 mA IS(ON) ON−State Switch Leakage Current VIS = GND to VCC, VOS = Open 5.5 ±10 ±200 ±600 nA IS(OFF) OFF−State Switch Leakage Current VIS = VCC and VOS = GND, or IS = GND and VOS = VCC 5.5 ±10 ±200 ±600 nA ICC Quiescent Supply Current VIN = VCC or GND, IOS = 0 mA 5.5 0.5 5 5 mA www.onsemi.com 4 NL5S4157A ANALOG SWITCH CHARACTERISTICS Guaranteed Limit 25ºC Symbol Parameter Typ Max 2.7 0.9 4.5 Condition VCC (V) VIS = 0 to VCC, IO = 100 mA Min −40ºC to 125ºC Min Max Unit 1.2 1.4 Ω 0.6 0.8 1.0 RON (Note 1) Switch ON Resistance nRON (Notes 1, 2, 3) ON Resistance Match VIS = 1.5 V, IA = 100 mA 2.7 0.05 0.15 0.15 Between Channels VIS = 2.5 V, IA = 100 mA 4.5 0.04 0.12 0.15 VIS = 0 to VCC, IO = 100 mA 2.7 0.3 0.4 0.4 4.5 0.2 0.4 0.4 CL = 1 nF, VGEN = 0 V, 2.7 38 RGEN =0 Ω 4.5 55 Off−Isolation RL = 50 Ω, f = 1 MHz 2.7 – 5.5 −66 dB VCT Crosstalk RL = 50 Ω, f = 1 MHz 2.7 – 5.5 −66 dB BW −3 dB Bandwidth RFLAT (Notes 1, 2, 4) Q (Note 5) VISO (Note 6) ON Resistance Flatness Charge Injection Ω Ω pC RL = 50 Ω 2.7 – 5.5 57 MHz THD (Note 5) Total Harmonic Distortion RL = 600 Ω, VIS = 0.5 VP−P, f = 20 Hz to 20 kHz 2.7 – 5.5 0.004 % CI Select Input Capacitance f = 1 MHz 0 3.0 pF COFF NC/NO Port Off Capacitance f = 1 MHz 4.5 23 pF CON COM Port ON Capacitance f = 1 MHz 4.5 93 pF 1. Measured by the voltage drop between NC/NO and COM pins at the indicated current through the switch. On Resistance is determined by the lower of the voltages on the two (NO, NC, COM). 2. Parameter is characterized but not tested in production. 3. DRON = RON max − RON min measured at identical VCC, temperature and voltage levels. 4. Flatness is defined as the difference between the maximum and minimum value of On Resistance over the specified range of conditions. 5. Guaranteed by Design. 6. VISO = 20 log10 [VCOM/VNO,NC]. www.onsemi.com 5 NL5S4157A SWITCHING CHARACTERISTICS Guaranteed Limit 255C Symbol Parameter Condition VCC (V) tPD (Note 7) Propagation Delay VIN = VIH or VIL 2.7 4.5 tON Turn−on Time, (COM to NO or NC) Min Typ −405C to 1255C Max Min Max Unit 2.0 2.0 ns 0.3 0.3 ns RL = 50 W, CL = 35 pF, VIS = 1.5 V 2.7 30 35 VIS = 3.0 V 4.5 20 25 3.3 100 100 RL = 50 W, CL = 100 pF, VIS = 1.5 V tOFF Turn−off Time, (COM to NO or NC) ns RL = 50 W, CL = 35 pF, VIS = 1.5 V 2.7 20 25 VIS = 3.0 V 4.5 15 20 VIS = 1.5 V 3.3 100 100 RL = 50 W, CL = 35 pF 2.7 0.5 0.5 4.5 0.5 0.5 RL = 50 W, CL = 100 pF, TBBM (Note 5) Break Before Make Time ns 7. This parameter is guaranteed by design but not tested. The bus switch contributes no propagation delay other than the RC delay of the On Resistance of the switch and the 50 pF load capacitance, when driven by an ideal voltage source (zero output impedance). ORDERING INFORMATION Device Package Marking Pin 1 Orientation (See below) Shipping† NL5S4157ADFT2G SC*88/SC70*6/SOT*363 AT Q4 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. PIN 1 ORIENTATION IN TAPE AND REEL Pin 1 Orientation in Tape and Reel Figure 3. www.onsemi.com 6 NL5S4157A Test Setups Figure 4. tBBM (Time Break−Before−Make) Figure 5. tON/tOFF Test Set-Up Figure 6. tON/tOFF www.onsemi.com 7 NL5S4157A V OUT V OUT V IN V IN Off−Isolation Crosstalk Channel switch control/s test socket is normalized. Off isolation is measured across an off channel. Crosstalk is measured from an off channel to an on channel. On loss is the bandwidth of an On switch. VISO, VCT, Bandwidth and VONL are independent of the input signal direction. VISO or VCT = Off Channel Isolation or crosstalk = 20 Log for VOUT / VIN VONL = On Channel Loss = 20 Log for VOUT / VIN at 100 kHz to 50 MHz Bandwidth (BW) = the frequency 3 dB below VONL Figure 7. Off Channel Isolation/On Channel Loss (BW)/Crosstalk (On Channel to Off Channel)/VONL Figure 8. Charge Injection: (Q) www.onsemi.com 8 NL5S4157A TYPICAL CHARACTERISTICS 0 0 VISO, NO/NC TO COM (dB) −10 −1 −20 −30 −2 BW (dB) −40 −50 −60 −4 −70 −80 −5 −90 −100 −3 0.01 0.1 1 10 −6 100 0.01 0.1 1 100 FREQUENCY (MHz) FREQUENCY (MHz) Figure 9. VISO vs. Frequency @ VCC = 4.5 V Figure 10. Bandwidth vs. Frequency 1.1 0.005 1.0 0.004 125°C 85°C 0.9 0.003 RON (W) THD (%) 10 0.002 25°C 0.8 0.7 −40°C 0.6 0.001 0 0.5 10 100 1K 10K 0.4 100K 1.0 1.5 2.0 2.5 3.0 Figure 11. Total Harmonic Distortion Figure 12. ON Resistance vs. Switch Voltage @ VCC = 2.7 V 0.9 2.7 V 0.8 0.8 0.7 125°C 85°C 0.6 RON (W) RON (W) 0.5 VIS (V) 0.9 25°C 0.5 3.0 V 0.7 3.6 V 0.6 4.5 V −40°C 0.4 5.5 V 0.5 0.3 0.2 0 FREQUENCY (Hz) 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 0.4 4.5 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 VIS (V) VIS (V) Figure 13. ON Resistance vs. Switch Voltage @ VCC = 4.5 V Figure 14. ON Resistance vs. Switch Voltage www.onsemi.com 9 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y 1 SCALE 2:1 DATE 11 DEC 2012 2X aaa H D D H A D 6 5 GAGE PLANE 4 1 2 L L2 E1 E DETAIL A 3 aaa C 2X bbb H D 2X 3 TIPS e B 6X b ddd TOP VIEW C A-B D M A2 DETAIL A A 6X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END. 4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY AND DATUM H. 5. DATUMS A AND B ARE DETERMINED AT DATUM H. 6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP. 7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDITION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER RADIUS OF THE FOOT. ccc C A1 SIDE VIEW C SEATING PLANE END VIEW c RECOMMENDED SOLDERING FOOTPRINT* 6X DIM A A1 A2 b C D E E1 e L L2 aaa bbb ccc ddd MILLIMETERS MIN NOM MAX −−− −−− 1.10 0.00 −−− 0.10 0.70 0.90 1.00 0.15 0.20 0.25 0.08 0.15 0.22 1.80 2.00 2.20 2.00 2.10 2.20 1.15 1.25 1.35 0.65 BSC 0.26 0.36 0.46 0.15 BSC 0.15 0.30 0.10 0.10 GENERIC MARKING DIAGRAM* 6 XXXMG G 6X 0.30 INCHES NOM MAX −−− 0.043 −−− 0.004 0.035 0.039 0.008 0.010 0.006 0.009 0.078 0.086 0.082 0.086 0.049 0.053 0.026 BSC 0.010 0.014 0.018 0.006 BSC 0.006 0.012 0.004 0.004 MIN −−− 0.000 0.027 0.006 0.003 0.070 0.078 0.045 0.66 1 2.50 0.65 PITCH XXX = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. *Date Code orientation and/or position may vary depending upon manufacturing location. *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “G”, may or may not be present. Some products may not follow the Generic Marking. STYLES ON PAGE 2 DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com SC−88/SC70−6/SOT−363 CASE 419B−02 ISSUE Y DATE 11 DEC 2012 STYLE 1: PIN 1. EMITTER 2 2. BASE 2 3. COLLECTOR 1 4. EMITTER 1 5. BASE 1 6. COLLECTOR 2 STYLE 2: CANCELLED STYLE 3: CANCELLED STYLE 4: PIN 1. CATHODE 2. CATHODE 3. COLLECTOR 4. EMITTER 5. BASE 6. ANODE STYLE 5: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 6: PIN 1. ANODE 2 2. N/C 3. CATHODE 1 4. ANODE 1 5. N/C 6. CATHODE 2 STYLE 7: PIN 1. SOURCE 2 2. DRAIN 2 3. GATE 1 4. SOURCE 1 5. DRAIN 1 6. GATE 2 STYLE 8: CANCELLED STYLE 9: PIN 1. EMITTER 2 2. EMITTER 1 3. COLLECTOR 1 4. BASE 1 5. BASE 2 6. COLLECTOR 2 STYLE 10: PIN 1. SOURCE 2 2. SOURCE 1 3. GATE 1 4. DRAIN 1 5. DRAIN 2 6. GATE 2 STYLE 11: PIN 1. CATHODE 2 2. CATHODE 2 3. ANODE 1 4. CATHODE 1 5. CATHODE 1 6. ANODE 2 STYLE 12: PIN 1. ANODE 2 2. ANODE 2 3. CATHODE 1 4. ANODE 1 5. ANODE 1 6. CATHODE 2 STYLE 13: PIN 1. ANODE 2. N/C 3. COLLECTOR 4. EMITTER 5. BASE 6. CATHODE STYLE 14: PIN 1. VREF 2. GND 3. GND 4. IOUT 5. VEN 6. VCC STYLE 15: PIN 1. ANODE 1 2. ANODE 2 3. ANODE 3 4. CATHODE 3 5. CATHODE 2 6. CATHODE 1 STYLE 16: PIN 1. BASE 1 2. EMITTER 2 3. COLLECTOR 2 4. BASE 2 5. EMITTER 1 6. COLLECTOR 1 STYLE 17: PIN 1. BASE 1 2. EMITTER 1 3. COLLECTOR 2 4. BASE 2 5. EMITTER 2 6. COLLECTOR 1 STYLE 18: PIN 1. VIN1 2. VCC 3. VOUT2 4. VIN2 5. GND 6. VOUT1 STYLE 19: PIN 1. I OUT 2. GND 3. GND 4. V CC 5. V EN 6. V REF STYLE 20: PIN 1. COLLECTOR 2. COLLECTOR 3. BASE 4. EMITTER 5. COLLECTOR 6. COLLECTOR STYLE 21: PIN 1. ANODE 1 2. N/C 3. ANODE 2 4. CATHODE 2 5. N/C 6. CATHODE 1 STYLE 22: PIN 1. D1 (i) 2. GND 3. D2 (i) 4. D2 (c) 5. VBUS 6. D1 (c) STYLE 23: PIN 1. Vn 2. CH1 3. Vp 4. N/C 5. CH2 6. N/C STYLE 24: PIN 1. CATHODE 2. ANODE 3. CATHODE 4. CATHODE 5. CATHODE 6. CATHODE STYLE 25: PIN 1. BASE 1 2. CATHODE 3. COLLECTOR 2 4. BASE 2 5. EMITTER 6. COLLECTOR 1 STYLE 26: PIN 1. SOURCE 1 2. GATE 1 3. DRAIN 2 4. SOURCE 2 5. GATE 2 6. DRAIN 1 STYLE 27: PIN 1. BASE 2 2. BASE 1 3. COLLECTOR 1 4. EMITTER 1 5. EMITTER 2 6. COLLECTOR 2 STYLE 28: PIN 1. DRAIN 2. DRAIN 3. GATE 4. SOURCE 5. DRAIN 6. DRAIN STYLE 29: PIN 1. ANODE 2. ANODE 3. COLLECTOR 4. EMITTER 5. BASE/ANODE 6. CATHODE STYLE 30: PIN 1. SOURCE 1 2. DRAIN 2 3. DRAIN 2 4. SOURCE 2 5. GATE 1 6. DRAIN 1 Note: Please refer to datasheet for style callout. If style type is not called out in the datasheet refer to the device datasheet pinout or pin assignment. DOCUMENT NUMBER: DESCRIPTION: 98ASB42985B SC−88/SC70−6/SOT−363 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 2 OF 2 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others. © Semiconductor Components Industries, LLC, 2019 www.onsemi.com onsemi, , and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States and/or other countries. onsemi owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of onsemi’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without notice. The information herein is provided “as−is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality, or suitability of its products for any particular purpose, nor does onsemi assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws, regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use onsemi products for any such unintended or unauthorized application, Buyer shall indemnify and hold onsemi and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Email Requests to: orderlit@onsemi.com onsemi Website: www.onsemi.com ◊ TECHNICAL SUPPORT North American Technical Support: Voice Mail: 1 800−282−9855 Toll Free USA/Canada Phone: 011 421 33 790 2910 Europe, Middle East and Africa Technical Support: Phone: 00421 33 790 2910 For additional information, please contact your local Sales Representative