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www.onsemi.com
onsemi and and other names, marks, and brands are registered and/or common law trademarks of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or
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product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent-Marking.pdf. onsemi reserves the right to make changes at any time to any products or information herein, without
notice. The information herein is provided “as-is” and onsemi makes no warranty, representation or guarantee regarding the accuracy of the information, product features, availability, functionality,
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liability, including without limitation special, consequential or incidental damages. Buyer is responsible for its products and applications using onsemi products, including compliance with all laws,
regulations and safety requirements or standards, regardless of any support or applications information provided by onsemi. “Typical” parameters which may be provided in onsemi data sheets and/
or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application
by customer’s technical experts. onsemi does not convey any license under any of its intellectual property rights nor the rights of others. onsemi products are not designed, intended, or authorized
for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification in a foreign jurisdiction or any devices intended for
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subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that onsemi was negligent regarding the design or manufacture of the part. onsemi is an Equal Opportunity/Affirmative
Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. Other names and brands may be claimed as the property of others.
NTD80N02
Power MOSFET
24 V, 80 A, N−Channel DPAK
Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
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Features
• These Devices are Pb−Free and are RoHS Compliant
Typical Applications
RDS(on) TYP
ID MAX
24 V
5.0 m
80 A
Power Supplies
Converters
Power Motor Controls
Bridge Circuits
N−Channel
D
G
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
24
Vdc
Gate−to−Source Voltage − Continuous
VGS
±20
Vdc
Drain Current − Continuous @ TC = 25°C
Drain Current − Single Pulse (tp = 10 s)
ID
Adc
IDM
80*
200
Total Power Dissipation @ TC = 25°C
PD
75
Watts
TJ, Tstg
−55 to
150
°C
EAS
733
mJ
RθJC
RθJA
RθJA
1.65
67
120
TL
260
Operating and Storage
Temperature Range
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 24 Vdc, VGS = 10 Vdc,
IL = 17 Apk, L = 5.0 mH, RG = 25 Ω)
Thermal Resistance
− Junction−to−Case
− Junction−to−Ambient (Note 1)
− Junction−to−Ambient (Note 2)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
°C/W
S
1 2
3
1 2
3
12
3
CASE 369AA
CASE 369C
CASE 369D
DPAK
DPAK
DPAK
(Surface Mount) (Surface Mount) (Straight Lead)
STYLE 2
STYLE 2
STYLE 2
MARKING DIAGRAMS
& PIN ASSIGNMENTS
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using 1″ pad size,
(Cu Area 1.127 in2).
2. When surface mounted to an FR4 board using the minimum recommended
pad size, (Cu Area 0.412 in2).
*Chip current capability limited by package.
4
4
4
4
Drain
4
Drain
YWW
80
N02G
Rating
YWW
80
N02G
•
•
•
•
V(BR)DSS
1
Gate
2
Drain
3
Source
80N02
Y
WW
G
1
Gate
2
Drain
3
Source
= Device Code
= Year
= Work Week
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
October, 2010 − Rev. 5
1
Publication Order Number:
NTD80N02/D
NTD80N02
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
24
−
27
25
−
−
−
−
−
−
1.0
10
−
−
±100
1.0
−
1.9
−3.8
3.0
−
−
−
−
5.0
7.5
5.0
7.5
5.8
9.0
5.8
9.0
gFS
−
20
−
Mhos
pF
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage (Note 3)
(VGS = 0 Vdc, ID = 250 Adc)
Positive Temperature Coefficient
V(BR)DSS
Zero Gate Voltage Drain Current
(VGS = 0 Vdc, VDS = 24 Vdc)
(VGS = 0 Vdc, VDS = 24 Vdc, TJ = 125°C)
IDSS
Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
Adc
nAdc
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage (Note 3)
(VDS = VGS, ID = 250 Adc)
Negative Threshold Temperature Coefficient
VGS(th)
Static Drain−to−Source On−Resistance (Note 3)
(VGS = 10 Vdc, ID = 80 Adc)
(VGS = 4.5 Vdc, ID = 40 Adc)
(VGS = 10 Vdc, ID = 20 Adc)
(VGS = 4.5 Vdc, ID = 20 Adc)
RDS(on)
Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc) (Note 3)
Vdc
mV/°C
mΩ
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 20 Vdc,
VGS = 0 V,
f = 1.0 MHz)
Output Capacitance
Transfer Capacitance
Ciss
−
2250
2600
Coss
−
900
1100
Crss
−
400
525
td(on)
−
17
30
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
(VGS = 4.5 Vdc,
VDD = 20 Vdc,
ID = 20 Adc,
RG = 2.5 Ω)
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
(VGS = 4.5 Vdc,
ID = 20 Adc,
VDS = 20 Vdc) (Note 3)
tr
−
67
125
td(off)
−
28
45
tf
−
40
75
QT
−
30
42
Q1
−
7.0
12
Q2
−
18
28
−
−
−
0.92
1.05
0.70
1.2
−
−
trr
−
38
52
ta
−
20
−
tb
−
18
−
Qrr
−
0.038
−
ns
nC
SOURCE−DRAIN DIODE CHARACTERISTICS
Forward On−Voltage
(IS = 20 Adc, VGS = 0 Vdc) (Note 3)
(IS = 40 Adc, VGS = 0 Vdc)
(IS = 20 Adc, VGS = 0 Vdc, TJ = 150°C)
Reverse Recovery Time
VSD
(IS = 20 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/s) (Note 3)
Reverse Recovery Stored Charge
3. Pulse Test: Pulse Width ≤ 300 s, Duty Cycle ≤ 2%.
4. Switching characteristics are independent of operating junction temperatures.
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2
Vdc
ns
C
NTD80N02
TYPICAL CHARACTERISTICS
9V
TJ = 25°C
4.2 V
4.8 V
5V
70
60
6.5 V
50
4V
5.2 V
6V
3.8 V
3.6 V
40
30
3.4 V
20
3.2 V
10
VGS = 3.0 V
0
0.5
1
1.5
2
2.5
3
3.5
4
TJ = 25°C
TJ = 125°C
TJ = −55°C
2
4
3
5
6
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 10 A
TJ = 25°C
0.06
0.05
0.04
0.03
0.02
0.01
0
2
4
6
8
10
0.015
TJ = 25°C
0.01
VGS = 4.5 V
VGS = 10 V
0.005
0
55
60
65
70
75
80
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance versus
Gate−To−Source Voltage
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
0.015
1000
0.0125
ID = 80 A
VDS = 4.5 V
0.01
0.0075
ID = 80 A
VDS = 10 V
0.005
−25
0
25
50
75
100
125
VGS = 0 V
TJ = 125°C
100
0.0025
0
−50
VDS ≥ 24 V
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.07
0
160
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
8V
80
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE
4.4 V
4.6 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (Ω)
ID, DRAIN CURRENT (AMPS)
90
ID, DRAIN CURRENT (AMPS)
100
150
TJ = 100°C
10
1
TJ = 25°C
0.1
0.01
4
8
12
16
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−To−Source Leakage
Current versus Voltage
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3
20
NTD80N02
VGS = 0 V
TJ = 25°C
4000
3000
Ciss
2000
Coss
1000
Crss
0
−8 −6 −4 −2 0 2 4
VGS VDS
6
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
5000
8 10 12 14 16 18 20 22 24
28
QT
8
16
4
Q2
12
8
2
ID = 1.0 A
TJ = 25°C
0
10
20
30
40
4
50
0
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage versus Total Charge
80
1000
IS, SOURCE CURRENT (AMPS)
VDD = 20 V
ID = 20 A
VGS = 10 V
t, TIME (ns)
20
VGS
Q1
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
tr
100
tf
td(off)
td(on)
10
1
24
VD
6
0
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TYPICAL CHARACTERISTICS
1
10
70
VGS = 0 V
TJ = 25°C
60
50
40
30
20
10
0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.00
100
RG, GATE RESISTANCE (Ω)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
Figure 10. Diode Forward Voltage versus
Current
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4
NTD80N02
TYPICAL CHARACTERISTICS
ID , DRAIN CURRENT (AMPS)
100
100 s
di/dt
1 ms
VGS = 10 V
SINGLE PULSE
TC = 25°C
10
IS
trr
ta
tb
10 ms
TIME
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.25 IS
tp
IS
1
0.1
1
10
100
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 12. Diode Reverse Recovery Waveform
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1000
MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT
DUTY CYCLE
100
D = 0.5
0.2
0.1
0.05
0.02
0.01
10
1
P(pk)
t1
0.1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
RθJA(t) = r(t) RθJA
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TA = P(pk) RθJA(t)
0.01
1E-05
1E-04
1E-03
1E-02
1E-01
t, TIME (seconds)
1E+00
1E+01
1E+02
1E+03
Figure 13. Thermal Response − Various Duty Cycles
ORDERING INFORMATION
Package
Shipping†
NTD80N02T4G
DPAK−3
(Pb−Free)
2500 / Tape & Reel
NTD80N02−1G
DPAK−3 Straight Lead
(Pb−Free)
75 Units / Rail
Order Number
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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5
NTD80N02
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369AA−01
ISSUE B
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
b2
e
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
H
DETAIL A
3
c
b
0.005 (0.13)
M
H
C
L2
GAUGE
PLANE
C
L
SEATING
PLANE
A1
L1
DETAIL A
ROTATED 905 CW
SOLDERING FOOTPRINT*
6.20
0.244
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
NTD80N02
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
A
E
b3
A
c2
B
4
L3
D
1
L4
C
b2
e
2
3
Z
H
DETAIL A
c
b
0.005 (0.13)
M
H
C
L2
GAUGE
PLANE
C
L
A1
L1
DETAIL A
ROTATED 905 CW
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
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7
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
NTD80N02
PACKAGE DIMENSIONS
DPAK
CASE 369D−01
ISSUE B
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
R
4
Z
A
S
1
2
3
−T−
SEATING
PLANE
K
J
F
D
G
H
3 PL
0.13 (0.005)
M
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
T
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
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Phone: 421 33 790 2910
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8
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTD80N02/D