NTGD4161P Power MOSFET
−30 V, −2.3 A, Dual P−Channel, TSOP−6
Features
• • • • •
Fast Switching Speed Low Gate Charge Low RDS(on) Independently Connected Devices to Provide Design Flexibility This is a Pb−Free Device
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V(BR)DSS −30 V
RDS(on) Max 160 mW @ −10 V 280 mW @ −4.5 V
Applications
• Load Switch • Battery Protection • Portable Devices Like PDAs, Cellular Phones and Hard Drives
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Steady State t≤5s Power Dissipation (Note 1) Steady State t≤5s Continuous Drain Current (Note 2) Power Dissipation (Note 2) Pulsed Drain Current Steady State TA = 25°C TA = 85°C TA = 25°C tp = 10 ms PD IDM TJ, TSTG IS TL ID TA = 25°C TA = 85°C TA = 25°C TA = 25°C PD Symbol VDSS VGS ID Value −30 ±20 −2.1 −1.5 −2.3 1.1 1.3 −1.5 −1.1 0.6 −10 −55 to 150 −0.8 260 W A °C A °C A W Unit V V A
P−Channel (MOSFET1) D1
P−Channel (MOSFET2) D2
G1
G2
S1
S2
MARKING DIAGRAM
D1 S1 D2 1 TSOP−6 CASE 318G STYLE 13 S8 M G S8 MG G G1 S2 G2 = Specific Device Code = Date Code* = Pb−Free Package
Operating Junction and Storage Temperature Source Current (Body Diode) Lead Temperature for Soldering Purposes (1/8” from case for 10 s)
(Note: Microdot may be in either location)
THERMAL RESISTANCE RATINGS
Parameter Junction−to−Ambient − Steady State (Note 1) Junction−to−Ambient − Steady State (Note 2) Junction−to−Ambient − t ≤ 5 s (Note 1) Junction−to−Case − Steady State (Note 1) RqJC Symbol RqJA Max 115 225 95 40 Unit °C/W
*Date Code orientation may vary depending upon manufacturing location.
ORDERING INFORMATION
Device NTGD4161PT1G Package TSOP−6 (Pb−Free) Shipping † 3000 / Tape & Reel
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. When surface mounted to an FR4 board using 1 in. pad size (Cu. area = 1.2 in2 [1 oz] including traces) 2. When surface mounted to an FR4 board using minimum recommended pad size (Cu. area = 0.047 in2)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2006
1
September, 2006 − Rev. 1
Publication Order Number: NTGD4161P/D
NTGD4161P
ELECTRICAL CHARACTERISTICS (TJ=25°C unless otherwise stated)
Parameter OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage Drain−to−Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/TJ IDSS VGS = 0 V, VDS = −24 V TJ = 25°C TJ = 125°C VGS = 0 V, ID = −250 mA −30 22 −1.0 −10 ±100 nA V mV/°C mA Symbol Test Condition Min Typ Max Unit
Gate−to−Source Leakage Current ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Gate Threshold Temperature Coefficient Drain−to−Source On Resistance
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH) VGS(TH)/TJ RDS(on)
VGS = VDS, ID = −250 mA
−1.0
−1.9 −4.7
−3.0
V mV/°C
VGS = −10 V, ID = −2.1 A VGS = −4.5 V, ID = −1.6 A
105 190 2.7
160 280
mΩ
Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate−to−Source Charge Gate−to−Drain Charge SWITCHING CHARACTERISTICS (Note 4) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time
gFS
VDS = −5.0 V, ID = −2.1 A
S
CISS COSS CRSS QG(TOT) QG(TH) QGS QGD VGS = −10 V, VDS = −5.0 V, ID = −2.1A VDS = −15 V, f = 1.0 MHz, VGS = 0 V
281 50 28 5.6 0.65 1.2 0.90 7.1
pF
nC
td(on) tr td(off) tf VGS = −4.5 V, VDD = −15 V, ID = −1.0 A, RG = 6.0 Ω
7.6 9.2 12.5 4.5
14 23 20 12
ns
DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = −0.8 A TJ = 25°C TJ = 125°C −0.79 −0.65 8.0 VGS = 0 V, dIS/dt = 100 A/ms, IS = −0.8 A 5.7 2.3 3 nC ns −1.2 V
Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge
tRR ta tb QRR
3. Pulse Test: pulse width ≤ 300 ms, duty cycle ≤ 2%. 4. Switching characteristics are independent of operating junction temperatures.
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NTGD4161P
TYPICAL PERFORMANCE CURVES
5 −ID, DRAIN CURRENT (A) 5
−10 V
−4.5 V
TJ = 25°C −ID, DRAIN CURRENT (A)
VDS ≥ −3 V
4
−4 V
4
3
−3.8 V −3.6 V −3.4 V
3
2
2 150°C −40°C 1 2 3 4 −VGS, GATE−TO−SOURCE VOLTAGE (V) 5
1
−3.2 V −3 V −2.8 V 0 1 2 3 4 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) 5
1
25°C
0
0
Figure 1. On−Region Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.5 ID = −2.1 A 0.4
0.4 0.35 0.3 VGS = −4.5 V 0.25 0.2 0.15 0.1 VGS = −10 V 0.05 0 0 1 2 3 4 5 6 −ID, DRAIN CURRENT (A) TJ = 25°C
0.3
TJ = 125°C
0.2 TJ = 25°C 0.1
0
3
4
5
6
7
8
9
10
−VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance versus Gate−to−Source Voltage
Figure 4. On−Resistance versus Drain Current and Temperature
RDS(on), DRAIN−TO−SOURCE RESISTANCE
0.3
1000 VGS = 0 V ID = −1.6 A VGS = −4.5 V −IDSS, LEAKAGE(nA) TJ = 150°C
0.2
100
TJ = 125°C
0.1
ID = −2.1 A VGS = −10 V
0.0 −50
10 −25 0 25 50 75 100 125 150 0 5 10 15 20 25 30 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with Temperature
Figure 6. On−Resistance Variation with Temperature
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NTGD4161P
TYPICAL PERFORMANCE CURVES
350 300 C, CAPACITANCE (pF) 250 200 150 100 50 0 0 CRSS 5 10 15 20 25 30 COSS TJ = 25°C VGS = 0 V CISS
−VGS, GATE−TO−SOURCE VOLTAGE (V)
10 QT 8 VGS 6 QGS QGD
10
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
8
6
4
4
2 VDS 0 0 1 2 3 4 5 QG, TOTAL GATE CHARGE (nC) ID = −2.1 A TJ = 25°C
2
0 6
DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge
100
0.8 −IS, SOURCE CURRENT (A) −ID, DRAIN CURRENT (A) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0.3 0.4 0.5 0.6 TJ = 25°C TJ = −40°C 0.7 0.8 0.9 1.0 TJ = 150°C TJ = 125°C VGS = 0 V
10
VGS = −10 V Single Pulse TA = 25°C 100 ms 1 ms
1 10 ms 0.1 RDS(on) Limit Thermal Limit Package Limit 0.01 0.1 1 10 100 −VDS, DRAIN−TO−SOURCE VOLTAGE (V) dc
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Diode Forward Voltage versus Current
Figure 10. Maximum Rated Forward Biased Safe Operating Area
1.0 RqJA, EFFECTIVE TRANSIENT THERMAL RESPONSE (NORMALIZED) 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01
0.001 1E−06
Single Pulse 1E−05 1E−04 1E−03 1E−02 t, time (s) 1E−01 1E+00 1E+01 1E+02 1E+03
Figure 11. FET Thermal Response
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NTGD4161P
PACKAGE DIMENSIONS
TSOP−6 CASE 318G−02 ISSUE S
D
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. MILLIMETERS NOM MAX 1.00 1.10 0.06 0.10 0.38 0.50 0.18 0.26 3.00 3.10 1.50 1.70 0.95 1.05 0.40 0.60 2.75 3.00 10° − INCHES NOM 0.039 0.002 0.014 0.007 0.118 0.059 0.037 0.016 0.108 −
6
5 1 2
4 3
HE
E
b e q 0.05 (0.002) A1 A L c
DIM A A1 b c D E e L HE q MIN 0.90 0.01 0.25 0.10 2.90 1.30 0.85 0.20 2.50 0°
MIN 0.035 0.001 0.010 0.004 0.114 0.051 0.034 0.008 0.099 0°
MAX 0.043 0.004 0.020 0.010 0.122 0.067 0.041 0.024 0.118 10°
SOLDERING FOOTPRINT*
2.4 0.094
STYLE 13: PIN 1. GATE 1 2. SOURCE 2 3. GATE 2 4. DRAIN 2 5. SOURCE 1 6. DRAIN 1
1.9 0.075
0.95 0.037 0.95 0.037
0.7 0.028 1.0 0.039
SCALE 10:1
mm inches
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NTGD4161P/D