NTK3142PT1G

NTK3142P Small Signal MOSFET −20 V, −280 mA, P−Channel with ESD Protection, SOT−723 Features • • • • • • • Enables High Density PCB Manufacturing 44% Smaller Footprint than SC−89 and 38% Thinner than SC−89 Low Voltage Drive Makes this Device Ideal for Portable Equipment Low Threshold Levels, 1.8 V RDS(on) Rating Low Profile (< 0.5 mm) Allows It to Fit Easily into Extremely Thin Environments such as Portable Electronics Operated at Standard Logic Level Gate Drive, Facilitating Future Migration to Lower Levels Using the Same Basic Topology. This is a Pb−Free Device http://onsemi.com V(BR)DSS RDS(on) TYP ID Max 2.7 W @ −4.5 V −20 V −280 mA 4.1 W @ −2.5 V 6.1 W @ −1.8 V SOT−723 (3−LEAD) Applications 3 • Interfacing, Switching • High Speed Switching • Cellular Phones, PDA’s MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Parameter Drain−to−Source Voltage Gate−to−Source Voltage Continuous Drain Current (Note 1) Power Dissipation (Note 1) Power Dissipation (Note 2) Value Unit VDSS −20 V ±8.0 V VGS Steady State TA = 25°C tv5s TA = 25°C Steady State tv5s Continuous Drain Current (Note 2) Symbol Steady State TA = 85°C −260 ID −185 mA 400 TA = 25°C PD TA = 25°C ID TA = 85°C 500 −215 mA −155 IDM −310 mA TJ, TSTG −55 to 150 °C Source Current (Body Diode) (Note 2) IS −240 mA Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TL 260 °C TA = 25°C tp = 10 ms Operating Junction and Storage Temperature mW Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) 2. Surface−mounted on FR4 board using the minimum recommended pad size. © Semiconductor Components Industries, LLC, 2009 Top View MARKING DIAGRAM mW 280 November, 2009 − Rev. 2 1 − Gate 2 − Source 3 − Drain 2 −280 PD Pulsed Drain Current 1 1 KB M CASE 631AA SOT−723 KB M 1 = Specific Device Code = Date Code ORDERING INFORMATION Device Package Shipping† NTK3142PT1G SOT−723 (Pb−Free) 4000/Tape & Reel 4 mm Pitch NTK3142PT5G SOT−723 (Pb−Free) 8000/Tape & Reel 2 mm Pitch †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. Publication Order Number: NTK3142P/D NTK3142P THERMAL RESISTANCE RATINGS Symbol Max Junction−to−Ambient – Steady State (Note 3) Parameter RqJA 315 Junction−to−Ambient – t = 5 s (Note 3) RqJA 250 Junction−to−Ambient – Steady State Minimum Pad (Note 4) RqJA 440 Unit °C/W 3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces) 4. Surface−mounted on FR4 board using the minimum recommended pad size. MOSFET ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min −20 Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = −100 mA Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ ID = −100 mA, Reference to 25°C Zero Gate Voltage Drain Current Gate−to−Source Leakage Current IDSS IGSS VGS = 0 V, VDS = −16 V V 14 mV/°C TJ = 25°C −1.0 TJ = 125°C −2.0 VDS = 0 V, VGS = ±5 V mA $1 mA −1.3 V ON CHARACTERISTICS (Note 5) Gate Threshold Voltage VGS(TH) −0.4 VGS(TH)/TJ VGS = VDS, ID = −250 mA −2.0 Drain−to−Source On Resistance RDS(ON) VGS = −4.5V, ID = −260 mA 2.9 4.0 Drain−to−Source On Resistance RDS(ON) VGS = −4.5V, ID = −10 mA 2.7 3.4 VGS = −2.5 V, ID = −1 mA 4.1 5.3 VGS = −1.8 V, ID = −1 mA 6.1 10 VDS = −5 V, ID = −10 mA 73 Gate Threshold Temperature Coefficient Forward Transconductance gFS mV/°C W W mS CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 15.3 VGS = 0 V, f = 1 MHz, VDS = −10 V 4.3 pF 2.3 SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time td(ON) tr td(OFF) 8.4 16 15.3 28 37.5 80 22.7 43 TJ = 25°C 0.69 −1.2 TJ = 125°C 0.56 VGS = −4.5 V, VDD = −5 V, ID = −100 mA, RG = 6 W tf ns DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time VSD tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS= −10 mA VGS = 0 V, VDD = −20 V, dISD/dt = 100 A/ms, IS = −1.0 A QRR 5. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 37 80 15.9 30 21.1 50 20 70 V ns nC NTK3142P TYPICAL PERFORMANCE CURVES 0.4 VGS = −4 V to −10 V VDS ≥ −5 V −ID, DRAIN CURRENT (AMPS) TJ = 25°C −3.0 V 0.3 −2.5 V 0.2 −2.2 V 0.1 −2.0 V 0 −1.8 V −1.6 V −1.4 V RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 1 0.5 1.5 2.5 2 0.2 0.1 TJ = 150°C 3 1.5 2.5 2 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics 1 ID = −0.26 A TJ = 25°C 9 8 7 6 5 4 3 2 1 1 2 4 3 6 5 7 8 9 10 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 10 8 VGS = −2.5 V 7 6 5 4 3 VGS = −4.5 V 2 1 0 1000 0.3 VGS = 0 V 7.0 VGS = −1.8 V 6.0 VGS = −2.5 V −IDSS, LEAKAGE (nA) VGS = −0.01 V 5.0 4.0 VGS = −4.5 V 3.0 0.2 0.1 −ID, DRAIN CURRENT (AMPS) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 9.0 8.0 3 TJ = 25°C 9 Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), DRAIN−TO−SOURCE RESISTANCE TJ = −40°C −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 10 0 TJ = 25°C 0.3 0 RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) −ID, DRAIN CURRENT (AMPS) 0.4 100 TJ = 150°C 10 TJ = 125°C 2.0 1.0 −50 −25 0 25 50 75 100 125 150 1 5 10 15 TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 20 NTK3142P TYPICAL PERFORMANCE CURVES 30 VDD = −5 V ID = −10 mA VGS = −4.5 V t, TIME (ns) Ciss 15 10 Coss 100 td(off) tf td(on) tr 10 5 0 0 Crss 2.5 5 7.5 10 12.5 15 17.5 −DRAIN−TO−SOURCE VOLTAGE (V) 1 20 1 Figure 7. Capacitance Variation 0.3 −IS, SOURCE CURRENT (AMPS) C, CAPACITANCE (pF) 25 20 1000 TJ = 25°C VGS = 0 V VGS = 0 V 10 RG, GATE RESISTANCE (OHMS) Figure 8. Resistive Switching Time Variation vs. Gate Resistance TJ = 150°C 125°C 25°C −40°C 0.2 0.1 0 0.4 0.6 0.8 0.9 1.0 0.5 0.7 −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 9. Diode Forward Voltage vs. Current http://onsemi.com 4 1.1 100 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS SOT−723 CASE 631AA−01 ISSUE D DATE 10 AUG 2009 SCALE 4:1 −X− D b1 A −Y− 3 E 1 2X HE 2 2X e b C 0.08 X Y 3X 1 3X DIM A b b1 C D E e HE L L2 SIDE VIEW TOP VIEW NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. L GENERIC MARKING DIAGRAM* L2 BOTTOM VIEW STYLE 1: PIN 1. BASE 2. EMITTER 3. COLLECTOR STYLE 2: PIN 1. ANODE 2. N/C 3. CATHODE STYLE 3: PIN 1. ANODE 2. ANODE 3. CATHODE STYLE 4: PIN 1. CATHODE 2. CATHODE 3. ANODE STYLE 5: PIN 1. GATE 2. SOURCE 3. DRAIN XX M 1 XX M RECOMMENDED SOLDERING FOOTPRINT* = Specific Device Code = Date Code *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G”, may or not be present. 2X 0.40 2X MILLIMETERS MIN NOM MAX 0.45 0.50 0.55 0.15 0.21 0.27 0.25 0.31 0.37 0.07 0.12 0.17 1.15 1.20 1.25 0.75 0.80 0.85 0.40 BSC 1.15 1.20 1.25 0.29 REF 0.15 0.20 0.25 0.27 PACKAGE OUTLINE 1.50 3X 0.52 0.36 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON12989D SOT−723 Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. 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