NTMFS4709NT3G

NTMFS4709N Power MOSFET 30 V, 94 A, Single N-Channel, SOIC-8 FL Features • • • • Low RDS(on) to Minimize Conduction Losses Low Capacitance to Minimize Driver Losses Optimized Gate Charge to Minimize Switching Losses These are Pb-Free Devices http://onsemi.com V(BR)DSS 30 V RDS(on) Typ 2.85 mW @ 10 V 4.0 mW @ 4.5 V ID Max 94 A Applications • VCORE Applications • DC-DC Converters • Low Side Switching MAXIMUM RATINGS (TJ=25°C unless otherwise stated) Rating Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current RqJA (Note 1) Power Dissipation RqJA (Note 1) Continuous Drain Current RqJA (Note 2) Power Dissipation RqJA (Note 2) Continuous Drain Current RqJC (Note 1) Power Dissipation RqJC (Note 1) Pulsed Drain Cur‐ rent Current limited by package Operating Junction and Storage Temperature Source Current (Body Diode) Drain to Source Single Pulse Drain-to-Source Avalanche Energy TJ = 25°C, VDD = 50 V, VGS = 10 V, IL = 30 Apk, L = 1.0 mH, RG = 25 W Lead Temperature for Soldering Purposes (1/8” from case for 10 s) TA = 25°C TA = 85°C TA = 25°C TA = 25°C Steady State TA = 85°C TA = 25°C TC = 25°C TC = 85°C TC = 25°C TA = 25°C, tp = 10 ms TA = 25°C PD IDM IDmaxPkg TJ, TSTG IS dV/dt EAS PD ID PD ID Symbol VDSS VGS ID Value 30 ±20 18 13 2.35 11 8.0 0.91 94 68 62.5 140 140 -55 to +150 62.5 10 450 W A A °C A V/ns mJ W A W A Unit V V A N-Channel D G S MARKING DIAGRAM & PIN ASSIGNMENT D 1 SOIC-8 FLAT LEAD CASE 488AA STYLE 1 4709N A Y WW G S S S G D 4709N AYWW G G D D = Specific Device Code = Assembly Location = Year = Work Week = Pb-Free Package (Note: Microdot may be in either location) ORDERING INFORMATION Device Package Shipping† NTMFS4709NT1G SOIC-8 FL 1500 / ape & Reel T (Pb-Free) NTMFS4709NT3G SOIC-8 FL 5000 / ape & Reel T (Pb-Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. TL 260 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. © Semiconductor Components Industries, LLC, 2007 1 July, 2007 - Rev. 3 Publication Order Number: NTMFS4709N/D NTMFS4709N THERMAL RESISTANCE MAXIMUM RATINGS Rating Junction-to-Case (Drain) Junction-to-Ambient – Steady State (Note 3) Junction-to-Ambient – Steady State (Note 4) 3. Surface-mounted on FR4 board using 1 sq in pad, 1 oz Cu. 4. Surface-mounted on FR4 board using the minimum recommended pad size. Symbol RqJC RqJA RqJA Value 2.0 53.2 137.8 Unit °C/W ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage Drain-to-Source Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current V(BR)DSS V(BR)DSS/T J Symbol Test Condition Min Typ Max Unit VGS = 0 V, ID = 250 mA 30 5.6 V mV/°C 1.0 10 ±100 nA mA IDSS VGS = 0 V, VDS = 24 V TJ = 25°C TJ = 125°C Gate-to-Source Leakage Current ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Drain-to-Source On Resistance IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS(TH)/TJ RDS(on) VGS = VDS, ID = 250 mA 1.0 5.6 3.0 V mV/°C VGS = 11.5 V ID = 30 A ID = 15 A 2.8 2.8 2.85 4.0 4.0 41 S 3.6 5.5 mW VGS = 10 V VGS = 4.5 V ID = 30 A ID = 30 A ID = 15 A Forward Transconductance CHARGES AND CAPACITANCES Input Capacitance Output Capacitance Reverse Transfer Capacitance Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge Threshold Gate Charge Gate-to-Source Charge Gate-to-Drain Charge SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time gFS VDS = 15 V, ID = 15 A CISS COSS CRSS QG(TOT) QG(TH) QGS QGD QG(TOT) QG(TH) QGS QGD VGS = 11.5 V, VDS = 15 V; ID = 30 A VGS = 4.5 V, VDS = 15 V; ID = 30 A VGS = 0 V, f = 1 MHz, VDS = 12 V 2370 1240 305 20 2.4 4.5 11 48 4.0 6.5 10.6 nC nC pF td(ON) tr td(OFF) tf VGS = 4.5 V, VDS = 15 V, ID = 30 A, RG = 3.0 W 16 173 20 105 ns 5. Pulse Test: pulse width "300 ms, duty cycle "2% 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NTMFS4709N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter SWITCHING CHARACTERISTICS (Note 6) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD VGS = 0 V, IS = 20 A VGS = 0 V, IS = 50 A VGS = 0 V, IS = 20 A Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge Package Parasitic Values Gate Resistance RG TA = 25°C 0.65 W tRR ta tb QRR VGS = 0 V, dIS/dt = 100 A/ms, IS = 25 A TJ = 25°C TJ = 25°C TJ = 125°C 0.75 0.85 0.7 48 23 25 55 nC ns 1.0 V td(ON) tr td(OFF) tf VGS = 11.5 V, VDS = 15 V, ID = 30 A, RG = 3.0 W 8.5 87 31.5 8.5 ns Symbol Test Condition Min Typ Max Unit 5. Pulse Test: pulse width "300 ms, duty cycle "2% 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 NTMFS4709N 60 50 40 30 20 10 2.2 V 0 0 2 4 6 8 10 VDS, DRAIN-TO-SOURCE VOLTAGE (V) 0 0 1 2 2.6 V 10 V 4.5 V 3.5 V VGS = 3 V ID, DRAIN CURRENT (A) TJ = 25°C 60 50 40 30 20 10 TJ = 125°C TJ = 25°C TJ = -55°C 3 4 5 VDS ≥ 10 V ID, DRAIN CURRENT (A) VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0.006 VGS = 11.5 V 0.005 T = 125°C 0.004 0.003 T = 25°C 0.002 0.001 0 0 10 20 30 40 50 ID, DRAIN CURRENT (A) T = -55°C 0.005 Figure 2. Transfer Characteristics T = 150°C TJ = 25°C VGS = 4.5 V 0.004 0.003 VGS = 11.5 V 0.002 0.001 0 0 10 20 30 40 50 60 ID, DRAIN CURRENT (A) 60 Figure 3. On-Resistance versus Drain Current and Temperature RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 2 ID = 30 A VGS = 10 V 1.5 IDSS, LEAKAGE (nA) 10000 100000 Figure 4. On-Resistance versus Drain Current and Gate Voltage VGS = 0 V TJ = 150°C 1 1000 0.5 TJ = 125°C 0 -50 100 -25 0 25 50 75 100 125 150 0 5 10 15 20 25 30 TJ, TEMPERATURE (°C) VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current versus Voltage http://onsemi.com 4 NTMFS4709N VGS, GATE-TO-SOURCE VOLTAGE (V) 4000 TJ = 25°C CISS C, CAPACITANCE (pF) 3000 CISS 2000 CRSS 1000 COSS CRSS 10 15 20 25 12 10 8 6 4 2 0 0 10 20 30 Qg, TOTAL GATE CHARGE (nC) Qgs Qgd QT 0 10 VDS = 0 V 5 VGS 0 VGS = 0 V 5 VDS ID = 30 A TJ = 25°C 40 50 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (V) Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 1000 30 VDD = 15 V ID = 30 A VGS = 11.5 V tr td(off) tf VGS = 0 V TJ = 25°C IS, SOURCE CURRENT (A) t, TIME (ns) 100 20 10 td(on) 10 1 1 10 RG, GATE RESISTANCE (W) 100 0 0 0.2 0.4 0.6 0.8 1 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 9. Resistive Switching Time Variation versus Gate Resistance EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 700 Figure 10. Diode Forward Voltage versus Current ID = 36 A 600 500 400 300 200 100 0 25 50 75 100 125 150 TJ, STARTING JUNCTION TEMPERATURE (°C) Figure 11. Maximum Avalanche Energy versus Starting Junction Temperature http://onsemi.com 5 NTMFS4709N PACKAGE DIMENSIONS DFN6 5x6, 1.27P (SO8 FL) CASE 488AA-01 ISSUE C 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 2X 0.20 C D 2 D1 6 5 A B 0.20 C 4X E1 2 E c 1 2 3 4 q A1 TOP VIEW 3X C SEATING PLANE 0.10 C A 0.10 C SIDE VIEW 8X e DETAIL A DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 --0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.15 BSC 4.50 4.90 5.10 3.50 --4.22 6.15 BSC 5.50 5.80 6.10 3.45 --4.30 1.27 BSC 0.51 0.61 0.71 0.51 ----0.51 0.61 0.71 0.05 0.17 0.20 3.00 3.40 3.80 0_ --12 _ SOLDERING FOOTPRINT* DETAIL A 3X 4X b e/2 1 4 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 1.270 0.750 4X 0.10 0.05 CAB c L 1.000 0.965 1.330 2X K E2 L1 6 5 0.905 4.530 0.475 2X 0.495 M 3.200 G D2 BOTTOM VIEW 4.560 2X 1.530 *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 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