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NTMSD2P102LR2_06

NTMSD2P102LR2_06

  • 厂商:

    ONSEMI(安森美)

  • 封装:

  • 描述:

    NTMSD2P102LR2_06 - NTMSD2P102LR2 - ON Semiconductor

  • 数据手册
  • 价格&库存
NTMSD2P102LR2_06 数据手册
NTMSD2P102LR2 FETKY™ Features Power MOSFET and Schottky Diode Dual SO−8 Package • High Efficiency Components in a Single SO−8 Package • High Density Power MOSFET with Low RDS(on), • • • • • Schottky Diode with Low VF Logic Level Gate Drive Independent Pin−Outs for MOSFET and Schottky Die Allowing for Flexibility in Application Use Less Component Placement for Board Space Savings SO−8 Surface Mount Package, Mounting Information for SO−8 Package Provided Pb−Free Package is Available http://onsemi.com MOSFET −2.3 AMPERES, −20 VOLTS 90 mW @ VGS = −4.5 V SCHOTTKY DIODE 2.0 AMPERES, 20 VOLTS 580 mV @ IF = 2.0 A A 1 SO−8 CASE 751 STYLE 18 A S G 1 2 3 4 5 8 7 6 C C D D Applications • Power Management in Portable and Battery−Powered Products, i.e.: Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones MOSFET MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Drain−to−Source Voltage Gate−to−Source Voltage − Continuous Thermal Resistance, Junction−to−Ambient (Note 1) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 100°C Pulsed Drain Current (Note 4) Thermal Resistance, Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 100°C Pulsed Drain Current (Note 4) Thermal Resistance, Junction−to−Ambient (Note 3) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 100°C Pulsed Drain Current (Note 4) Operating and Storage Temperature Range Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −20 Vdc, VGS = −4.5 Vdc, Peak IL = −5.0 Apk, L = 28 mH, RG = 25 W) Maximum Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds Symbol VDSS VGS RqJA PD ID ID IDM RqJA PD ID ID IDM RqJA PD ID ID IDM TJ, Tstg EAS Value −20 "10 175 0.71 −2.3 −1.45 −9.0 105 1.19 −2.97 −1.88 −12 62.5 2.0 −3.85 −2.43 −15 −55 to +150 350 Unit V V °C/W W A A A °C/W W A A A °C/W W A A A °C mJ 8 TOP VIEW MARKING DIAGRAM & PIN ASSIGNMENTS Anode Anode Source Gate 4 1 2 3 E2P102 AYWW G (Top View) E2P102 A Y WW G = Device Code = Assembly Location = Year = Work Week = Pb−Free Package 8 7 6 5 Cathode Cathode Drain Drain ORDERING INFORMATION TL 260 °C Device NTMSD2P102LR2 NTMSD2P102LR2G Package SO−8 Shipping† 2500/Tape & Reel Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Minimum FR−4 or G−10 PCB, Steady State. 2. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), Steady State. 3. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds. 4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. © Semiconductor Components Industries, LLC, 2006 SO−8 2500/Tape & Reel (Pb−Free) †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D. 1 May, 2006− Rev. 3 Publication Order Number: NTMSD2P102LR2/D NTMSD2P102LR2 SCHOTTKY MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Rating Peak Repetitive Reverse Voltage DC Blocking Voltage Average Forward Current (Note 5) (Rated VR, TA = 100°C) Peak Repetitive Forward Current (Note 5) (Rated VR, Square Wave, 20 kHz, TA = 105°C) Non−Repetitive Peak Surge Current (Note 5) (Surge Applied at Rated Load Conditions, Half−Wave, Single Phase, 60 Hz) Symbol VRRM VR IO IFRM IFSM Value 20 1.0 2.0 20 Unit V A A A ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 6) Characteristic OFF CHARACTERISTICS Drain−to−Source Breakdown Voltage (VGS = 0 Vdc, ID = −250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = −16 Vdc, VGS = 0 Vdc, TJ = 25°C) (VDS = −16 Vdc, VGS = 0 Vdc, TJ = 125°C) Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = −20 Vdc, TJ = 25°C) Gate−Body Leakage Current (VGS = −10 Vdc, VDS = 0 Vdc) Gate−Body Leakage Current (VGS = +10 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = −250 mAdc) Temperature Coefficient (Negative) Static Drain−to−Source On−State Resistance (VGS = −4.5 Vdc, ID = −2.4 Adc) (VGS = −2.7 Vdc, ID = −1.2 Adc) (VGS = −2.5 Vdc, ID = −1.2 Adc) Forward Transconductance (VDS = −10 Vdc, ID = −1.2 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance (VDS = −16 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss Coss Crss − − − 550 200 100 750 300 175 pF VGS(th) −0.5 − RDS(on) − − − gFS − 4.2 − 0.070 0.100 0.110 0.090 0.130 0.150 Mhos −0.90 2.5 −1.5 − Vdc mV/°C W V(BR)DSS −20 − IDSS − − IDSS − IGSS − IGSS − − 100 − −100 nAdc − −2.0 nAdc − − −1.0 −25 mAdc − −12.7 − − Vdc mV/°C mAdc Symbol Min Typ Max Unit 5. Mounted onto a 2″ square FR−4 Board (1″ sq. 2 oz Cu 0.06″ thick single sided), t ≤ 10 seconds. 6. Handling precautions to protect against electrostatic discharge is mandatory. http://onsemi.com 2 NTMSD2P102LR2 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (continued) (Note 7) Characteristic SWITCHING CHARACTERISTICS (Notes 8 & 9) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time Total Gate Charge Gate−Source Charge Gate−Drain Charge BODY−DRAIN DIODE RATINGS (Note 8) Diode Forward On−Voltage Reverse Recovery Time (IS = −2.4 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) Reverse Recovery Stored Charge (IS = −2.4 Adc, VGS = 0 Vdc) (IS = −2.4 Adc, VGS = 0 Vdc, TJ = 125°C) VSD trr ta tb QRR − − − − − − −0.88 −0.75 37 16 21 0.025 −1.0 − − − − − mC Vdc ns (VDS = −16 Vdc, VGS = −4.5 Vdc, ID = −2.4 Adc) (VDD = −10 Vdc, ID = −1.2 Adc, VGS = −2.7 Vdc, RG = 6.0 W) (VDD = −10 Vdc, ID = −2.4 Adc, VGS = −4.5 Vdc, RG = 6.0 W) td(on) tr td(off) tf td(on) tr td(off) tf Qtot Qgs Qgd − − − − − − − − − − − 10 35 33 29 15 40 35 35 10 1.5 5.0 20 65 60 55 − − − − 18 − − nC ns ns Symbol Min Typ Max Unit SCHOTTKY RECTIFIER ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) (Note 8) Maximum Instantaneous Forward Voltage IF = 1.0 Adc IF = 2.0 Adc Maximum Instantaneous Reverse Current VR = 20 Vdc Maximum Voltage Rate of Change VR = 20 Vdc dV/dt IR VF TJ = 25°C 0.47 0.58 TJ = 25°C 0.05 10,000 TJ = 125°C 0.39 0.53 TJ = 125°C 10 V/ms mA V 7. Handling precautions to protect against electrostatic discharge is mandatory. 8. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%. 9. Switching characteristics are independent of operating junction temperature. http://onsemi.com 3 NTMSD2P102LR2 4 VGS = −2.1 V −ID, DRAIN CURRENT (AMPS) 3 VGS = −10 V VGS = −4.5 V VGS = −2.5 V TJ = 25°C −ID, DRAIN CURRENT (AMPS) 4 5 VDS > = −10 V VGS = −1.9 V 3 2 VGS = −1.7 V 1 VGS = −1.5 V 0 0 2 4 6 8 10 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 2 TJ = 25°C 1 0 1 TJ = 100°C 1.5 TJ = 55°C 2 2.5 3 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) Figure 1. On−Region Characteristics. RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics. 0.2 TJ = 25°C 0.12 TJ = 25°C 0.15 0.1 VGS = −2.7 V 0.08 VGS = −4.5 V 0.06 0.1 0.05 0 2 4 6 8 −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 0.04 1 1.5 2 2.5 3 3.5 4 4.5 −ID, DRAIN CURRENT (AMPS) Figure 3. On−Resistance vs. Gate−to−Source Voltage. Figure 4. On−Resistance vs. Drain Current and Gate Voltage. 1.6 RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) ID = −2.4 A VGS = −4.5 V 1000 VGS = 0 V −IDSS, LEAKAGE (nA) 100 TJ = 100°C 10 TJ = 25°C 1 TJ = 125°C 1.4 1.2 1 0.8 0.1 0.6 −50 0.01 −25 0 25 75 50 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 0 4 8 12 16 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) 20 Figure 5. On−Resistance Variation with Temperature. Figure 6. Drain−to−Source Leakage Current vs. Voltage. http://onsemi.com 4 NTMSD2P102LR2 1500 VDS = 0 V C, CAPACITANCE (pF) 1200 Ciss VGS = 0 V TJ = 25°C 5 QT 4 20 18 16 14 3 Q1 2 ID = −2.4 A TJ = 25°C Q2 VGS 12 10 8 6 1 0 0 2 4 6 8 10 12 14 Qg, TOTAL GATE CHARGE (nC) VDS 4 2 0 −VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS) −VGS, GATE−TO−SOURCE VOLTAGE (VOLTS) 900 Crss 600 Ciss 300 Coss Crss 0 10 5 0 −VGS −VDS 5 10 15 20 GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS) Figure 8. Gate−to−Source and Drain−to−Source Voltage versus Total Charge Figure 7. Capacitance Variation 1000 VDD = −10 V ID = −1.2 A VGS = −2.7 V t, TIME (ns) t, TIME (ns) 100 td (off) tr tf 100 tr td (off) td (on) 10 1.0 10 RG, GATE RESISTANCE (OHMS) 100 tf 10 td (on) VDD = −10 V ID = −2.4 A VGS = −4.5 V 1.0 1.0 10 RG, GATE RESISTANCE (OHMS) 100 Figure 9. Resistive Switching Time Variation versus Gate Resistance 2 −IS, SOURCE CURRENT (AMPS) VGS = 0 V TJ = 25°C Figure 10. Resistive Switching Time Variation versus Gate Resistance 1.6 di/dt IS 1.2 trr ta tb TIME 0.8 tp 0.4 0 0.4 IS 0.25 IS 0.5 0.6 0.7 0.8 0.9 1 Figure 12. Diode Reverse Recovery Waveform −VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS) Figure 11. Diode Forward Voltage versus Current http://onsemi.com 5 NTMSD2P102LR2 1 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESPONSE D = 0.5 0.2 Normalized to R∅ja at Steady State (1 inch pad) 0.0125 W 0.0563 W 0.05 0.02 0.01 0.021 F 0.137 F 1.15 F 2.93 F 152 F 261 F 0.110 W 0.273 W 0.113 W 0.436 W 0.1 0.1 Single Pulse 0.01 1E−03 1E−02 1E−01 1E+00 t, TIME (s) 1E+03 1E+02 1E+03 Figure 13. FET Thermal Response TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS 10 IF, INSTANTANEOUS FORWARD CURRENT (AMPS) IF, INSTANTANEOUS FORWARD CURRENT (AMPS) 10 TJ = 125°C TJ = 125°C 1.0 85°C 25°C 1.0 85°C 25°C −40° C 0.1 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VF, INSTANTANEOUS FORWARD VOLTAGE (VOLTS) 0.1 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 VF, MAXIMUM INSTANTANEOUS FORWARD VOLTAGE (VOLTS) Figure 14. Typical Forward Voltage Figure 15. Maximum Forward Voltage http://onsemi.com 6 NTMSD2P102LR2 TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS IR, MAXIMUM REVERSE CURRENT (AMPS) 1E−2 IR , REVERSE CURRENT (AMPS) TJ = 125°C 85°C 1E−1 TJ = 125°C 1E−3 1E−2 1E−4 1E−3 1E−5 25°C 1E−4 25°C 1E−5 1E−6 0 5.0 10 15 20 VR, REVERSE VOLTAGE (VOLTS) 1E−6 1E−7 0 5.0 10 15 20 VR, REVERSE VOLTAGE (VOLTS) Figure 16. Typical Reverse Current Figure 17. Maximum Reverse Current 1000 TYPICAL CAPACITANCE AT 0 V = 170 pF C, CAPACITANCE (pF) IO, AVERAGE FORWARD CURRENT (AMPS) 1.6 dc 1.4 1.2 1.0 0.8 0.6 Ipk/Io = 10 0.4 0.2 0 0 20 40 60 80 100 120 140 160 TA, AMBIENT TEMPERATURE (°C) Ipk/Io = 20 SQUARE WAVE Ipk/Io = p Ipk/Io = 5.0 FREQ = 20 kHz 100 10 0 5.0 10 15 20 VR, REVERSE VOLTAGE (VOLTS) Figure 18. Typical Capacitance Figure 19. Current Derating PFO, AVERAGE POWER DISSIPATION (WATTS) 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 0 0.5 1.0 1.5 2.0 IO, AVERAGE FORWARD CURRENT (AMPS) SQUARE WAVE dc Ipk/Io = p Ipk/Io = 5.0 Ipk/Io = 10 Ipk/Io = 20 Figure 20. Forward Power Dissipation http://onsemi.com 7 NTMSD2P102LR2 TYPICAL SCHOTTKY ELECTRICAL CHARACTERISTICS 1.0 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 t, TIME (s) 1.0E+00 1.0E+01 1.0E+02 1.0E+03 NORMALIZED TO RqJA AT STEADY STATE (1″ PAD) 0.0031 W CHIP JUNCTION 0.0014 F 0.0154 W 0.0082 F 0.1521 W 0.4575 W 0.3719 W 0.1052 F 2.7041 F 158.64 F AMBIENT Figure 21. Schottky Thermal Response http://onsemi.com 8 NTMSD2P102LR2 PACKAGE DIMENSIONS SOIC−8 NB CASE 751−07 ISSUE AH −X− A 8 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 B 1 4 S 0.25 (0.010) M Y M −Y− G C −Z− H D 0.25 (0.010) M SEATING PLANE K N X 45 _ 0.10 (0.004) M J ZY S X S DIM A B C D G H J K M N S SOLDERING FOOTPRINT* 1.52 0.060 STYLE 18: PIN 1. ANODE 2. ANODE 3. SOURCE 4. GATE 5. DRAIN 6. DRAIN 7. CATHODE 8. CATHODE 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. FETKY is a trademark of International Rectifier Corporation. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative http://onsemi.com 9 NTMSD2P102R2/D
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