NTPF082N65S3F

NTPF082N65S3F MOSFET – Power, N-Channel, SUPERFET III, FRFET 650 V, 40 A, 82 mW Description SUPERFET III MOSFET is ON Semiconductor’s brand-new high voltage super-junction (SJ) MOSFET family that is utilizing charge balance technology for outstanding low on-resistance and lower gate charge performance. This advanced technology is tailored to minimize conduction loss, provide superior switching performance, and withstand extreme dv/dt rate. Consequently, SUPERFET III MOSFET is very suitable for the various power system for miniaturization and higher efficiency. SUPERFET III FRFET MOSFET’s optimized reverse recovery performance of body diode can remove additional component and improve system reliability. www.onsemi.com VDS RDS(ON) MAX ID MAX 650 V 82 mW @ 10 V 40 A D G Features • • • • • • 700 V @ TJ = 150°C Typ. RDS(on) = 70 mW Ultra Low Gate Charge (Typ. Qg = 70 nC) Low Effective Output Capacitance (Typ. Coss(eff.) = 680 pF) 100% Avalanche Tested These Devices are Pb−Free and are RoHS Compliant Applications S G D S • Telecom/Sever Power Supplies • Industrial Power Supplies • UPS/Solar TO−220 FULLPAK CASE 221D MARKING DIAGAM $Y&Z&3&K NTPF 082N65S3F $Y = ON Semiconductor Logo &Z = Assembly Plant Code &3 = Numeric Date Code &K = Lot Code NTPF082N65S3F = Specific Device Code ORDERING INFORMATION See detailed ordering and shipping information on page 2 of this data sheet. © Semiconductor Components Industries, LLC, 2017 August, 2019 − Rev. 5 1 Publication Order Number: NTPF082N65S3F/D NTPF082N65S3F ABSOLUTE MAXIMUM RATINGS (TC = 25°C, Unless otherwise specified) Symbol Parameter VDSS Drain to Source Voltage VGSS Gate to Source Voltage ID Drain Current Value Unit 650 V DC ±30 V AC (f > 1 Hz) ±30 V Continuous (TC = 25°C) 40* A Continuous (TC = 100°C) 25.5* Pulsed (Note 1) IDM Drain Current 100* A EAS Single Pulsed Avalanche Energy (Note 2) 510 mJ IAS Avalanche Current (Note 2) 4.8 A EAR Repetitive Avalanche Energy (Note 1) 0.48 mJ dv/dt MOSFET dv/dt 100 V/ns Peak Diode Recovery dv/dt (Note 3) 50 PD Power Dissipation (TC = 25°C) 48 W 0.38 W/°C −55 to +150 °C 300 °C Derate Above 25°C TJ, TSTG TL Operating and Storage Temperature Range Maximum Lead Temperature for Soldering, 1/8″ from Case for 5 s Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. *Drain current limited by maximum junction temperature. 1. Repetitive rating: pulse-width limited by maximum junction temperature. 2. IAS = 4.8 A, RG = 25 W, starting TJ = 25°C. 3. ISD ≤ 20 A, di/dt ≤ 200 A/ms, VDD ≤ 400 V, starting TJ = 25°C. THERMAL CHARACTERISTICS Symbol Parameter Value Unit _C/W RqJC Thermal Resistance, Junction to Case, Max. 2.62 RqJA Thermal Resistance, Junction to Ambient, Max. 62.5 PACKAGE MARKING AND ORDERING INFORMATION Part Number Top Marking Package Packing Method Quantity NTPF082N65S3F NTPF082N65S3F TO−220 FULLPACK (Pb−Free) Tube 50 Units www.onsemi.com 2 NTPF082N65S3F ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted) Parameter Symbol Test Conditions Min Typ Max Unit VGS = 0 V, ID = 1 mA, TJ = 25_C 650 − − V VGS = 0 V, ID = 1 mA, TJ = 150_C 700 − − V OFF CHARACTERISTICS BVDSS Drain to Source Breakdown Voltage DBVDSS/DTJ Breakdown Voltage Temperature Coefficient ID = 10 mA, Referenced to 25_C − 0.67 − V/_C IDSS Zero Gate Voltage Drain Current VDS = 650 V, VGS = 0 V − − 10 mA VDS = 520 V, TC = 125_C − 97 − IGSS Gate to Body Leakage Current VGS = ±30 V, VDS = 0 V − − ±100 nA 3.0 − 5.0 V ON CHARACTERISTICS VGS(th) Gate Threshold Voltage VGS = VDS, ID = 0.97 mA RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 20 A − 70 82 mW Forward Transconductance VDS = 20 V, ID = 20 A − 24 − S VDS = 400 V, VGS = 0 V, f = 1 MHz − 3240 − pF − 70 − pF gFS DYNAMIC CHARACTERISTICS Ciss Input Capacitance Coss Output Capacitance Coss(eff.) Effective Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 680 − pF Coss(er.) Energy Related Output Capacitance VDS = 0 V to 400 V, VGS = 0 V − 125 − pF Total Gate Charge at 10 V VDS = 400 V, ID = 20 A, VGS = 10 V (Note 4) − 70 − nC − 24 − nC Qg(tot) Qgs Gate to Source Gate Charge Qgd Gate to Drain “Miller” Charge ESR Equivalent Series Resistance − 27 − nC f = 1 MHz − 2.3 − W VDD = 400 V, ID = 20 A, VGS = 10 V, Rg = 3 W (Note 4) − 30 − ns − 27 − ns SWITCHING CHARACTERISTICS td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time − 64 − ns Turn-Off Fall Time − 3.7 − ns Maximum Continuous Source to Drain Diode Forward Current − − 40 A ISM Maximum Pulsed Source to Drain Diode Forward Current − − 100 A VSD Source to Drain Diode Forward Voltage VGS = 0 V, ISD = 20 A − − 1.3 V trr Reverse Recovery Time − 103 − ns Qrr Reverse Recovery Charge VGS = 0 V, ISD = 20 A, dIF/dt = 100 A/ms − 397 − nC tf SOURCE-DRAIN DIODE CHARACTERISTICS IS Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 4. Essentially independent of operating temperature typical characteristics. www.onsemi.com 3 NTPF082N65S3F TYPICAL PERFORMANCE CHARACTERISTICS 200 * Notes: 1. VDS = 20 V 2. 250 ms Pulse Test 100 ID, Drain Current [A] ID, Drain Current [A] 200 VGS = 10.0V 8.0 V 7.0 V 6.5 V 6.0 V 5.5 V 100 10 1 150°C 10 25°C * Notes: 1. 250 ms Pulse Test 2. TC = 25°C 0.1 0.2 1 −55°C 1 10 3 7 8 Figure 2. Transfer Characteristics 9 1000 IS, Reverse Drain Current [A] RDS(ON), Drain-Source On-Resistance [W] 6 Figure 1. On-Region Characteristics * Note: TC = 25°C 0.15 0.10 VGS = 10 V VGS = 20 V 0.05 0 20 40 60 80 * Notes: 1. VGS = 0 V 2. 250 ms Pulse Test 100 150°C 10 25°C 1 −55°C 0.1 0.01 0.001 0.0 100 0.5 1.0 1.5 2.0 ID, Drain Current [A] VSD, Body Diode Forward Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 100000 10 10000 Ciss VGS, Gate-Source Voltage [V] Capacitance [pF] 5 VGS, Gate-Source Voltage [V] 0.20 0.00 4 VDS, Drain-Source Voltage [V] 1000 Coss 100 * Notes: 1. VGS = 0 V 2. f = 1 MHz 10 1 Crss Ciss = Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 0.01 0.1 1 10 100 8 VDS = 130 V VDS = 400 V 6 4 2 0 1000 * Note: ID = 20 A 0 20 40 60 80 VDS, Drain-Source Voltage [V] Qg, Total Gate Charge [nC] Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics www.onsemi.com 4 NTPF082N65S3F TYPICAL PERFORMANCE CHARACTERISTICS (Continued) 3.0 * Notes: 1. VGS = 0 V 2. ID = 10 mA RDS(on), [Normalized] Drain-Source On-Resistance BVDSS, [Normalized] Drain-Source Breakdown Voltage 1.2 1.1 1.0 0.9 0.8 −50 0 100 50 * Notes: 1. VGS = 10 V 2. ID = 20 A 2.5 2.0 1.5 1.0 0.5 0.0 150 −50 Figure 7. Breakdown Voltage Variation vs. Temperature 200 100 10 ms 40 ID, Drain Current [A] ID, Drain Current [A] 1 ms 10 ms 1 Operation in This Area is Limited by RDS(on) DC * Notes: 1. TJ = 25°C 2. TJ = 150°C 3. Single Pulse 0.1 1 30 20 10 10 100 0 1000 VDS, Drain-Source Voltage [V] 16 12 8 4 130 260 390 520 50 75 100 125 150 Figure 10. Maximum Drain Current vs. Case Temperature 20 0 25 TC, Case Temperature [5C] Figure 9. Maximum Safe Operation Area EOSS, [mJ] 150 100 50 10 0 50 Figure 8. On-Resistance Variant vs. Temperature 100 ms 0.01 0 TJ, Junction Temperature [5C] TJ, Junction Temperature [5C] 650 VDS, Drain to Source Voltage [V] Figure 11. EOSS vs. Drain to Source Voltage www.onsemi.com 5 NTPF082N65S3F TYPICAL PERFORMANCE CHARACTERISTICS (Continued) r(t), Normalized Effective Transient Thermal Resistance 2 1 0.1 DUTY CYCLE−DESCENDING ORDER D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 t2 Notes: ZqJC(t) = r(t) × RqJC RqJC = 2.62°C/W Peak TJ = PDM × ZqJC(t) + TC Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 10−4 10−3 10−2 10−1 100 t, Rectangular Pulse Duration (s) Figure 12. Transient Thermal Response Curve www.onsemi.com 6 101 102 NTPF082N65S3F VGS RL Qg VDS VGS Qgs Qgd DUT IG = Const. Charge Figure 13. Gate Charge Test Circuit & Waveform RL VDS VDS 90% 90% 90% VDD VGS RG VGS DUT VGS 10% td(on) 10% tr tf td(off) ton toff Figure 14. Resistive Switching Test Circuit & Waveforms L E AS + 1 @ LI AS 2 VDS BVDSS ID IAS RG VDD DUT VGS 2 ID(t) VDD VDS(t) tp tp Figure 15. Unclamped Inductive Switching Test Circuit & Waveforms www.onsemi.com 7 Time NTPF082N65S3F + DUT VSD − ISD L Driver RG Same Type as DUT VGS − dv/dt controlled by RG − ISD controlled by pulse period D+ VGS (Driver) VDD Gate Pulse Width Gate Pulse Period 10 V IFM, Body Diode Forward Current ISD (DUT) di/dt IRM Body Diode Reverse Current Body Diode Recovery dv/dt VDS (DUT) VDD VSD Body Diode Forward Voltage Drop Figure 16. Peak Diode Recovery dv/dt Test Circuit & Waveforms SUPERFET and FRFET are a registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. www.onsemi.com 8 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS TO−220 FULLPAK CASE 221D−03 ISSUE K −T− −B− F C S Q SCALE 1:1 SEATING PLANE U 1 2 3 −Y− K G N L D STYLE 1: PIN 1. GATE 2. DRAIN 3. SOURCE STYLE 2: PIN 1. BASE 2. COLLECTOR 3. EMITTER STYLE 4: PIN 1. CATHODE 2. ANODE 3. CATHODE STYLE 5: PIN 1. CATHODE 2. ANODE 3. GATE J R 3 PL 0.25 (0.010) M B M Y DESCRIPTION: INCHES MIN MAX 0.617 0.635 0.392 0.419 0.177 0.193 0.024 0.039 0.116 0.129 0.100 BSC 0.118 0.135 0.018 0.025 0.503 0.541 0.048 0.058 0.200 BSC 0.122 0.138 0.099 0.117 0.092 0.113 0.239 0.271 MILLIMETERS MIN MAX 15.67 16.12 9.96 10.63 4.50 4.90 0.60 1.00 2.95 3.28 2.54 BSC 3.00 3.43 0.45 0.63 12.78 13.73 1.23 1.47 5.08 BSC 3.10 3.50 2.51 2.96 2.34 2.87 6.06 6.88 MARKING DIAGRAMS STYLE 3: PIN 1. ANODE 2. CATHODE 3. ANODE STYLE 6: PIN 1. MT 1 2. MT 2 3. GATE xxxxxx G A Y WW DOCUMENT NUMBER: NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH 3. 221D-01 THRU 221D-02 OBSOLETE, NEW STANDARD 221D-03. DIM A B C D F G H J K L N Q R S U A H DATE 27 FEB 2009 98ASB42514B TO−220 FULLPAK xxxxxxG AYWW AYWW xxxxxxG AKA Bipolar Rectifier = Specific Device Code = Pb−Free Package = Assembly Location = Year = Work Week A Y WW xxxxxx G AKA = Assembly Location = Year = Work Week = Device Code = Pb−Free Package = Polarity Designator Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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