NVMFS5833NT1G

NVMFS5833N Power MOSFET 40 V, 7.5 mW, 86 A, Single N−Channel, SO−8FL Features • • • • • • Low RDS(on) Low Capacitance Optimized Gate Charge AEC−Q101 Qualified and PPAP Capable NVMFS5833NWF − Wettable Franks Option for Enhanced Optical Inspection These Devices are Pb−Free and are RoHS Compliant http://onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 40 V 7.5 mW @ 10 V 86 A D (5) MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Symbol Value Unit Drain−to−Source Voltage VDSS 40 V Gate−to−Source Voltage VGS "20 V ID 86 A Parameter Continuous Drain Current RYJ−mb (Notes 1, 2, 3 & 4) Power Dissipation RYJ−mb (Notes 1, 2, 3) Continuous Drain Current RqJA (Notes 1, 3 & 4) Power Dissipation RqJA (Notes 1 & 3) Pulsed Drain Current Tmb = 25°C Steady State Tmb = 100°C Tmb = 25°C Steady State N−CHANNEL MOSFET PD ID Operating Junction and Storage Temperature Source Current (Body Diode) Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, IL(pk) = 36 A, L = 0.1 mH) Lead Temperature for Soldering Purposes (1/8″ from case for 10 s) MARKING DIAGRAM D A 16 1 11 PD TA = 100°C TA = 25°C, tp = 10 ms W 112 56 TA = 100°C TA = 25°C S (1,2,3) 61 Tmb = 100°C TA = 25°C G (4) W 3.7 1.8 IDM 324 A TJ, Tstg −55 to 175 °C IS 86 A EAS 65 mJ TL 260 °C SO−8 FLAT LEAD CASE 488AA STYLE 1 5833 xx A Y W ZZ Junction−to−Ambient − Steady State (Note 3) Symbol Value Unit RYJ−mb 1.3 °C/W RqJA 41 1. The entire application environment impacts the thermal resistance values shown, they are not constants and are only valid for the particular conditions noted. 2. Psi (Y) is used as required per JESD51−12 for packages in which substantially less than 100% of the heat flows to single case surface. 3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad. 4. Continuous DC current rating. Maximum current for pulses as long as 1 second are higher but are dependent on pulse duration and duty cycle/ © Semiconductor Components Industries, LLC, 2014 September, 2014 − Rev. 1 D D = Specific Device Code = N (NVMFS5833N) or = WF (NVMFS5833NWF) = Assembly Location = Year = Work Week = Lot Traceability Package Shipping† NVMFS5833NT1G SO−8FL (Pb−Free) 1500 / Tape & Reel NVMFS5833NT3G SO−8FL (Pb−Free) 5000 / Tape & Reel NVMFS5833NWFT1G SO−8FL (Pb−Free) 1500 / Tape & Reel NVMFS5833NWFT3G SO−8FL (Pb−Free) 5000 / Tape & Reel Device THERMAL RESISTANCE MAXIMUM RATINGS Junction−to−Mounting Board (top) − Steady State (Notes 2, 3) D 5833xx AYWZZ ORDERING INFORMATION Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Parameter S S S G 1 †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: NVMFS5833N/D NVMFS5833N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 40 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current IDSS 32.6 VGS = 0 V, VDS = 40 V mV/°C TJ = 25°C 1.0 TJ = 125°C 100 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA Gate−to−Source Leakage Current V ±100 mA nA ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Threshold Temperature Coefficient Drain−to−Source On Resistance VGS(TH)/TJ 2.0 3.5 −7.6 V mV/°C RDS(on) VGS = 10 V, ID = 40 A 6.2 gFS VDS = 5 V, ID = 5 A 38 S 1714 pF Forward Transconductance 7.5 mW CHARGES AND CAPACITANCES Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss 144 Total Gate Charge QG(TOT) 32.5 Threshold Gate Charge QG(TH) Gate−to−Source Charge QGS Gate−to−Drain Charge QGD 9 td(on) 10.23 VGS = 0 V, f = 1.0 MHz, VDS = 25 V VGS = 10 V, VDS = 32 V, ID = 40 A 210 nC 2.77 7.37 SWITCHING CHARACTERISTICS (Note 6) Turn−On Delay Time Rise Time Turn−Off Delay Time Fall Time tr td(off) VGS = 10 V, VDS = 20 V, ID = 40 A, RG = 2.5 W tf ns 19.5 23.60 3.00 DRAIN−SOURCE DIODE CHARACTERISTICS Forward Diode Voltage VSD Reverse Recovery Time tRR Charge Time ta Discharge Time tb Reverse Recovery Charge VGS = 0 V, IS = 40 A TJ = 25°C TJ = 125°C 0.85 QRR V 0.7 23.5 VGS = 0 V, dIS/dt = 100 A/ms, IS = 40 A 1.2 ns 13.5 10 14 nC Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product performance may not be indicated by the Electrical Characteristics if operated under different conditions. 5. Pulse Test: pulse width = 300 ms, duty cycle v 2%. 6. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 NVMFS5833N TYPICAL CHARACTERISTICS 110 110 TJ = 25°C 5.5 V 80 VGS = 6 V 70 60 4.5 V 50 40 30 4.0 V 20 10 0 0 0.5 1.0 1.5 2.0 2.5 VDS, DRAIN−TO−SOURCE VOLTAGE (V) VDS = 3 V 100 5.0 V 90 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 8V 10 V 100 90 80 70 60 50 30 20 10 0 3.0 TJ = 25°C 40 TJ = 125°C 1 23 21 ID = 40 A TJ = 25°C 19 17 15 13 11 9 7 5 4 5 7 6 9 8 5 6 2 3 4 VGS, GATE−TO−SOURCE VOLTAGE (V) 7 Figure 2. Transfer Characteristics RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW) Figure 1. On−Region Characteristics TJ = −55°C 10 VGS, GATE−TO−SOURCE VOLTAGE (V) 6.4 TJ = 25°C 6.3 6.2 6.1 VGS = 10 V 6.0 5.9 10 20 30 40 50 ID, DRAIN CURRENT (A) Figure 3. On−Resistance vs. Gate−to−Source Voltage Figure 4. On−Resistance vs. Drain Current and Gate Voltage ID = 40 A 1.8 VGS = 10 V VGS = 0 V 10000 IDSS, LEAKAGE (nA) RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED) 100000 2.0 1.6 1.4 1.2 1.0 TJ = 150°C TJ = 125°C 1000 TJ = 85°C 100 0.8 0.6 −50 10 −25 0 25 50 75 100 125 150 175 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 5. On−Resistance Variation with Temperature Figure 6. Drain−to−Source Leakage Current vs. Voltage http://onsemi.com 3 30 NVMFS5833N 2200 C, CAPACITANCE (pF) VGS = 0 V Ciss 2000 VGS, GATE−TO−SOURCE VOLTAGE (V) TYPICAL CHARACTERISTICS TJ = 25°C 1800 1600 1400 1200 1000 800 Coss 600 400 200 0 Crss 15 25 5 10 20 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 0 10 QT 8 6 Qgs 4 VGS = 10 V VDD = 32 V ID = 40 A TJ = 25°C 2 0 0 30 4 Figure 7. Capacitance Variation 8 12 16 20 24 Qg, TOTAL GATE CHARGE (nC) 28 32 Figure 8. Gate−to−Source Voltage vs. Total Charge 1000 20 VDD = 20 V ID = 40 A VGS = 10 V 18 IS, SOURCE CURRENT (A) t, TIME (ns) Qgd 100 td(off) tr 10 td(on) tf VGS = 0 V 16 14 12 10 8 6 TJ = 125°C 4 2 TJ = 25°C 0 1 1 10 RG, GATE RESISTANCE (W) 0.4 100 Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.6 0.7 0.8 0.5 VSD, SOURCE−TO−DRAIN VOLTAGE (V) 0.9 Figure 10. Diode Forward Voltage vs. Current 100 100 10 TJ (initial) = 25°C 100 ms IPEAK (A) ID, DRAIN CURRENT (A) 10 ms VGS = 10 V TC = 25°C 2 oz. 650 mm2 Cu Pad 1 ms 1 10 ms 0.1 RDS(on) Limit Thermal Limit Package Limit 0.01 0.1 dc TJ (initial) = 85°C 10 1 1 10 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 100 1E−06 Figure 11. Maximum Rated Forward Biased Safe Operating Area 1E−04 1E−05 TIME IN AVALANCHE (s) Figure 12. Avalanche Characteristics http://onsemi.com 4 1E−03 NVMFS5833N TYPICAL CHARACTERISTICS RqJA(t) (°C/W) EFFECTIVE TRANSIENT THERMAL RESISTANCE 100 Duty Cycle = 0.5 10 0.2 0.1 0.05 1 0.02 0.01 0.1 Single Pulse 0.01 0.000001 0.00001 0.0001 0.001 0.01 0.1 PULSE TIME (sec) Figure 13. Thermal Response http://onsemi.com 5 1 10 100 1000 MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS DFN5 5x6, 1.27P (SO−8FL) CASE 488AA ISSUE N 1 DATE 25 JUN 2018 SCALE 2:1 2X NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS. 0.20 C D A 2 B D1 2X 0.20 C 4X E1 2 q E c 1 2 3 A1 4 TOP VIEW C DETAIL A 0.10 C SEATING PLANE A 0.10 C SIDE VIEW MILLIMETERS MIN NOM MAX 0.90 1.00 1.10 0.00 −−− 0.05 0.33 0.41 0.51 0.23 0.28 0.33 5.00 5.15 5.30 4.70 4.90 5.10 3.80 4.00 4.20 6.00 6.30 6.15 5.70 5.90 6.10 3.45 3.65 3.85 1.27 BSC 0.51 0.575 0.71 1.20 1.35 1.50 0.51 0.575 0.71 0.125 REF 3.00 3.40 3.80 0_ −−− 12 _ DIM A A1 b c D D1 D2 E E1 E2 e G K L L1 M q GENERIC MARKING DIAGRAM* DETAIL A 1 0.10 b C A B 0.05 c 8X XXXXXX AYWZZ e/2 e L 1 4 K RECOMMENDED SOLDERING FOOTPRINT* E2 PIN 5 (EXPOSED PAD) L1 M 2X 0.495 4.560 2X 1.530 G D2 2X BOTTOM VIEW XXXXXX = Specific Device Code A = Assembly Location Y = Year W = Work Week ZZ = Lot Traceability *This information is generic. Please refer to device data sheet for actual part marking. Pb−Free indicator, “G” or microdot “ G”, may or may not be present. Some products may not follow the Generic Marking. 0.475 3.200 4.530 STYLE 1: PIN 1. SOURCE 2. SOURCE 3. SOURCE 4. GATE 5. DRAIN 1.330 STYLE 2: 2X PIN 1. ANODE 0.905 2. ANODE 3. ANODE 4. NO CONNECT 0.965 5. CATHODE 1 4X 1.000 4X 0.750 1.270 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. DOCUMENT NUMBER: DESCRIPTION: 98AON14036D DFN5 5x6, 1.27P (SO−8FL) Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red. PAGE 1 OF 1 ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. 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